0001
0002
0003
0004
0005
0006
0007
0008 #include <linux/kernel.h>
0009 #include <linux/module.h>
0010 #include <linux/interrupt.h>
0011 #include <linux/delay.h>
0012 #include <linux/ethtool.h>
0013 #include <linux/platform_device.h>
0014
0015 #include <linux/netdevice.h>
0016 #include <linux/can.h>
0017 #include <linux/can/dev.h>
0018 #include <linux/can/skb.h>
0019 #include <linux/can/error.h>
0020
0021 #include <linux/mfd/janz.h>
0022 #include <asm/io.h>
0023
0024
0025 #define DPM_NUM_PAGES 256
0026 #define DPM_PAGE_SIZE 256
0027 #define DPM_PAGE_ADDR(p) ((p) * DPM_PAGE_SIZE)
0028
0029
0030 #define QUEUE_OLD_CONTROL 0
0031 #define QUEUE_OLD_RB0 1
0032 #define QUEUE_OLD_RB1 2
0033 #define QUEUE_OLD_WB0 3
0034 #define QUEUE_OLD_WB1 4
0035
0036
0037 #define MSYNC_PEER 0x00
0038 #define MSYNC_LOCL 0x01
0039 #define TARGET_RUNNING 0x02
0040 #define FIRMWARE_STAMP 0x60
0041
0042 #define MSYNC_RB0 0x01
0043 #define MSYNC_RB1 0x02
0044 #define MSYNC_RBLW 0x04
0045 #define MSYNC_RB_MASK (MSYNC_RB0 | MSYNC_RB1)
0046
0047 #define MSYNC_WB0 0x10
0048 #define MSYNC_WB1 0x20
0049 #define MSYNC_WBLW 0x40
0050 #define MSYNC_WB_MASK (MSYNC_WB0 | MSYNC_WB1)
0051
0052
0053 #define QUEUE_TOHOST 5
0054 #define QUEUE_FROMHOST_MID 6
0055 #define QUEUE_FROMHOST_HIGH 7
0056 #define QUEUE_FROMHOST_LOW 8
0057
0058
0059 #define DPM_FREE_START 9
0060
0061
0062 #define DESC_VALID 0x80
0063 #define DESC_WRAP 0x40
0064 #define DESC_INTERRUPT 0x20
0065 #define DESC_IVALID 0x10
0066 #define DESC_LEN(len) (len)
0067
0068
0069 #define MSG_CONNECTI 0x02
0070 #define MSG_DISCONNECT 0x03
0071 #define MSG_IDVERS 0x04
0072 #define MSG_MSGLOST 0x05
0073 #define MSG_NEWHOSTIF 0x08
0074 #define MSG_INQUIRY 0x0a
0075 #define MSG_SETAFILMASK 0x10
0076 #define MSG_INITFDPMQUEUE 0x11
0077 #define MSG_HWCONF 0x12
0078 #define MSG_FMSGLOST 0x15
0079 #define MSG_CEVTIND 0x37
0080 #define MSG_CBTRREQ 0x41
0081 #define MSG_COFFREQ 0x42
0082 #define MSG_CONREQ 0x43
0083 #define MSG_CCONFREQ 0x47
0084 #define MSG_NMTS 0xb0
0085 #define MSG_LMTS 0xb4
0086
0087
0088
0089
0090
0091
0092
0093
0094
0095 #define INQUIRY_STATUS 0x00
0096 #define INQUIRY_TERMINATION 0x01
0097 #define INQUIRY_EXTENDED 0x04
0098
0099
0100 #define SETAFILMASK_REJECT 0x00
0101 #define SETAFILMASK_FASTIF 0x02
0102
0103
0104 #define HWCONF_TERMINATE_ON 0x01
0105 #define HWCONF_TERMINATE_OFF 0x00
0106
0107
0108 #define CEVTIND_EI 0x01
0109 #define CEVTIND_DOI 0x02
0110 #define CEVTIND_LOST 0x04
0111 #define CEVTIND_FULL 0x08
0112 #define CEVTIND_BEI 0x10
0113
0114 #define CEVTIND_CHIP_SJA1000 0x02
0115
0116 #define ICAN3_BUSERR_QUOTA_MAX 255
0117
0118
0119 #define ICAN3_SNGL 0x02
0120 #define ICAN3_ECHO 0x10
0121 #define ICAN3_EFF_RTR 0x40
0122 #define ICAN3_SFF_RTR 0x10
0123 #define ICAN3_EFF 0x80
0124
0125 #define ICAN3_CAN_TYPE_MASK 0x0f
0126 #define ICAN3_CAN_TYPE_SFF 0x00
0127 #define ICAN3_CAN_TYPE_EFF 0x01
0128
0129 #define ICAN3_CAN_DLC_MASK 0x0f
0130
0131
0132 #define NMTS_CREATE_NODE_REQ 0x0
0133 #define NMTS_SLAVE_STATE_IND 0x8
0134 #define NMTS_SLAVE_EVENT_IND 0x9
0135
0136
0137 #define LMTS_BUSON_REQ 0x0
0138 #define LMTS_BUSOFF_REQ 0x1
0139 #define LMTS_CAN_CONF_REQ 0x2
0140
0141
0142 #define NE_LOCAL_OCCURRED 0x3
0143 #define NE_LOCAL_RESOLVED 0x2
0144 #define NE_REMOTE_OCCURRED 0xc
0145 #define NE_REMOTE_RESOLVED 0x8
0146
0147
0148
0149
0150
0151
0152
0153
0154 #define SR_BS 0x80
0155 #define SR_ES 0x40
0156 #define SR_TS 0x20
0157 #define SR_RS 0x10
0158 #define SR_TCS 0x08
0159 #define SR_TBS 0x04
0160 #define SR_DOS 0x02
0161 #define SR_RBS 0x01
0162
0163 #define SR_CRIT (SR_BS|SR_ES)
0164
0165
0166 #define ECC_SEG 0x1F
0167 #define ECC_DIR 0x20
0168 #define ECC_ERR 6
0169 #define ECC_BIT 0x00
0170 #define ECC_FORM 0x40
0171 #define ECC_STUFF 0x80
0172 #define ECC_MASK 0xc0
0173
0174
0175 #define ICAN3_NEW_BUFFERS 16
0176
0177
0178 #define ICAN3_TX_BUFFERS 512
0179 #define ICAN3_RX_BUFFERS 1024
0180
0181
0182 #define ICAN3_CAN_CLOCK 8000000
0183
0184
0185 enum ican3_fwtype {
0186 ICAN3_FWTYPE_ICANOS,
0187 ICAN3_FWTYPE_CAL_CANOPEN,
0188 };
0189
0190
0191 #define DRV_NAME "janz-ican3"
0192
0193
0194 struct ican3_dpm_control {
0195
0196 u8 window_address;
0197 u8 unused1;
0198
0199
0200
0201
0202
0203 u8 interrupt;
0204 u8 unused2;
0205
0206
0207 u8 hwreset;
0208 u8 unused3;
0209
0210
0211 u8 tpuinterrupt;
0212 };
0213
0214 struct ican3_dev {
0215
0216
0217 struct can_priv can;
0218
0219
0220 struct net_device *ndev;
0221 struct napi_struct napi;
0222
0223
0224 unsigned int num;
0225
0226
0227 struct janz_cmodio_onboard_regs __iomem *ctrl;
0228 struct ican3_dpm_control __iomem *dpmctrl;
0229 void __iomem *dpm;
0230 int irq;
0231
0232
0233 struct completion termination_comp;
0234 bool termination_enabled;
0235
0236
0237 struct completion buserror_comp;
0238 struct can_berr_counter bec;
0239
0240
0241 enum ican3_fwtype fwtype;
0242 char fwinfo[32];
0243
0244
0245 unsigned int iftype;
0246
0247
0248 struct sk_buff_head echoq;
0249
0250
0251
0252
0253
0254
0255
0256 spinlock_t lock;
0257
0258
0259 unsigned int rx_int;
0260 unsigned int rx_num;
0261 unsigned int tx_num;
0262
0263
0264 unsigned int fastrx_start;
0265 unsigned int fastrx_num;
0266 unsigned int fasttx_start;
0267 unsigned int fasttx_num;
0268
0269
0270 unsigned int free_page;
0271 };
0272
0273 struct ican3_msg {
0274 u8 control;
0275 u8 spec;
0276 __le16 len;
0277 u8 data[252];
0278 };
0279
0280 struct ican3_new_desc {
0281 u8 control;
0282 u8 pointer;
0283 };
0284
0285 struct ican3_fast_desc {
0286 u8 control;
0287 u8 command;
0288 u8 data[14];
0289 };
0290
0291
0292 static inline void ican3_set_page(struct ican3_dev *mod, unsigned int page)
0293 {
0294 BUG_ON(page >= DPM_NUM_PAGES);
0295 iowrite8(page, &mod->dpmctrl->window_address);
0296 }
0297
0298
0299
0300
0301
0302
0303
0304
0305
0306
0307
0308
0309 static int ican3_old_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
0310 {
0311 unsigned int mbox, mbox_page;
0312 u8 locl, peer, xord;
0313
0314
0315 ican3_set_page(mod, QUEUE_OLD_CONTROL);
0316 peer = ioread8(mod->dpm + MSYNC_PEER);
0317 locl = ioread8(mod->dpm + MSYNC_LOCL);
0318 xord = locl ^ peer;
0319
0320 if ((xord & MSYNC_RB_MASK) == 0x00) {
0321 netdev_dbg(mod->ndev, "no mbox for reading\n");
0322 return -ENOMEM;
0323 }
0324
0325
0326 if ((xord & MSYNC_RB_MASK) == MSYNC_RB_MASK)
0327 mbox = (xord & MSYNC_RBLW) ? MSYNC_RB0 : MSYNC_RB1;
0328 else
0329 mbox = (xord & MSYNC_RB0) ? MSYNC_RB0 : MSYNC_RB1;
0330
0331
0332 mbox_page = (mbox == MSYNC_RB0) ? QUEUE_OLD_RB0 : QUEUE_OLD_RB1;
0333 ican3_set_page(mod, mbox_page);
0334 memcpy_fromio(msg, mod->dpm, sizeof(*msg));
0335
0336
0337
0338
0339
0340 locl ^= mbox;
0341
0342 ican3_set_page(mod, QUEUE_OLD_CONTROL);
0343 iowrite8(locl, mod->dpm + MSYNC_LOCL);
0344 return 0;
0345 }
0346
0347
0348
0349
0350
0351
0352
0353
0354 static int ican3_old_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
0355 {
0356 unsigned int mbox, mbox_page;
0357 u8 locl, peer, xord;
0358
0359
0360 ican3_set_page(mod, QUEUE_OLD_CONTROL);
0361 peer = ioread8(mod->dpm + MSYNC_PEER);
0362 locl = ioread8(mod->dpm + MSYNC_LOCL);
0363 xord = locl ^ peer;
0364
0365 if ((xord & MSYNC_WB_MASK) == MSYNC_WB_MASK) {
0366 netdev_err(mod->ndev, "no mbox for writing\n");
0367 return -ENOMEM;
0368 }
0369
0370
0371 mbox = (xord & MSYNC_WB0) ? MSYNC_WB1 : MSYNC_WB0;
0372
0373
0374 mbox_page = (mbox == MSYNC_WB0) ? QUEUE_OLD_WB0 : QUEUE_OLD_WB1;
0375 ican3_set_page(mod, mbox_page);
0376 memcpy_toio(mod->dpm, msg, sizeof(*msg));
0377
0378 locl ^= mbox;
0379 if (mbox == MSYNC_WB1)
0380 locl |= MSYNC_WBLW;
0381
0382 ican3_set_page(mod, QUEUE_OLD_CONTROL);
0383 iowrite8(locl, mod->dpm + MSYNC_LOCL);
0384 return 0;
0385 }
0386
0387
0388
0389
0390
0391 static void ican3_init_new_host_interface(struct ican3_dev *mod)
0392 {
0393 struct ican3_new_desc desc;
0394 unsigned long flags;
0395 void __iomem *dst;
0396 int i;
0397
0398 spin_lock_irqsave(&mod->lock, flags);
0399
0400
0401 mod->rx_num = 0;
0402 mod->rx_int = 0;
0403
0404
0405 ican3_set_page(mod, QUEUE_TOHOST);
0406 dst = mod->dpm;
0407
0408
0409 for (i = 0; i < ICAN3_NEW_BUFFERS; i++) {
0410 desc.control = DESC_INTERRUPT | DESC_LEN(1);
0411 desc.pointer = mod->free_page;
0412
0413
0414 if (i == ICAN3_NEW_BUFFERS - 1)
0415 desc.control |= DESC_WRAP;
0416
0417 memcpy_toio(dst, &desc, sizeof(desc));
0418 dst += sizeof(desc);
0419 mod->free_page++;
0420 }
0421
0422
0423 ican3_set_page(mod, QUEUE_FROMHOST_MID);
0424 dst = mod->dpm;
0425
0426
0427 mod->tx_num = 0;
0428
0429
0430 for (i = 0; i < ICAN3_NEW_BUFFERS; i++) {
0431 desc.control = DESC_VALID | DESC_LEN(1);
0432 desc.pointer = mod->free_page;
0433
0434
0435 if (i == ICAN3_NEW_BUFFERS - 1)
0436 desc.control |= DESC_WRAP;
0437
0438 memcpy_toio(dst, &desc, sizeof(desc));
0439 dst += sizeof(desc);
0440 mod->free_page++;
0441 }
0442
0443
0444 ican3_set_page(mod, QUEUE_FROMHOST_HIGH);
0445 dst = mod->dpm;
0446
0447
0448 desc.control = DESC_VALID | DESC_WRAP | DESC_LEN(1);
0449 desc.pointer = mod->free_page;
0450 memcpy_toio(dst, &desc, sizeof(desc));
0451 mod->free_page++;
0452
0453
0454 ican3_set_page(mod, QUEUE_FROMHOST_LOW);
0455 dst = mod->dpm;
0456
0457
0458 desc.control = DESC_VALID | DESC_WRAP | DESC_LEN(1);
0459 desc.pointer = mod->free_page;
0460 memcpy_toio(dst, &desc, sizeof(desc));
0461 mod->free_page++;
0462
0463 spin_unlock_irqrestore(&mod->lock, flags);
0464 }
0465
0466
0467
0468
0469
0470 static void ican3_init_fast_host_interface(struct ican3_dev *mod)
0471 {
0472 struct ican3_fast_desc desc;
0473 unsigned long flags;
0474 unsigned int addr;
0475 void __iomem *dst;
0476 int i;
0477
0478 spin_lock_irqsave(&mod->lock, flags);
0479
0480
0481 mod->fastrx_start = mod->free_page;
0482 mod->fastrx_num = 0;
0483
0484
0485 memset(&desc, 0, sizeof(desc));
0486 desc.control = 0x00;
0487 desc.command = 1;
0488
0489
0490 addr = 0;
0491 for (i = 0; i < ICAN3_RX_BUFFERS; i++) {
0492
0493
0494 if (i == ICAN3_RX_BUFFERS - 1)
0495 desc.control |= DESC_WRAP;
0496
0497
0498 ican3_set_page(mod, mod->free_page);
0499
0500
0501 dst = mod->dpm + addr;
0502 memcpy_toio(dst, &desc, sizeof(desc));
0503 addr += sizeof(desc);
0504
0505
0506 if (addr >= DPM_PAGE_SIZE) {
0507 addr = 0;
0508 mod->free_page++;
0509 }
0510 }
0511
0512
0513 if (addr != 0)
0514 mod->free_page++;
0515
0516
0517 mod->fasttx_start = mod->free_page;
0518 mod->fasttx_num = 0;
0519
0520
0521 memset(&desc, 0, sizeof(desc));
0522 desc.control = DESC_VALID;
0523 desc.command = 1;
0524
0525
0526 addr = 0;
0527 for (i = 0; i < ICAN3_TX_BUFFERS; i++) {
0528
0529
0530 if (i == ICAN3_TX_BUFFERS - 1)
0531 desc.control |= DESC_WRAP;
0532
0533
0534 ican3_set_page(mod, mod->free_page);
0535
0536
0537 dst = mod->dpm + addr;
0538 memcpy_toio(dst, &desc, sizeof(desc));
0539 addr += sizeof(desc);
0540
0541
0542 if (addr >= DPM_PAGE_SIZE) {
0543 addr = 0;
0544 mod->free_page++;
0545 }
0546 }
0547
0548 spin_unlock_irqrestore(&mod->lock, flags);
0549 }
0550
0551
0552
0553
0554
0555
0556
0557
0558 static int ican3_new_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
0559 {
0560 struct ican3_new_desc desc;
0561 void __iomem *desc_addr = mod->dpm + (mod->tx_num * sizeof(desc));
0562
0563
0564 ican3_set_page(mod, QUEUE_FROMHOST_MID);
0565 memcpy_fromio(&desc, desc_addr, sizeof(desc));
0566
0567 if (!(desc.control & DESC_VALID)) {
0568 netdev_dbg(mod->ndev, "%s: no free buffers\n", __func__);
0569 return -ENOMEM;
0570 }
0571
0572
0573 ican3_set_page(mod, desc.pointer);
0574 memcpy_toio(mod->dpm, msg, sizeof(*msg));
0575
0576
0577 ican3_set_page(mod, QUEUE_FROMHOST_MID);
0578 desc.control ^= DESC_VALID;
0579 memcpy_toio(desc_addr, &desc, sizeof(desc));
0580
0581
0582 mod->tx_num = (desc.control & DESC_WRAP) ? 0 : (mod->tx_num + 1);
0583 return 0;
0584 }
0585
0586
0587
0588
0589 static int ican3_new_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
0590 {
0591 struct ican3_new_desc desc;
0592 void __iomem *desc_addr = mod->dpm + (mod->rx_num * sizeof(desc));
0593
0594
0595 ican3_set_page(mod, QUEUE_TOHOST);
0596 memcpy_fromio(&desc, desc_addr, sizeof(desc));
0597
0598 if (!(desc.control & DESC_VALID)) {
0599 netdev_dbg(mod->ndev, "%s: no buffers to recv\n", __func__);
0600 return -ENOMEM;
0601 }
0602
0603
0604 ican3_set_page(mod, desc.pointer);
0605 memcpy_fromio(msg, mod->dpm, sizeof(*msg));
0606
0607
0608 ican3_set_page(mod, QUEUE_TOHOST);
0609 desc.control ^= DESC_VALID;
0610 memcpy_toio(desc_addr, &desc, sizeof(desc));
0611
0612
0613 mod->rx_num = (desc.control & DESC_WRAP) ? 0 : (mod->rx_num + 1);
0614 return 0;
0615 }
0616
0617
0618
0619
0620
0621 static int ican3_send_msg(struct ican3_dev *mod, struct ican3_msg *msg)
0622 {
0623 unsigned long flags;
0624 int ret;
0625
0626 spin_lock_irqsave(&mod->lock, flags);
0627
0628 if (mod->iftype == 0)
0629 ret = ican3_old_send_msg(mod, msg);
0630 else
0631 ret = ican3_new_send_msg(mod, msg);
0632
0633 spin_unlock_irqrestore(&mod->lock, flags);
0634 return ret;
0635 }
0636
0637 static int ican3_recv_msg(struct ican3_dev *mod, struct ican3_msg *msg)
0638 {
0639 unsigned long flags;
0640 int ret;
0641
0642 spin_lock_irqsave(&mod->lock, flags);
0643
0644 if (mod->iftype == 0)
0645 ret = ican3_old_recv_msg(mod, msg);
0646 else
0647 ret = ican3_new_recv_msg(mod, msg);
0648
0649 spin_unlock_irqrestore(&mod->lock, flags);
0650 return ret;
0651 }
0652
0653
0654
0655
0656
0657 static int ican3_msg_connect(struct ican3_dev *mod)
0658 {
0659 struct ican3_msg msg;
0660
0661 memset(&msg, 0, sizeof(msg));
0662 msg.spec = MSG_CONNECTI;
0663 msg.len = cpu_to_le16(0);
0664
0665 return ican3_send_msg(mod, &msg);
0666 }
0667
0668 static int ican3_msg_disconnect(struct ican3_dev *mod)
0669 {
0670 struct ican3_msg msg;
0671
0672 memset(&msg, 0, sizeof(msg));
0673 msg.spec = MSG_DISCONNECT;
0674 msg.len = cpu_to_le16(0);
0675
0676 return ican3_send_msg(mod, &msg);
0677 }
0678
0679 static int ican3_msg_newhostif(struct ican3_dev *mod)
0680 {
0681 struct ican3_msg msg;
0682 int ret;
0683
0684 memset(&msg, 0, sizeof(msg));
0685 msg.spec = MSG_NEWHOSTIF;
0686 msg.len = cpu_to_le16(0);
0687
0688
0689 WARN_ON(mod->iftype != 0);
0690
0691 ret = ican3_send_msg(mod, &msg);
0692 if (ret)
0693 return ret;
0694
0695
0696 mod->iftype = 1;
0697 return 0;
0698 }
0699
0700 static int ican3_msg_fasthostif(struct ican3_dev *mod)
0701 {
0702 struct ican3_msg msg;
0703 unsigned int addr;
0704
0705 memset(&msg, 0, sizeof(msg));
0706 msg.spec = MSG_INITFDPMQUEUE;
0707 msg.len = cpu_to_le16(8);
0708
0709
0710 addr = DPM_PAGE_ADDR(mod->fastrx_start);
0711 msg.data[0] = addr & 0xff;
0712 msg.data[1] = (addr >> 8) & 0xff;
0713 msg.data[2] = (addr >> 16) & 0xff;
0714 msg.data[3] = (addr >> 24) & 0xff;
0715
0716
0717 addr = DPM_PAGE_ADDR(mod->fasttx_start);
0718 msg.data[4] = addr & 0xff;
0719 msg.data[5] = (addr >> 8) & 0xff;
0720 msg.data[6] = (addr >> 16) & 0xff;
0721 msg.data[7] = (addr >> 24) & 0xff;
0722
0723
0724 WARN_ON(mod->iftype != 1);
0725
0726 return ican3_send_msg(mod, &msg);
0727 }
0728
0729
0730
0731
0732
0733 static int ican3_set_id_filter(struct ican3_dev *mod, bool accept)
0734 {
0735 struct ican3_msg msg;
0736 int ret;
0737
0738
0739 memset(&msg, 0, sizeof(msg));
0740 msg.spec = MSG_SETAFILMASK;
0741 msg.len = cpu_to_le16(5);
0742 msg.data[0] = 0x00;
0743 msg.data[1] = 0x00;
0744 msg.data[2] = 0xff;
0745 msg.data[3] = 0x07;
0746
0747
0748 msg.data[4] = accept ? SETAFILMASK_FASTIF : SETAFILMASK_REJECT;
0749
0750 ret = ican3_send_msg(mod, &msg);
0751 if (ret)
0752 return ret;
0753
0754
0755 memset(&msg, 0, sizeof(msg));
0756 msg.spec = MSG_SETAFILMASK;
0757 msg.len = cpu_to_le16(13);
0758 msg.data[0] = 0;
0759 msg.data[1] = 0x00;
0760 msg.data[2] = 0x00;
0761 msg.data[3] = 0x00;
0762 msg.data[4] = 0x20;
0763 msg.data[5] = 0xff;
0764 msg.data[6] = 0xff;
0765 msg.data[7] = 0xff;
0766 msg.data[8] = 0x3f;
0767
0768
0769 msg.data[9] = accept ? SETAFILMASK_FASTIF : SETAFILMASK_REJECT;
0770
0771 return ican3_send_msg(mod, &msg);
0772 }
0773
0774
0775
0776
0777 static int ican3_set_bus_state(struct ican3_dev *mod, bool on)
0778 {
0779 struct can_bittiming *bt = &mod->can.bittiming;
0780 struct ican3_msg msg;
0781 u8 btr0, btr1;
0782 int res;
0783
0784
0785
0786
0787 btr0 = ((bt->brp - 1) & 0x3f) | (((bt->sjw - 1) & 0x3) << 6);
0788 btr1 = ((bt->prop_seg + bt->phase_seg1 - 1) & 0xf) |
0789 (((bt->phase_seg2 - 1) & 0x7) << 4);
0790 if (mod->can.ctrlmode & CAN_CTRLMODE_3_SAMPLES)
0791 btr1 |= 0x80;
0792
0793 if (mod->fwtype == ICAN3_FWTYPE_ICANOS) {
0794 if (on) {
0795
0796 memset(&msg, 0, sizeof(msg));
0797 msg.spec = MSG_CBTRREQ;
0798 msg.len = cpu_to_le16(4);
0799 msg.data[0] = 0x00;
0800 msg.data[1] = 0x00;
0801 msg.data[2] = btr0;
0802 msg.data[3] = btr1;
0803
0804 res = ican3_send_msg(mod, &msg);
0805 if (res)
0806 return res;
0807 }
0808
0809
0810 memset(&msg, 0, sizeof(msg));
0811 msg.spec = on ? MSG_CONREQ : MSG_COFFREQ;
0812 msg.len = cpu_to_le16(0);
0813
0814 return ican3_send_msg(mod, &msg);
0815
0816 } else if (mod->fwtype == ICAN3_FWTYPE_CAL_CANOPEN) {
0817
0818 memset(&msg, 0, sizeof(msg));
0819 msg.spec = MSG_LMTS;
0820 if (on) {
0821 msg.len = cpu_to_le16(4);
0822 msg.data[0] = LMTS_BUSON_REQ;
0823 msg.data[1] = 0;
0824 msg.data[2] = btr0;
0825 msg.data[3] = btr1;
0826 } else {
0827 msg.len = cpu_to_le16(2);
0828 msg.data[0] = LMTS_BUSOFF_REQ;
0829 msg.data[1] = 0;
0830 }
0831 res = ican3_send_msg(mod, &msg);
0832 if (res)
0833 return res;
0834
0835 if (on) {
0836
0837
0838
0839
0840
0841 memset(&msg, 0, sizeof(msg));
0842 msg.spec = MSG_NMTS;
0843 msg.len = cpu_to_le16(11);
0844 msg.data[0] = NMTS_CREATE_NODE_REQ;
0845 msg.data[1] = 0;
0846 msg.data[2] = 2;
0847 msg.data[3] = 1;
0848 strcpy(msg.data + 4, "locnod1");
0849 return ican3_send_msg(mod, &msg);
0850 }
0851 return 0;
0852 }
0853 return -ENOTSUPP;
0854 }
0855
0856 static int ican3_set_termination(struct ican3_dev *mod, bool on)
0857 {
0858 struct ican3_msg msg;
0859
0860 memset(&msg, 0, sizeof(msg));
0861 msg.spec = MSG_HWCONF;
0862 msg.len = cpu_to_le16(2);
0863 msg.data[0] = 0x00;
0864 msg.data[1] = on ? HWCONF_TERMINATE_ON : HWCONF_TERMINATE_OFF;
0865
0866 return ican3_send_msg(mod, &msg);
0867 }
0868
0869 static int ican3_send_inquiry(struct ican3_dev *mod, u8 subspec)
0870 {
0871 struct ican3_msg msg;
0872
0873 memset(&msg, 0, sizeof(msg));
0874 msg.spec = MSG_INQUIRY;
0875 msg.len = cpu_to_le16(2);
0876 msg.data[0] = subspec;
0877 msg.data[1] = 0x00;
0878
0879 return ican3_send_msg(mod, &msg);
0880 }
0881
0882 static int ican3_set_buserror(struct ican3_dev *mod, u8 quota)
0883 {
0884 struct ican3_msg msg;
0885
0886 if (mod->fwtype == ICAN3_FWTYPE_ICANOS) {
0887 memset(&msg, 0, sizeof(msg));
0888 msg.spec = MSG_CCONFREQ;
0889 msg.len = cpu_to_le16(2);
0890 msg.data[0] = 0x00;
0891 msg.data[1] = quota;
0892 } else if (mod->fwtype == ICAN3_FWTYPE_CAL_CANOPEN) {
0893 memset(&msg, 0, sizeof(msg));
0894 msg.spec = MSG_LMTS;
0895 msg.len = cpu_to_le16(4);
0896 msg.data[0] = LMTS_CAN_CONF_REQ;
0897 msg.data[1] = 0x00;
0898 msg.data[2] = 0x00;
0899 msg.data[3] = quota;
0900 } else {
0901 return -ENOTSUPP;
0902 }
0903 return ican3_send_msg(mod, &msg);
0904 }
0905
0906
0907
0908
0909
0910 static void ican3_to_can_frame(struct ican3_dev *mod,
0911 struct ican3_fast_desc *desc,
0912 struct can_frame *cf)
0913 {
0914 if ((desc->command & ICAN3_CAN_TYPE_MASK) == ICAN3_CAN_TYPE_SFF) {
0915 if (desc->data[1] & ICAN3_SFF_RTR)
0916 cf->can_id |= CAN_RTR_FLAG;
0917
0918 cf->can_id |= desc->data[0] << 3;
0919 cf->can_id |= (desc->data[1] & 0xe0) >> 5;
0920 cf->len = can_cc_dlc2len(desc->data[1] & ICAN3_CAN_DLC_MASK);
0921 memcpy(cf->data, &desc->data[2], cf->len);
0922 } else {
0923 cf->len = can_cc_dlc2len(desc->data[0] & ICAN3_CAN_DLC_MASK);
0924 if (desc->data[0] & ICAN3_EFF_RTR)
0925 cf->can_id |= CAN_RTR_FLAG;
0926
0927 if (desc->data[0] & ICAN3_EFF) {
0928 cf->can_id |= CAN_EFF_FLAG;
0929 cf->can_id |= desc->data[2] << 21;
0930 cf->can_id |= desc->data[3] << 13;
0931 cf->can_id |= desc->data[4] << 5;
0932 cf->can_id |= (desc->data[5] & 0xf8) >> 3;
0933 } else {
0934 cf->can_id |= desc->data[2] << 3;
0935 cf->can_id |= desc->data[3] >> 5;
0936 }
0937
0938 memcpy(cf->data, &desc->data[6], cf->len);
0939 }
0940 }
0941
0942 static void can_frame_to_ican3(struct ican3_dev *mod,
0943 struct can_frame *cf,
0944 struct ican3_fast_desc *desc)
0945 {
0946
0947 memset(desc->data, 0, sizeof(desc->data));
0948
0949
0950 desc->command = ICAN3_CAN_TYPE_EFF;
0951 desc->data[0] |= cf->len;
0952 desc->data[1] |= ICAN3_ECHO;
0953
0954
0955 if (mod->can.ctrlmode & CAN_CTRLMODE_ONE_SHOT)
0956 desc->data[1] |= ICAN3_SNGL;
0957
0958 if (cf->can_id & CAN_RTR_FLAG)
0959 desc->data[0] |= ICAN3_EFF_RTR;
0960
0961
0962 if (cf->can_id & CAN_EFF_FLAG) {
0963 desc->data[0] |= ICAN3_EFF;
0964 desc->data[2] = (cf->can_id & 0x1fe00000) >> 21;
0965 desc->data[3] = (cf->can_id & 0x001fe000) >> 13;
0966 desc->data[4] = (cf->can_id & 0x00001fe0) >> 5;
0967 desc->data[5] = (cf->can_id & 0x0000001f) << 3;
0968 } else {
0969 desc->data[2] = (cf->can_id & 0x7F8) >> 3;
0970 desc->data[3] = (cf->can_id & 0x007) << 5;
0971 }
0972
0973
0974 memcpy(&desc->data[6], cf->data, cf->len);
0975 }
0976
0977
0978
0979
0980
0981
0982
0983
0984
0985
0986 static void ican3_handle_idvers(struct ican3_dev *mod, struct ican3_msg *msg)
0987 {
0988 netdev_dbg(mod->ndev, "IDVERS response: %s\n", msg->data);
0989 }
0990
0991 static void ican3_handle_msglost(struct ican3_dev *mod, struct ican3_msg *msg)
0992 {
0993 struct net_device *dev = mod->ndev;
0994 struct net_device_stats *stats = &dev->stats;
0995 struct can_frame *cf;
0996 struct sk_buff *skb;
0997
0998
0999
1000
1001
1002
1003 if (msg->spec == MSG_MSGLOST) {
1004 netdev_err(mod->ndev, "lost %d control messages\n", msg->data[0]);
1005 return;
1006 }
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016 skb = alloc_can_err_skb(dev, &cf);
1017 if (skb) {
1018 cf->can_id |= CAN_ERR_CRTL;
1019 cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
1020 stats->rx_over_errors++;
1021 stats->rx_errors++;
1022 netif_rx(skb);
1023 }
1024 }
1025
1026
1027
1028
1029
1030
1031
1032
1033 static int ican3_handle_cevtind(struct ican3_dev *mod, struct ican3_msg *msg)
1034 {
1035 struct net_device *dev = mod->ndev;
1036 struct net_device_stats *stats = &dev->stats;
1037 enum can_state state = mod->can.state;
1038 u8 isrc, ecc, status, rxerr, txerr;
1039 struct can_frame *cf;
1040 struct sk_buff *skb;
1041
1042
1043 if (msg->data[1] != CEVTIND_CHIP_SJA1000) {
1044 netdev_err(mod->ndev, "unable to handle errors on non-SJA1000\n");
1045 return -ENODEV;
1046 }
1047
1048
1049 if (le16_to_cpu(msg->len) < 6) {
1050 netdev_err(mod->ndev, "error message too short\n");
1051 return -EINVAL;
1052 }
1053
1054 isrc = msg->data[0];
1055 ecc = msg->data[2];
1056 status = msg->data[3];
1057 rxerr = msg->data[4];
1058 txerr = msg->data[5];
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070 if (isrc == CEVTIND_BEI) {
1071 int ret;
1072 netdev_dbg(mod->ndev, "bus error interrupt\n");
1073
1074
1075 if (!(ecc & ECC_DIR)) {
1076 kfree_skb(skb_dequeue(&mod->echoq));
1077 stats->tx_errors++;
1078 } else {
1079 stats->rx_errors++;
1080 }
1081
1082
1083
1084
1085
1086 ret = ican3_set_buserror(mod, 1);
1087 if (ret) {
1088 netdev_err(mod->ndev, "unable to re-enable bus-error\n");
1089 return ret;
1090 }
1091
1092
1093 if (!(mod->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING))
1094 return 0;
1095 }
1096
1097 skb = alloc_can_err_skb(dev, &cf);
1098 if (skb == NULL)
1099 return -ENOMEM;
1100
1101
1102 if (isrc == CEVTIND_DOI || isrc == CEVTIND_LOST) {
1103 netdev_dbg(mod->ndev, "data overrun interrupt\n");
1104 cf->can_id |= CAN_ERR_CRTL;
1105 cf->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
1106 stats->rx_over_errors++;
1107 stats->rx_errors++;
1108 }
1109
1110
1111 if (isrc == CEVTIND_EI) {
1112 netdev_dbg(mod->ndev, "error warning + passive interrupt\n");
1113 if (status & SR_BS) {
1114 state = CAN_STATE_BUS_OFF;
1115 cf->can_id |= CAN_ERR_BUSOFF;
1116 mod->can.can_stats.bus_off++;
1117 can_bus_off(dev);
1118 } else if (status & SR_ES) {
1119 if (rxerr >= 128 || txerr >= 128)
1120 state = CAN_STATE_ERROR_PASSIVE;
1121 else
1122 state = CAN_STATE_ERROR_WARNING;
1123 } else {
1124 state = CAN_STATE_ERROR_ACTIVE;
1125 }
1126 }
1127
1128
1129 if (isrc == CEVTIND_BEI) {
1130 mod->can.can_stats.bus_error++;
1131 cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR | CAN_ERR_CNT;
1132
1133 switch (ecc & ECC_MASK) {
1134 case ECC_BIT:
1135 cf->data[2] |= CAN_ERR_PROT_BIT;
1136 break;
1137 case ECC_FORM:
1138 cf->data[2] |= CAN_ERR_PROT_FORM;
1139 break;
1140 case ECC_STUFF:
1141 cf->data[2] |= CAN_ERR_PROT_STUFF;
1142 break;
1143 default:
1144 cf->data[3] = ecc & ECC_SEG;
1145 break;
1146 }
1147
1148 if (!(ecc & ECC_DIR))
1149 cf->data[2] |= CAN_ERR_PROT_TX;
1150
1151 cf->data[6] = txerr;
1152 cf->data[7] = rxerr;
1153 }
1154
1155 if (state != mod->can.state && (state == CAN_STATE_ERROR_WARNING ||
1156 state == CAN_STATE_ERROR_PASSIVE)) {
1157 cf->can_id |= CAN_ERR_CRTL | CAN_ERR_CNT;
1158 if (state == CAN_STATE_ERROR_WARNING) {
1159 mod->can.can_stats.error_warning++;
1160 cf->data[1] = (txerr > rxerr) ?
1161 CAN_ERR_CRTL_TX_WARNING :
1162 CAN_ERR_CRTL_RX_WARNING;
1163 } else {
1164 mod->can.can_stats.error_passive++;
1165 cf->data[1] = (txerr > rxerr) ?
1166 CAN_ERR_CRTL_TX_PASSIVE :
1167 CAN_ERR_CRTL_RX_PASSIVE;
1168 }
1169
1170 cf->data[6] = txerr;
1171 cf->data[7] = rxerr;
1172 }
1173
1174 mod->can.state = state;
1175 netif_rx(skb);
1176 return 0;
1177 }
1178
1179 static void ican3_handle_inquiry(struct ican3_dev *mod, struct ican3_msg *msg)
1180 {
1181 switch (msg->data[0]) {
1182 case INQUIRY_STATUS:
1183 case INQUIRY_EXTENDED:
1184 mod->bec.rxerr = msg->data[5];
1185 mod->bec.txerr = msg->data[6];
1186 complete(&mod->buserror_comp);
1187 break;
1188 case INQUIRY_TERMINATION:
1189 mod->termination_enabled = msg->data[6] & HWCONF_TERMINATE_ON;
1190 complete(&mod->termination_comp);
1191 break;
1192 default:
1193 netdev_err(mod->ndev, "received an unknown inquiry response\n");
1194 break;
1195 }
1196 }
1197
1198
1199 static void ican3_handle_nmtsind(struct ican3_dev *mod, struct ican3_msg *msg)
1200 {
1201 u16 subspec;
1202
1203 subspec = msg->data[0] + msg->data[1] * 0x100;
1204 if (subspec == NMTS_SLAVE_EVENT_IND) {
1205 switch (msg->data[2]) {
1206 case NE_LOCAL_OCCURRED:
1207 case NE_LOCAL_RESOLVED:
1208
1209
1210
1211 le16_add_cpu(&msg->len, -3);
1212 memmove(msg->data, msg->data + 3, le16_to_cpu(msg->len));
1213 ican3_handle_cevtind(mod, msg);
1214 break;
1215 case NE_REMOTE_OCCURRED:
1216 case NE_REMOTE_RESOLVED:
1217
1218 break;
1219 default:
1220 netdev_warn(mod->ndev, "unknown NMTS event indication %x\n",
1221 msg->data[2]);
1222 break;
1223 }
1224 } else if (subspec == NMTS_SLAVE_STATE_IND) {
1225
1226 } else {
1227 netdev_warn(mod->ndev, "unhandled NMTS indication %x\n",
1228 subspec);
1229 return;
1230 }
1231 }
1232
1233 static void ican3_handle_unknown_message(struct ican3_dev *mod,
1234 struct ican3_msg *msg)
1235 {
1236 netdev_warn(mod->ndev, "received unknown message: spec 0x%.2x length %d\n",
1237 msg->spec, le16_to_cpu(msg->len));
1238 }
1239
1240
1241
1242
1243 static void ican3_handle_message(struct ican3_dev *mod, struct ican3_msg *msg)
1244 {
1245 netdev_dbg(mod->ndev, "%s: modno %d spec 0x%.2x len %d bytes\n", __func__,
1246 mod->num, msg->spec, le16_to_cpu(msg->len));
1247
1248 switch (msg->spec) {
1249 case MSG_IDVERS:
1250 ican3_handle_idvers(mod, msg);
1251 break;
1252 case MSG_MSGLOST:
1253 case MSG_FMSGLOST:
1254 ican3_handle_msglost(mod, msg);
1255 break;
1256 case MSG_CEVTIND:
1257 ican3_handle_cevtind(mod, msg);
1258 break;
1259 case MSG_INQUIRY:
1260 ican3_handle_inquiry(mod, msg);
1261 break;
1262 case MSG_NMTS:
1263 ican3_handle_nmtsind(mod, msg);
1264 break;
1265 default:
1266 ican3_handle_unknown_message(mod, msg);
1267 break;
1268 }
1269 }
1270
1271
1272
1273
1274
1275 static void ican3_put_echo_skb(struct ican3_dev *mod, struct sk_buff *skb)
1276 {
1277 skb = can_create_echo_skb(skb);
1278 if (!skb)
1279 return;
1280
1281 skb_tx_timestamp(skb);
1282
1283
1284 skb_queue_tail(&mod->echoq, skb);
1285 }
1286
1287 static unsigned int ican3_get_echo_skb(struct ican3_dev *mod)
1288 {
1289 struct sk_buff *skb = skb_dequeue(&mod->echoq);
1290 struct can_frame *cf;
1291 u8 dlc = 0;
1292
1293
1294 if (!skb) {
1295 netdev_err(mod->ndev, "BUG: echo skb not occupied\n");
1296 return 0;
1297 }
1298
1299 cf = (struct can_frame *)skb->data;
1300 if (!(cf->can_id & CAN_RTR_FLAG))
1301 dlc = cf->len;
1302
1303
1304 if (skb->pkt_type != PACKET_LOOPBACK) {
1305 kfree_skb(skb);
1306 return dlc;
1307 }
1308
1309 skb->protocol = htons(ETH_P_CAN);
1310 skb->pkt_type = PACKET_BROADCAST;
1311 skb->ip_summed = CHECKSUM_UNNECESSARY;
1312 skb->dev = mod->ndev;
1313 netif_receive_skb(skb);
1314 return dlc;
1315 }
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326 static bool ican3_echo_skb_matches(struct ican3_dev *mod, struct sk_buff *skb)
1327 {
1328 struct can_frame *cf = (struct can_frame *)skb->data;
1329 struct sk_buff *echo_skb = skb_peek(&mod->echoq);
1330 struct can_frame *echo_cf;
1331
1332 if (!echo_skb)
1333 return false;
1334
1335 echo_cf = (struct can_frame *)echo_skb->data;
1336 if (cf->can_id != echo_cf->can_id)
1337 return false;
1338
1339 if (cf->len != echo_cf->len)
1340 return false;
1341
1342 return memcmp(cf->data, echo_cf->data, cf->len) == 0;
1343 }
1344
1345
1346
1347
1348
1349
1350 static bool ican3_txok(struct ican3_dev *mod)
1351 {
1352 struct ican3_fast_desc __iomem *desc;
1353 u8 control;
1354
1355
1356 if (skb_queue_len(&mod->echoq) >= ICAN3_TX_BUFFERS)
1357 return false;
1358
1359
1360 ican3_set_page(mod, mod->fasttx_start + (mod->fasttx_num / 16));
1361 desc = mod->dpm + ((mod->fasttx_num % 16) * sizeof(*desc));
1362 control = ioread8(&desc->control);
1363
1364
1365 if (!(control & DESC_VALID))
1366 return false;
1367
1368 return true;
1369 }
1370
1371
1372
1373
1374
1375
1376 static int ican3_recv_skb(struct ican3_dev *mod)
1377 {
1378 struct net_device *ndev = mod->ndev;
1379 struct net_device_stats *stats = &ndev->stats;
1380 struct ican3_fast_desc desc;
1381 void __iomem *desc_addr;
1382 struct can_frame *cf;
1383 struct sk_buff *skb;
1384 unsigned long flags;
1385
1386 spin_lock_irqsave(&mod->lock, flags);
1387
1388
1389 ican3_set_page(mod, mod->fastrx_start + (mod->fastrx_num / 16));
1390 desc_addr = mod->dpm + ((mod->fastrx_num % 16) * sizeof(desc));
1391 memcpy_fromio(&desc, desc_addr, sizeof(desc));
1392
1393 spin_unlock_irqrestore(&mod->lock, flags);
1394
1395
1396 if (!(desc.control & DESC_VALID))
1397 return -ENOBUFS;
1398
1399
1400 skb = alloc_can_skb(ndev, &cf);
1401 if (unlikely(skb == NULL)) {
1402 stats->rx_dropped++;
1403 goto err_noalloc;
1404 }
1405
1406
1407 ican3_to_can_frame(mod, &desc, cf);
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419 if (ican3_echo_skb_matches(mod, skb)) {
1420 stats->tx_packets++;
1421 stats->tx_bytes += ican3_get_echo_skb(mod);
1422 kfree_skb(skb);
1423 goto err_noalloc;
1424 }
1425
1426
1427 stats->rx_packets++;
1428 if (!(cf->can_id & CAN_RTR_FLAG))
1429 stats->rx_bytes += cf->len;
1430 netif_receive_skb(skb);
1431
1432 err_noalloc:
1433
1434 desc.control ^= DESC_VALID;
1435
1436 spin_lock_irqsave(&mod->lock, flags);
1437
1438 ican3_set_page(mod, mod->fastrx_start + (mod->fastrx_num / 16));
1439 memcpy_toio(desc_addr, &desc, 1);
1440
1441
1442 mod->fastrx_num = (desc.control & DESC_WRAP) ? 0
1443 : (mod->fastrx_num + 1);
1444
1445
1446 spin_unlock_irqrestore(&mod->lock, flags);
1447 return 0;
1448 }
1449
1450 static int ican3_napi(struct napi_struct *napi, int budget)
1451 {
1452 struct ican3_dev *mod = container_of(napi, struct ican3_dev, napi);
1453 unsigned long flags;
1454 int received = 0;
1455 int ret;
1456
1457
1458 while (true) {
1459 struct ican3_msg msg;
1460 ret = ican3_recv_msg(mod, &msg);
1461 if (ret)
1462 break;
1463
1464 ican3_handle_message(mod, &msg);
1465 }
1466
1467
1468 while (received < budget) {
1469 ret = ican3_recv_skb(mod);
1470 if (ret)
1471 break;
1472
1473 received++;
1474 }
1475
1476
1477
1478 if (received < budget)
1479 napi_complete_done(napi, received);
1480
1481 spin_lock_irqsave(&mod->lock, flags);
1482
1483
1484 if (netif_queue_stopped(mod->ndev) && ican3_txok(mod))
1485 netif_wake_queue(mod->ndev);
1486
1487 spin_unlock_irqrestore(&mod->lock, flags);
1488
1489
1490 iowrite8(1 << mod->num, &mod->ctrl->int_enable);
1491 return received;
1492 }
1493
1494 static irqreturn_t ican3_irq(int irq, void *dev_id)
1495 {
1496 struct ican3_dev *mod = dev_id;
1497 u8 stat;
1498
1499
1500
1501
1502
1503 stat = ioread8(&mod->ctrl->int_disable) & (1 << mod->num);
1504 if (stat == (1 << mod->num))
1505 return IRQ_NONE;
1506
1507
1508 ioread8(&mod->dpmctrl->interrupt);
1509
1510
1511 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1512 napi_schedule(&mod->napi);
1513 return IRQ_HANDLED;
1514 }
1515
1516
1517
1518
1519
1520
1521
1522
1523
1524
1525 static int ican3_reset_module(struct ican3_dev *mod)
1526 {
1527 unsigned long start;
1528 u8 runold, runnew;
1529
1530
1531 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1532
1533
1534 mod->free_page = DPM_FREE_START;
1535
1536 ican3_set_page(mod, QUEUE_OLD_CONTROL);
1537 runold = ioread8(mod->dpm + TARGET_RUNNING);
1538
1539
1540 iowrite8(0x00, &mod->dpmctrl->hwreset);
1541
1542
1543 start = jiffies;
1544 do {
1545 ican3_set_page(mod, QUEUE_OLD_CONTROL);
1546 runnew = ioread8(mod->dpm + TARGET_RUNNING);
1547 if (runnew == (runold ^ 0xff))
1548 return 0;
1549
1550 msleep(10);
1551 } while (time_before(jiffies, start + HZ / 2));
1552
1553 netdev_err(mod->ndev, "failed to reset CAN module\n");
1554 return -ETIMEDOUT;
1555 }
1556
1557 static void ican3_shutdown_module(struct ican3_dev *mod)
1558 {
1559 ican3_msg_disconnect(mod);
1560 ican3_reset_module(mod);
1561 }
1562
1563
1564
1565
1566 static int ican3_startup_module(struct ican3_dev *mod)
1567 {
1568 int ret;
1569
1570 ret = ican3_reset_module(mod);
1571 if (ret) {
1572 netdev_err(mod->ndev, "unable to reset module\n");
1573 return ret;
1574 }
1575
1576
1577 memcpy_fromio(mod->fwinfo, mod->dpm + FIRMWARE_STAMP, sizeof(mod->fwinfo) - 1);
1578 if (strncmp(mod->fwinfo, "JANZ-ICAN3", 10)) {
1579 netdev_err(mod->ndev, "ICAN3 not detected (found %s)\n", mod->fwinfo);
1580 return -ENODEV;
1581 }
1582 if (strstr(mod->fwinfo, "CAL/CANopen"))
1583 mod->fwtype = ICAN3_FWTYPE_CAL_CANOPEN;
1584 else
1585 mod->fwtype = ICAN3_FWTYPE_ICANOS;
1586
1587
1588 iowrite8(1 << mod->num, &mod->ctrl->int_enable);
1589
1590 ret = ican3_msg_connect(mod);
1591 if (ret) {
1592 netdev_err(mod->ndev, "unable to connect to module\n");
1593 return ret;
1594 }
1595
1596 ican3_init_new_host_interface(mod);
1597 ret = ican3_msg_newhostif(mod);
1598 if (ret) {
1599 netdev_err(mod->ndev, "unable to switch to new-style interface\n");
1600 return ret;
1601 }
1602
1603
1604 ret = ican3_set_termination(mod, true);
1605 if (ret) {
1606 netdev_err(mod->ndev, "unable to enable termination\n");
1607 return ret;
1608 }
1609
1610
1611 ret = ican3_set_buserror(mod, 1);
1612 if (ret) {
1613 netdev_err(mod->ndev, "unable to set bus-error\n");
1614 return ret;
1615 }
1616
1617 ican3_init_fast_host_interface(mod);
1618 ret = ican3_msg_fasthostif(mod);
1619 if (ret) {
1620 netdev_err(mod->ndev, "unable to switch to fast host interface\n");
1621 return ret;
1622 }
1623
1624 ret = ican3_set_id_filter(mod, true);
1625 if (ret) {
1626 netdev_err(mod->ndev, "unable to set acceptance filter\n");
1627 return ret;
1628 }
1629
1630 return 0;
1631 }
1632
1633
1634
1635
1636
1637 static int ican3_open(struct net_device *ndev)
1638 {
1639 struct ican3_dev *mod = netdev_priv(ndev);
1640 int ret;
1641
1642
1643 ret = open_candev(ndev);
1644 if (ret) {
1645 netdev_err(mod->ndev, "unable to start CAN layer\n");
1646 return ret;
1647 }
1648
1649
1650 ret = ican3_set_bus_state(mod, true);
1651 if (ret) {
1652 netdev_err(mod->ndev, "unable to set bus-on\n");
1653 close_candev(ndev);
1654 return ret;
1655 }
1656
1657
1658 mod->can.state = CAN_STATE_ERROR_ACTIVE;
1659 netif_start_queue(ndev);
1660
1661 return 0;
1662 }
1663
1664 static int ican3_stop(struct net_device *ndev)
1665 {
1666 struct ican3_dev *mod = netdev_priv(ndev);
1667 int ret;
1668
1669
1670 netif_stop_queue(ndev);
1671 mod->can.state = CAN_STATE_STOPPED;
1672
1673
1674 ret = ican3_set_bus_state(mod, false);
1675 if (ret) {
1676 netdev_err(mod->ndev, "unable to set bus-off\n");
1677 return ret;
1678 }
1679
1680
1681 skb_queue_purge(&mod->echoq);
1682
1683
1684 close_candev(ndev);
1685 return 0;
1686 }
1687
1688 static netdev_tx_t ican3_xmit(struct sk_buff *skb, struct net_device *ndev)
1689 {
1690 struct ican3_dev *mod = netdev_priv(ndev);
1691 struct can_frame *cf = (struct can_frame *)skb->data;
1692 struct ican3_fast_desc desc;
1693 void __iomem *desc_addr;
1694 unsigned long flags;
1695
1696 if (can_dropped_invalid_skb(ndev, skb))
1697 return NETDEV_TX_OK;
1698
1699 spin_lock_irqsave(&mod->lock, flags);
1700
1701
1702 if (!ican3_txok(mod)) {
1703 netdev_err(mod->ndev, "BUG: no free descriptors\n");
1704 spin_unlock_irqrestore(&mod->lock, flags);
1705 return NETDEV_TX_BUSY;
1706 }
1707
1708
1709 ican3_set_page(mod, mod->fasttx_start + (mod->fasttx_num / 16));
1710 desc_addr = mod->dpm + ((mod->fasttx_num % 16) * sizeof(desc));
1711 memset(&desc, 0, sizeof(desc));
1712 memcpy_fromio(&desc, desc_addr, 1);
1713
1714
1715 can_frame_to_ican3(mod, cf, &desc);
1716
1717
1718
1719
1720
1721
1722
1723 ican3_put_echo_skb(mod, skb);
1724
1725
1726
1727
1728
1729
1730 desc.control |= DESC_IVALID;
1731 memcpy_toio(desc_addr, &desc, sizeof(desc));
1732
1733
1734 iowrite8(0x01, &mod->dpmctrl->interrupt);
1735
1736 desc.control ^= DESC_VALID;
1737 memcpy_toio(desc_addr, &desc, sizeof(desc));
1738
1739
1740 mod->fasttx_num = (desc.control & DESC_WRAP) ? 0
1741 : (mod->fasttx_num + 1);
1742
1743
1744 if (!ican3_txok(mod))
1745 netif_stop_queue(ndev);
1746
1747 spin_unlock_irqrestore(&mod->lock, flags);
1748 return NETDEV_TX_OK;
1749 }
1750
1751 static const struct net_device_ops ican3_netdev_ops = {
1752 .ndo_open = ican3_open,
1753 .ndo_stop = ican3_stop,
1754 .ndo_start_xmit = ican3_xmit,
1755 .ndo_change_mtu = can_change_mtu,
1756 };
1757
1758 static const struct ethtool_ops ican3_ethtool_ops = {
1759 .get_ts_info = ethtool_op_get_ts_info,
1760 };
1761
1762
1763
1764
1765
1766
1767 static const struct can_bittiming_const ican3_bittiming_const = {
1768 .name = DRV_NAME,
1769 .tseg1_min = 1,
1770 .tseg1_max = 16,
1771 .tseg2_min = 1,
1772 .tseg2_max = 8,
1773 .sjw_max = 4,
1774 .brp_min = 1,
1775 .brp_max = 64,
1776 .brp_inc = 1,
1777 };
1778
1779 static int ican3_set_mode(struct net_device *ndev, enum can_mode mode)
1780 {
1781 struct ican3_dev *mod = netdev_priv(ndev);
1782 int ret;
1783
1784 if (mode != CAN_MODE_START)
1785 return -ENOTSUPP;
1786
1787
1788 ret = ican3_set_bus_state(mod, true);
1789 if (ret) {
1790 netdev_err(ndev, "unable to set bus-on\n");
1791 return ret;
1792 }
1793
1794
1795 mod->can.state = CAN_STATE_ERROR_ACTIVE;
1796
1797 if (netif_queue_stopped(ndev))
1798 netif_wake_queue(ndev);
1799
1800 return 0;
1801 }
1802
1803 static int ican3_get_berr_counter(const struct net_device *ndev,
1804 struct can_berr_counter *bec)
1805 {
1806 struct ican3_dev *mod = netdev_priv(ndev);
1807 int ret;
1808
1809 ret = ican3_send_inquiry(mod, INQUIRY_STATUS);
1810 if (ret)
1811 return ret;
1812
1813 if (!wait_for_completion_timeout(&mod->buserror_comp, HZ)) {
1814 netdev_info(mod->ndev, "%s timed out\n", __func__);
1815 return -ETIMEDOUT;
1816 }
1817
1818 bec->rxerr = mod->bec.rxerr;
1819 bec->txerr = mod->bec.txerr;
1820 return 0;
1821 }
1822
1823
1824
1825
1826
1827 static ssize_t termination_show(struct device *dev,
1828 struct device_attribute *attr,
1829 char *buf)
1830 {
1831 struct ican3_dev *mod = netdev_priv(to_net_dev(dev));
1832 int ret;
1833
1834 ret = ican3_send_inquiry(mod, INQUIRY_TERMINATION);
1835 if (ret)
1836 return ret;
1837
1838 if (!wait_for_completion_timeout(&mod->termination_comp, HZ)) {
1839 netdev_info(mod->ndev, "%s timed out\n", __func__);
1840 return -ETIMEDOUT;
1841 }
1842
1843 return sysfs_emit(buf, "%u\n", mod->termination_enabled);
1844 }
1845
1846 static ssize_t termination_store(struct device *dev,
1847 struct device_attribute *attr,
1848 const char *buf, size_t count)
1849 {
1850 struct ican3_dev *mod = netdev_priv(to_net_dev(dev));
1851 unsigned long enable;
1852 int ret;
1853
1854 if (kstrtoul(buf, 0, &enable))
1855 return -EINVAL;
1856
1857 ret = ican3_set_termination(mod, enable);
1858 if (ret)
1859 return ret;
1860
1861 return count;
1862 }
1863
1864 static ssize_t fwinfo_show(struct device *dev,
1865 struct device_attribute *attr,
1866 char *buf)
1867 {
1868 struct ican3_dev *mod = netdev_priv(to_net_dev(dev));
1869
1870 return scnprintf(buf, PAGE_SIZE, "%s\n", mod->fwinfo);
1871 }
1872
1873 static DEVICE_ATTR_RW(termination);
1874 static DEVICE_ATTR_RO(fwinfo);
1875
1876 static struct attribute *ican3_sysfs_attrs[] = {
1877 &dev_attr_termination.attr,
1878 &dev_attr_fwinfo.attr,
1879 NULL,
1880 };
1881
1882 static const struct attribute_group ican3_sysfs_attr_group = {
1883 .attrs = ican3_sysfs_attrs,
1884 };
1885
1886
1887
1888
1889
1890 static int ican3_probe(struct platform_device *pdev)
1891 {
1892 struct janz_platform_data *pdata;
1893 struct net_device *ndev;
1894 struct ican3_dev *mod;
1895 struct resource *res;
1896 struct device *dev;
1897 int ret;
1898
1899 pdata = dev_get_platdata(&pdev->dev);
1900 if (!pdata)
1901 return -ENXIO;
1902
1903 dev_dbg(&pdev->dev, "probe: module number %d\n", pdata->modno);
1904
1905
1906 dev = &pdev->dev;
1907
1908
1909 ndev = alloc_candev(sizeof(*mod), 0);
1910 if (!ndev) {
1911 dev_err(dev, "unable to allocate CANdev\n");
1912 ret = -ENOMEM;
1913 goto out_return;
1914 }
1915
1916 platform_set_drvdata(pdev, ndev);
1917 mod = netdev_priv(ndev);
1918 mod->ndev = ndev;
1919 mod->num = pdata->modno;
1920 netif_napi_add_weight(ndev, &mod->napi, ican3_napi, ICAN3_RX_BUFFERS);
1921 skb_queue_head_init(&mod->echoq);
1922 spin_lock_init(&mod->lock);
1923 init_completion(&mod->termination_comp);
1924 init_completion(&mod->buserror_comp);
1925
1926
1927 ndev->sysfs_groups[0] = &ican3_sysfs_attr_group;
1928
1929
1930 mod->free_page = DPM_FREE_START;
1931
1932 ndev->netdev_ops = &ican3_netdev_ops;
1933 ndev->ethtool_ops = &ican3_ethtool_ops;
1934 ndev->flags |= IFF_ECHO;
1935 SET_NETDEV_DEV(ndev, &pdev->dev);
1936
1937 mod->can.clock.freq = ICAN3_CAN_CLOCK;
1938 mod->can.bittiming_const = &ican3_bittiming_const;
1939 mod->can.do_set_mode = ican3_set_mode;
1940 mod->can.do_get_berr_counter = ican3_get_berr_counter;
1941 mod->can.ctrlmode_supported = CAN_CTRLMODE_3_SAMPLES
1942 | CAN_CTRLMODE_BERR_REPORTING
1943 | CAN_CTRLMODE_ONE_SHOT;
1944
1945
1946 mod->irq = platform_get_irq(pdev, 0);
1947 if (mod->irq < 0) {
1948 ret = -ENODEV;
1949 goto out_free_ndev;
1950 }
1951
1952 ndev->irq = mod->irq;
1953
1954
1955 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1956 if (!res) {
1957 dev_err(dev, "MODULbus registers not found\n");
1958 ret = -ENODEV;
1959 goto out_free_ndev;
1960 }
1961
1962 mod->dpm = ioremap(res->start, resource_size(res));
1963 if (!mod->dpm) {
1964 dev_err(dev, "MODULbus registers not ioremap\n");
1965 ret = -ENOMEM;
1966 goto out_free_ndev;
1967 }
1968
1969 mod->dpmctrl = mod->dpm + DPM_PAGE_SIZE;
1970
1971
1972 res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
1973 if (!res) {
1974 dev_err(dev, "CONTROL registers not found\n");
1975 ret = -ENODEV;
1976 goto out_iounmap_dpm;
1977 }
1978
1979 mod->ctrl = ioremap(res->start, resource_size(res));
1980 if (!mod->ctrl) {
1981 dev_err(dev, "CONTROL registers not ioremap\n");
1982 ret = -ENOMEM;
1983 goto out_iounmap_dpm;
1984 }
1985
1986
1987 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
1988 ret = request_irq(mod->irq, ican3_irq, IRQF_SHARED, DRV_NAME, mod);
1989 if (ret) {
1990 dev_err(dev, "unable to request IRQ\n");
1991 goto out_iounmap_ctrl;
1992 }
1993
1994
1995 napi_enable(&mod->napi);
1996 ret = ican3_startup_module(mod);
1997 if (ret) {
1998 dev_err(dev, "%s: unable to start CANdev\n", __func__);
1999 goto out_free_irq;
2000 }
2001
2002
2003 ret = register_candev(ndev);
2004 if (ret) {
2005 dev_err(dev, "%s: unable to register CANdev\n", __func__);
2006 goto out_free_irq;
2007 }
2008
2009 netdev_info(mod->ndev, "module %d: registered CAN device\n", pdata->modno);
2010 return 0;
2011
2012 out_free_irq:
2013 napi_disable(&mod->napi);
2014 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
2015 free_irq(mod->irq, mod);
2016 out_iounmap_ctrl:
2017 iounmap(mod->ctrl);
2018 out_iounmap_dpm:
2019 iounmap(mod->dpm);
2020 out_free_ndev:
2021 free_candev(ndev);
2022 out_return:
2023 return ret;
2024 }
2025
2026 static int ican3_remove(struct platform_device *pdev)
2027 {
2028 struct net_device *ndev = platform_get_drvdata(pdev);
2029 struct ican3_dev *mod = netdev_priv(ndev);
2030
2031
2032 unregister_netdev(ndev);
2033 napi_disable(&mod->napi);
2034 iowrite8(1 << mod->num, &mod->ctrl->int_disable);
2035 free_irq(mod->irq, mod);
2036
2037
2038 ican3_shutdown_module(mod);
2039
2040
2041 iounmap(mod->ctrl);
2042 iounmap(mod->dpm);
2043
2044 free_candev(ndev);
2045
2046 return 0;
2047 }
2048
2049 static struct platform_driver ican3_driver = {
2050 .driver = {
2051 .name = DRV_NAME,
2052 },
2053 .probe = ican3_probe,
2054 .remove = ican3_remove,
2055 };
2056
2057 module_platform_driver(ican3_driver);
2058
2059 MODULE_AUTHOR("Ira W. Snyder <iws@ovro.caltech.edu>");
2060 MODULE_DESCRIPTION("Janz MODULbus VMOD-ICAN3 Driver");
2061 MODULE_LICENSE("GPL");
2062 MODULE_ALIAS("platform:janz-ican3");