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0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*******************************************************************************
0003  *
0004  * CTU CAN FD IP Core
0005  *
0006  * Copyright (C) 2015-2018 Ondrej Ille <ondrej.ille@gmail.com> FEE CTU
0007  * Copyright (C) 2018-2021 Ondrej Ille <ondrej.ille@gmail.com> self-funded
0008  * Copyright (C) 2018-2019 Martin Jerabek <martin.jerabek01@gmail.com> FEE CTU
0009  * Copyright (C) 2018-2021 Pavel Pisa <pisa@cmp.felk.cvut.cz> FEE CTU/self-funded
0010  *
0011  * Project advisors:
0012  *     Jiri Novak <jnovak@fel.cvut.cz>
0013  *     Pavel Pisa <pisa@cmp.felk.cvut.cz>
0014  *
0015  * Department of Measurement         (http://meas.fel.cvut.cz/)
0016  * Faculty of Electrical Engineering (http://www.fel.cvut.cz)
0017  * Czech Technical University        (http://www.cvut.cz/)
0018  ******************************************************************************/
0019 
0020 /* This file is autogenerated, DO NOT EDIT! */
0021 
0022 #ifndef __CTU_CAN_FD_CAN_FD_FRAME_FORMAT__
0023 #define __CTU_CAN_FD_CAN_FD_FRAME_FORMAT__
0024 
0025 #include <linux/bits.h>
0026 
0027 /* CAN_Frame_format memory map */
0028 enum ctu_can_fd_can_frame_format {
0029     CTUCANFD_FRAME_FORMAT_W       = 0x0,
0030     CTUCANFD_IDENTIFIER_W         = 0x4,
0031     CTUCANFD_TIMESTAMP_L_W        = 0x8,
0032     CTUCANFD_TIMESTAMP_U_W        = 0xc,
0033     CTUCANFD_DATA_1_4_W          = 0x10,
0034     CTUCANFD_DATA_5_8_W          = 0x14,
0035     CTUCANFD_DATA_61_64_W        = 0x4c,
0036 };
0037 
0038 /* CAN_FD_Frame_format memory region */
0039 
0040 /*  FRAME_FORMAT_W registers */
0041 #define REG_FRAME_FORMAT_W_DLC GENMASK(3, 0)
0042 #define REG_FRAME_FORMAT_W_RTR BIT(5)
0043 #define REG_FRAME_FORMAT_W_IDE BIT(6)
0044 #define REG_FRAME_FORMAT_W_FDF BIT(7)
0045 #define REG_FRAME_FORMAT_W_BRS BIT(9)
0046 #define REG_FRAME_FORMAT_W_ESI_RSV BIT(10)
0047 #define REG_FRAME_FORMAT_W_RWCNT GENMASK(15, 11)
0048 
0049 /*  IDENTIFIER_W registers */
0050 #define REG_IDENTIFIER_W_IDENTIFIER_EXT GENMASK(17, 0)
0051 #define REG_IDENTIFIER_W_IDENTIFIER_BASE GENMASK(28, 18)
0052 
0053 /*  TIMESTAMP_L_W registers */
0054 #define REG_TIMESTAMP_L_W_TIME_STAMP_L_W GENMASK(31, 0)
0055 
0056 /*  TIMESTAMP_U_W registers */
0057 #define REG_TIMESTAMP_U_W_TIMESTAMP_U_W GENMASK(31, 0)
0058 
0059 /*  DATA_1_4_W registers */
0060 #define REG_DATA_1_4_W_DATA_1 GENMASK(7, 0)
0061 #define REG_DATA_1_4_W_DATA_2 GENMASK(15, 8)
0062 #define REG_DATA_1_4_W_DATA_3 GENMASK(23, 16)
0063 #define REG_DATA_1_4_W_DATA_4 GENMASK(31, 24)
0064 
0065 /*  DATA_5_8_W registers */
0066 #define REG_DATA_5_8_W_DATA_5 GENMASK(7, 0)
0067 #define REG_DATA_5_8_W_DATA_6 GENMASK(15, 8)
0068 #define REG_DATA_5_8_W_DATA_7 GENMASK(23, 16)
0069 #define REG_DATA_5_8_W_DATA_8 GENMASK(31, 24)
0070 
0071 /*  DATA_61_64_W registers */
0072 #define REG_DATA_61_64_W_DATA_61 GENMASK(7, 0)
0073 #define REG_DATA_61_64_W_DATA_62 GENMASK(15, 8)
0074 #define REG_DATA_61_64_W_DATA_63 GENMASK(23, 16)
0075 #define REG_DATA_61_64_W_DATA_64 GENMASK(31, 24)
0076 
0077 #endif