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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*******************************************************************************
0003  *
0004  * CTU CAN FD IP Core
0005  *
0006  * Copyright (C) 2015-2018 Ondrej Ille <ondrej.ille@gmail.com> FEE CTU
0007  * Copyright (C) 2018-2021 Ondrej Ille <ondrej.ille@gmail.com> self-funded
0008  * Copyright (C) 2018-2019 Martin Jerabek <martin.jerabek01@gmail.com> FEE CTU
0009  * Copyright (C) 2018-2022 Pavel Pisa <pisa@cmp.felk.cvut.cz> FEE CTU/self-funded
0010  *
0011  * Project advisors:
0012  *     Jiri Novak <jnovak@fel.cvut.cz>
0013  *     Pavel Pisa <pisa@cmp.felk.cvut.cz>
0014  *
0015  * Department of Measurement         (http://meas.fel.cvut.cz/)
0016  * Faculty of Electrical Engineering (http://www.fel.cvut.cz)
0017  * Czech Technical University        (http://www.cvut.cz/)
0018  ******************************************************************************/
0019 
0020 #include <linux/clk.h>
0021 #include <linux/errno.h>
0022 #include <linux/ethtool.h>
0023 #include <linux/init.h>
0024 #include <linux/bitfield.h>
0025 #include <linux/interrupt.h>
0026 #include <linux/io.h>
0027 #include <linux/kernel.h>
0028 #include <linux/module.h>
0029 #include <linux/skbuff.h>
0030 #include <linux/string.h>
0031 #include <linux/types.h>
0032 #include <linux/can/error.h>
0033 #include <linux/pm_runtime.h>
0034 
0035 #include "ctucanfd.h"
0036 #include "ctucanfd_kregs.h"
0037 #include "ctucanfd_kframe.h"
0038 
0039 #ifdef DEBUG
0040 #define  ctucan_netdev_dbg(ndev, args...) \
0041         netdev_dbg(ndev, args)
0042 #else
0043 #define ctucan_netdev_dbg(...) do { } while (0)
0044 #endif
0045 
0046 #define CTUCANFD_ID 0xCAFD
0047 
0048 /* TX buffer rotation:
0049  * - when a buffer transitions to empty state, rotate order and priorities
0050  * - if more buffers seem to transition at the same time, rotate by the number of buffers
0051  * - it may be assumed that buffers transition to empty state in FIFO order (because we manage
0052  *   priorities that way)
0053  * - at frame filling, do not rotate anything, just increment buffer modulo counter
0054  */
0055 
0056 #define CTUCANFD_FLAG_RX_FFW_BUFFERED   1
0057 
0058 #define CTUCAN_STATE_TO_TEXT_ENTRY(st) \
0059         [st] = #st
0060 
0061 enum ctucan_txtb_status {
0062     TXT_NOT_EXIST       = 0x0,
0063     TXT_RDY             = 0x1,
0064     TXT_TRAN            = 0x2,
0065     TXT_ABTP            = 0x3,
0066     TXT_TOK             = 0x4,
0067     TXT_ERR             = 0x6,
0068     TXT_ABT             = 0x7,
0069     TXT_ETY             = 0x8,
0070 };
0071 
0072 enum ctucan_txtb_command {
0073     TXT_CMD_SET_EMPTY   = 0x01,
0074     TXT_CMD_SET_READY   = 0x02,
0075     TXT_CMD_SET_ABORT   = 0x04
0076 };
0077 
0078 static const struct can_bittiming_const ctu_can_fd_bit_timing_max = {
0079     .name = "ctu_can_fd",
0080     .tseg1_min = 2,
0081     .tseg1_max = 190,
0082     .tseg2_min = 1,
0083     .tseg2_max = 63,
0084     .sjw_max = 31,
0085     .brp_min = 1,
0086     .brp_max = 8,
0087     .brp_inc = 1,
0088 };
0089 
0090 static const struct can_bittiming_const ctu_can_fd_bit_timing_data_max = {
0091     .name = "ctu_can_fd",
0092     .tseg1_min = 2,
0093     .tseg1_max = 94,
0094     .tseg2_min = 1,
0095     .tseg2_max = 31,
0096     .sjw_max = 31,
0097     .brp_min = 1,
0098     .brp_max = 2,
0099     .brp_inc = 1,
0100 };
0101 
0102 static const char * const ctucan_state_strings[CAN_STATE_MAX] = {
0103     CTUCAN_STATE_TO_TEXT_ENTRY(CAN_STATE_ERROR_ACTIVE),
0104     CTUCAN_STATE_TO_TEXT_ENTRY(CAN_STATE_ERROR_WARNING),
0105     CTUCAN_STATE_TO_TEXT_ENTRY(CAN_STATE_ERROR_PASSIVE),
0106     CTUCAN_STATE_TO_TEXT_ENTRY(CAN_STATE_BUS_OFF),
0107     CTUCAN_STATE_TO_TEXT_ENTRY(CAN_STATE_STOPPED),
0108     CTUCAN_STATE_TO_TEXT_ENTRY(CAN_STATE_SLEEPING)
0109 };
0110 
0111 static void ctucan_write32_le(struct ctucan_priv *priv,
0112                   enum ctu_can_fd_can_registers reg, u32 val)
0113 {
0114     iowrite32(val, priv->mem_base + reg);
0115 }
0116 
0117 static void ctucan_write32_be(struct ctucan_priv *priv,
0118                   enum ctu_can_fd_can_registers reg, u32 val)
0119 {
0120     iowrite32be(val, priv->mem_base + reg);
0121 }
0122 
0123 static u32 ctucan_read32_le(struct ctucan_priv *priv,
0124                 enum ctu_can_fd_can_registers reg)
0125 {
0126     return ioread32(priv->mem_base + reg);
0127 }
0128 
0129 static u32 ctucan_read32_be(struct ctucan_priv *priv,
0130                 enum ctu_can_fd_can_registers reg)
0131 {
0132     return ioread32be(priv->mem_base + reg);
0133 }
0134 
0135 static void ctucan_write32(struct ctucan_priv *priv, enum ctu_can_fd_can_registers reg, u32 val)
0136 {
0137     priv->write_reg(priv, reg, val);
0138 }
0139 
0140 static u32 ctucan_read32(struct ctucan_priv *priv, enum ctu_can_fd_can_registers reg)
0141 {
0142     return priv->read_reg(priv, reg);
0143 }
0144 
0145 static void ctucan_write_txt_buf(struct ctucan_priv *priv, enum ctu_can_fd_can_registers buf_base,
0146                  u32 offset, u32 val)
0147 {
0148     priv->write_reg(priv, buf_base + offset, val);
0149 }
0150 
0151 #define CTU_CAN_FD_TXTNF(priv) (!!FIELD_GET(REG_STATUS_TXNF, ctucan_read32(priv, CTUCANFD_STATUS)))
0152 #define CTU_CAN_FD_ENABLED(priv) (!!FIELD_GET(REG_MODE_ENA, ctucan_read32(priv, CTUCANFD_MODE)))
0153 
0154 /**
0155  * ctucan_state_to_str() - Converts CAN controller state code to corresponding text
0156  * @state:  CAN controller state code
0157  *
0158  * Return: Pointer to string representation of the error state
0159  */
0160 static const char *ctucan_state_to_str(enum can_state state)
0161 {
0162     const char *txt = NULL;
0163 
0164     if (state >= 0 && state < CAN_STATE_MAX)
0165         txt = ctucan_state_strings[state];
0166     return txt ? txt : "UNKNOWN";
0167 }
0168 
0169 /**
0170  * ctucan_reset() - Issues software reset request to CTU CAN FD
0171  * @ndev:   Pointer to net_device structure
0172  *
0173  * Return: 0 for success, -%ETIMEDOUT if CAN controller does not leave reset
0174  */
0175 static int ctucan_reset(struct net_device *ndev)
0176 {
0177     struct ctucan_priv *priv = netdev_priv(ndev);
0178     int i = 100;
0179 
0180     ctucan_write32(priv, CTUCANFD_MODE, REG_MODE_RST);
0181     clear_bit(CTUCANFD_FLAG_RX_FFW_BUFFERED, &priv->drv_flags);
0182 
0183     do {
0184         u16 device_id = FIELD_GET(REG_DEVICE_ID_DEVICE_ID,
0185                       ctucan_read32(priv, CTUCANFD_DEVICE_ID));
0186 
0187         if (device_id == 0xCAFD)
0188             return 0;
0189         if (!i--) {
0190             netdev_warn(ndev, "device did not leave reset\n");
0191             return -ETIMEDOUT;
0192         }
0193         usleep_range(100, 200);
0194     } while (1);
0195 }
0196 
0197 /**
0198  * ctucan_set_btr() - Sets CAN bus bit timing in CTU CAN FD
0199  * @ndev:   Pointer to net_device structure
0200  * @bt:     Pointer to Bit timing structure
0201  * @nominal:    True - Nominal bit timing, False - Data bit timing
0202  *
0203  * Return: 0 - OK, -%EPERM if controller is enabled
0204  */
0205 static int ctucan_set_btr(struct net_device *ndev, struct can_bittiming *bt, bool nominal)
0206 {
0207     struct ctucan_priv *priv = netdev_priv(ndev);
0208     int max_ph1_len = 31;
0209     u32 btr = 0;
0210     u32 prop_seg = bt->prop_seg;
0211     u32 phase_seg1 = bt->phase_seg1;
0212 
0213     if (CTU_CAN_FD_ENABLED(priv)) {
0214         netdev_err(ndev, "BUG! Cannot set bittiming - CAN is enabled\n");
0215         return -EPERM;
0216     }
0217 
0218     if (nominal)
0219         max_ph1_len = 63;
0220 
0221     /* The timing calculation functions have only constraints on tseg1, which is prop_seg +
0222      * phase1_seg combined. tseg1 is then split in half and stored into prog_seg and phase_seg1.
0223      * In CTU CAN FD, PROP is 6/7 bits wide but PH1 only 6/5, so we must re-distribute the
0224      * values here.
0225      */
0226     if (phase_seg1 > max_ph1_len) {
0227         prop_seg += phase_seg1 - max_ph1_len;
0228         phase_seg1 = max_ph1_len;
0229         bt->prop_seg = prop_seg;
0230         bt->phase_seg1 = phase_seg1;
0231     }
0232 
0233     if (nominal) {
0234         btr = FIELD_PREP(REG_BTR_PROP, prop_seg);
0235         btr |= FIELD_PREP(REG_BTR_PH1, phase_seg1);
0236         btr |= FIELD_PREP(REG_BTR_PH2, bt->phase_seg2);
0237         btr |= FIELD_PREP(REG_BTR_BRP, bt->brp);
0238         btr |= FIELD_PREP(REG_BTR_SJW, bt->sjw);
0239 
0240         ctucan_write32(priv, CTUCANFD_BTR, btr);
0241     } else {
0242         btr = FIELD_PREP(REG_BTR_FD_PROP_FD, prop_seg);
0243         btr |= FIELD_PREP(REG_BTR_FD_PH1_FD, phase_seg1);
0244         btr |= FIELD_PREP(REG_BTR_FD_PH2_FD, bt->phase_seg2);
0245         btr |= FIELD_PREP(REG_BTR_FD_BRP_FD, bt->brp);
0246         btr |= FIELD_PREP(REG_BTR_FD_SJW_FD, bt->sjw);
0247 
0248         ctucan_write32(priv, CTUCANFD_BTR_FD, btr);
0249     }
0250 
0251     return 0;
0252 }
0253 
0254 /**
0255  * ctucan_set_bittiming() - CAN set nominal bit timing routine
0256  * @ndev:   Pointer to net_device structure
0257  *
0258  * Return: 0 on success, -%EPERM on error
0259  */
0260 static int ctucan_set_bittiming(struct net_device *ndev)
0261 {
0262     struct ctucan_priv *priv = netdev_priv(ndev);
0263     struct can_bittiming *bt = &priv->can.bittiming;
0264 
0265     /* Note that bt may be modified here */
0266     return ctucan_set_btr(ndev, bt, true);
0267 }
0268 
0269 /**
0270  * ctucan_set_data_bittiming() - CAN set data bit timing routine
0271  * @ndev:   Pointer to net_device structure
0272  *
0273  * Return: 0 on success, -%EPERM on error
0274  */
0275 static int ctucan_set_data_bittiming(struct net_device *ndev)
0276 {
0277     struct ctucan_priv *priv = netdev_priv(ndev);
0278     struct can_bittiming *dbt = &priv->can.data_bittiming;
0279 
0280     /* Note that dbt may be modified here */
0281     return ctucan_set_btr(ndev, dbt, false);
0282 }
0283 
0284 /**
0285  * ctucan_set_secondary_sample_point() - Sets secondary sample point in CTU CAN FD
0286  * @ndev:   Pointer to net_device structure
0287  *
0288  * Return: 0 on success, -%EPERM if controller is enabled
0289  */
0290 static int ctucan_set_secondary_sample_point(struct net_device *ndev)
0291 {
0292     struct ctucan_priv *priv = netdev_priv(ndev);
0293     struct can_bittiming *dbt = &priv->can.data_bittiming;
0294     int ssp_offset = 0;
0295     u32 ssp_cfg = 0; /* No SSP by default */
0296 
0297     if (CTU_CAN_FD_ENABLED(priv)) {
0298         netdev_err(ndev, "BUG! Cannot set SSP - CAN is enabled\n");
0299         return -EPERM;
0300     }
0301 
0302     /* Use SSP for bit-rates above 1 Mbits/s */
0303     if (dbt->bitrate > 1000000) {
0304         /* Calculate SSP in minimal time quanta */
0305         ssp_offset = (priv->can.clock.freq / 1000) * dbt->sample_point / dbt->bitrate;
0306 
0307         if (ssp_offset > 127) {
0308             netdev_warn(ndev, "SSP offset saturated to 127\n");
0309             ssp_offset = 127;
0310         }
0311 
0312         ssp_cfg = FIELD_PREP(REG_TRV_DELAY_SSP_OFFSET, ssp_offset);
0313         ssp_cfg |= FIELD_PREP(REG_TRV_DELAY_SSP_SRC, 0x1);
0314     }
0315 
0316     ctucan_write32(priv, CTUCANFD_TRV_DELAY, ssp_cfg);
0317 
0318     return 0;
0319 }
0320 
0321 /**
0322  * ctucan_set_mode() - Sets CTU CAN FDs mode
0323  * @priv:   Pointer to private data
0324  * @mode:   Pointer to controller modes to be set
0325  */
0326 static void ctucan_set_mode(struct ctucan_priv *priv, const struct can_ctrlmode *mode)
0327 {
0328     u32 mode_reg = ctucan_read32(priv, CTUCANFD_MODE);
0329 
0330     mode_reg = (mode->flags & CAN_CTRLMODE_LOOPBACK) ?
0331             (mode_reg | REG_MODE_ILBP) :
0332             (mode_reg & ~REG_MODE_ILBP);
0333 
0334     mode_reg = (mode->flags & CAN_CTRLMODE_LISTENONLY) ?
0335             (mode_reg | REG_MODE_BMM) :
0336             (mode_reg & ~REG_MODE_BMM);
0337 
0338     mode_reg = (mode->flags & CAN_CTRLMODE_FD) ?
0339             (mode_reg | REG_MODE_FDE) :
0340             (mode_reg & ~REG_MODE_FDE);
0341 
0342     mode_reg = (mode->flags & CAN_CTRLMODE_PRESUME_ACK) ?
0343             (mode_reg | REG_MODE_ACF) :
0344             (mode_reg & ~REG_MODE_ACF);
0345 
0346     mode_reg = (mode->flags & CAN_CTRLMODE_FD_NON_ISO) ?
0347             (mode_reg | REG_MODE_NISOFD) :
0348             (mode_reg & ~REG_MODE_NISOFD);
0349 
0350     /* One shot mode supported indirectly via Retransmit limit */
0351     mode_reg &= ~FIELD_PREP(REG_MODE_RTRTH, 0xF);
0352     mode_reg = (mode->flags & CAN_CTRLMODE_ONE_SHOT) ?
0353             (mode_reg | REG_MODE_RTRLE) :
0354             (mode_reg & ~REG_MODE_RTRLE);
0355 
0356     /* Some bits fixed:
0357      *   TSTM  - Off, User shall not be able to change REC/TEC by hand during operation
0358      */
0359     mode_reg &= ~REG_MODE_TSTM;
0360 
0361     ctucan_write32(priv, CTUCANFD_MODE, mode_reg);
0362 }
0363 
0364 /**
0365  * ctucan_chip_start() - This routine starts the driver
0366  * @ndev:   Pointer to net_device structure
0367  *
0368  * Routine expects that chip is in reset state. It setups initial
0369  * Tx buffers for FIFO priorities, sets bittiming, enables interrupts,
0370  * switches core to operational mode and changes controller
0371  * state to %CAN_STATE_STOPPED.
0372  *
0373  * Return: 0 on success and failure value on error
0374  */
0375 static int ctucan_chip_start(struct net_device *ndev)
0376 {
0377     struct ctucan_priv *priv = netdev_priv(ndev);
0378     u32 int_ena, int_msk;
0379     u32 mode_reg;
0380     int err;
0381     struct can_ctrlmode mode;
0382 
0383     priv->txb_prio = 0x01234567;
0384     priv->txb_head = 0;
0385     priv->txb_tail = 0;
0386     ctucan_write32(priv, CTUCANFD_TX_PRIORITY, priv->txb_prio);
0387 
0388     /* Configure bit-rates and ssp */
0389     err = ctucan_set_bittiming(ndev);
0390     if (err < 0)
0391         return err;
0392 
0393     err = ctucan_set_data_bittiming(ndev);
0394     if (err < 0)
0395         return err;
0396 
0397     err = ctucan_set_secondary_sample_point(ndev);
0398     if (err < 0)
0399         return err;
0400 
0401     /* Configure modes */
0402     mode.flags = priv->can.ctrlmode;
0403     mode.mask = 0xFFFFFFFF;
0404     ctucan_set_mode(priv, &mode);
0405 
0406     /* Configure interrupts */
0407     int_ena = REG_INT_STAT_RBNEI |
0408           REG_INT_STAT_TXBHCI |
0409           REG_INT_STAT_EWLI |
0410           REG_INT_STAT_FCSI;
0411 
0412     /* Bus error reporting -> Allow Error/Arb.lost interrupts */
0413     if (priv->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING) {
0414         int_ena |= REG_INT_STAT_ALI |
0415                REG_INT_STAT_BEI;
0416     }
0417 
0418     int_msk = ~int_ena; /* Mask all disabled interrupts */
0419 
0420     /* It's after reset, so there is no need to clear anything */
0421     ctucan_write32(priv, CTUCANFD_INT_MASK_SET, int_msk);
0422     ctucan_write32(priv, CTUCANFD_INT_ENA_SET, int_ena);
0423 
0424     /* Controller enters ERROR_ACTIVE on initial FCSI */
0425     priv->can.state = CAN_STATE_STOPPED;
0426 
0427     /* Enable the controller */
0428     mode_reg = ctucan_read32(priv, CTUCANFD_MODE);
0429     mode_reg |= REG_MODE_ENA;
0430     ctucan_write32(priv, CTUCANFD_MODE, mode_reg);
0431 
0432     return 0;
0433 }
0434 
0435 /**
0436  * ctucan_do_set_mode() - Sets mode of the driver
0437  * @ndev:   Pointer to net_device structure
0438  * @mode:   Tells the mode of the driver
0439  *
0440  * This check the drivers state and calls the corresponding modes to set.
0441  *
0442  * Return: 0 on success and failure value on error
0443  */
0444 static int ctucan_do_set_mode(struct net_device *ndev, enum can_mode mode)
0445 {
0446     int ret;
0447 
0448     switch (mode) {
0449     case CAN_MODE_START:
0450         ret = ctucan_reset(ndev);
0451         if (ret < 0)
0452             return ret;
0453         ret = ctucan_chip_start(ndev);
0454         if (ret < 0) {
0455             netdev_err(ndev, "ctucan_chip_start failed!\n");
0456             return ret;
0457         }
0458         netif_wake_queue(ndev);
0459         break;
0460     default:
0461         ret = -EOPNOTSUPP;
0462         break;
0463     }
0464 
0465     return ret;
0466 }
0467 
0468 /**
0469  * ctucan_get_tx_status() - Gets status of TXT buffer
0470  * @priv:   Pointer to private data
0471  * @buf:    Buffer index (0-based)
0472  *
0473  * Return: Status of TXT buffer
0474  */
0475 static enum ctucan_txtb_status ctucan_get_tx_status(struct ctucan_priv *priv, u8 buf)
0476 {
0477     u32 tx_status = ctucan_read32(priv, CTUCANFD_TX_STATUS);
0478     enum ctucan_txtb_status status = (tx_status >> (buf * 4)) & 0x7;
0479 
0480     return status;
0481 }
0482 
0483 /**
0484  * ctucan_is_txt_buf_writable() - Checks if frame can be inserted to TXT Buffer
0485  * @priv:   Pointer to private data
0486  * @buf:    Buffer index (0-based)
0487  *
0488  * Return: True - Frame can be inserted to TXT Buffer, False - If attempted, frame will not be
0489  *     inserted to TXT Buffer
0490  */
0491 static bool ctucan_is_txt_buf_writable(struct ctucan_priv *priv, u8 buf)
0492 {
0493     enum ctucan_txtb_status buf_status;
0494 
0495     buf_status = ctucan_get_tx_status(priv, buf);
0496     if (buf_status == TXT_RDY || buf_status == TXT_TRAN || buf_status == TXT_ABTP)
0497         return false;
0498 
0499     return true;
0500 }
0501 
0502 /**
0503  * ctucan_insert_frame() - Inserts frame to TXT buffer
0504  * @priv:   Pointer to private data
0505  * @cf:     Pointer to CAN frame to be inserted
0506  * @buf:    TXT Buffer index to which frame is inserted (0-based)
0507  * @isfdf:  True - CAN FD Frame, False - CAN 2.0 Frame
0508  *
0509  * Return: True - Frame inserted successfully
0510  *     False - Frame was not inserted due to one of:
0511  *          1. TXT Buffer is not writable (it is in wrong state)
0512  *          2. Invalid TXT buffer index
0513  *          3. Invalid frame length
0514  */
0515 static bool ctucan_insert_frame(struct ctucan_priv *priv, const struct canfd_frame *cf, u8 buf,
0516                 bool isfdf)
0517 {
0518     u32 buf_base;
0519     u32 ffw = 0;
0520     u32 idw = 0;
0521     unsigned int i;
0522 
0523     if (buf >= priv->ntxbufs)
0524         return false;
0525 
0526     if (!ctucan_is_txt_buf_writable(priv, buf))
0527         return false;
0528 
0529     if (cf->len > CANFD_MAX_DLEN)
0530         return false;
0531 
0532     /* Prepare Frame format */
0533     if (cf->can_id & CAN_RTR_FLAG)
0534         ffw |= REG_FRAME_FORMAT_W_RTR;
0535 
0536     if (cf->can_id & CAN_EFF_FLAG)
0537         ffw |= REG_FRAME_FORMAT_W_IDE;
0538 
0539     if (isfdf) {
0540         ffw |= REG_FRAME_FORMAT_W_FDF;
0541         if (cf->flags & CANFD_BRS)
0542             ffw |= REG_FRAME_FORMAT_W_BRS;
0543     }
0544 
0545     ffw |= FIELD_PREP(REG_FRAME_FORMAT_W_DLC, can_fd_len2dlc(cf->len));
0546 
0547     /* Prepare identifier */
0548     if (cf->can_id & CAN_EFF_FLAG)
0549         idw = cf->can_id & CAN_EFF_MASK;
0550     else
0551         idw = FIELD_PREP(REG_IDENTIFIER_W_IDENTIFIER_BASE, cf->can_id & CAN_SFF_MASK);
0552 
0553     /* Write ID, Frame format, Don't write timestamp -> Time triggered transmission disabled */
0554     buf_base = (buf + 1) * 0x100;
0555     ctucan_write_txt_buf(priv, buf_base, CTUCANFD_FRAME_FORMAT_W, ffw);
0556     ctucan_write_txt_buf(priv, buf_base, CTUCANFD_IDENTIFIER_W, idw);
0557 
0558     /* Write Data payload */
0559     if (!(cf->can_id & CAN_RTR_FLAG)) {
0560         for (i = 0; i < cf->len; i += 4) {
0561             u32 data = le32_to_cpu(*(__le32 *)(cf->data + i));
0562 
0563             ctucan_write_txt_buf(priv, buf_base, CTUCANFD_DATA_1_4_W + i, data);
0564         }
0565     }
0566 
0567     return true;
0568 }
0569 
0570 /**
0571  * ctucan_give_txtb_cmd() - Applies command on TXT buffer
0572  * @priv:   Pointer to private data
0573  * @cmd:    Command to give
0574  * @buf:    Buffer index (0-based)
0575  */
0576 static void ctucan_give_txtb_cmd(struct ctucan_priv *priv, enum ctucan_txtb_command cmd, u8 buf)
0577 {
0578     u32 tx_cmd = cmd;
0579 
0580     tx_cmd |= 1 << (buf + 8);
0581     ctucan_write32(priv, CTUCANFD_TX_COMMAND, tx_cmd);
0582 }
0583 
0584 /**
0585  * ctucan_start_xmit() - Starts the transmission
0586  * @skb:    sk_buff pointer that contains data to be Txed
0587  * @ndev:   Pointer to net_device structure
0588  *
0589  * Invoked from upper layers to initiate transmission. Uses the next available free TXT Buffer and
0590  * populates its fields to start the transmission.
0591  *
0592  * Return: %NETDEV_TX_OK on success, %NETDEV_TX_BUSY when no free TXT buffer is available,
0593  *         negative return values reserved for error cases
0594  */
0595 static netdev_tx_t ctucan_start_xmit(struct sk_buff *skb, struct net_device *ndev)
0596 {
0597     struct ctucan_priv *priv = netdev_priv(ndev);
0598     struct canfd_frame *cf = (struct canfd_frame *)skb->data;
0599     u32 txtb_id;
0600     bool ok;
0601     unsigned long flags;
0602 
0603     if (can_dropped_invalid_skb(ndev, skb))
0604         return NETDEV_TX_OK;
0605 
0606     if (unlikely(!CTU_CAN_FD_TXTNF(priv))) {
0607         netif_stop_queue(ndev);
0608         netdev_err(ndev, "BUG!, no TXB free when queue awake!\n");
0609         return NETDEV_TX_BUSY;
0610     }
0611 
0612     txtb_id = priv->txb_head % priv->ntxbufs;
0613     ctucan_netdev_dbg(ndev, "%s: using TXB#%u\n", __func__, txtb_id);
0614     ok = ctucan_insert_frame(priv, cf, txtb_id, can_is_canfd_skb(skb));
0615 
0616     if (!ok) {
0617         netdev_err(ndev, "BUG! TXNF set but cannot insert frame into TXTB! HW Bug?");
0618         kfree_skb(skb);
0619         ndev->stats.tx_dropped++;
0620         return NETDEV_TX_OK;
0621     }
0622 
0623     can_put_echo_skb(skb, ndev, txtb_id, 0);
0624 
0625     spin_lock_irqsave(&priv->tx_lock, flags);
0626     ctucan_give_txtb_cmd(priv, TXT_CMD_SET_READY, txtb_id);
0627     priv->txb_head++;
0628 
0629     /* Check if all TX buffers are full */
0630     if (!CTU_CAN_FD_TXTNF(priv))
0631         netif_stop_queue(ndev);
0632 
0633     spin_unlock_irqrestore(&priv->tx_lock, flags);
0634 
0635     return NETDEV_TX_OK;
0636 }
0637 
0638 /**
0639  * ctucan_read_rx_frame() - Reads frame from RX FIFO
0640  * @priv:   Pointer to CTU CAN FD's private data
0641  * @cf:     Pointer to CAN frame struct
0642  * @ffw:    Previously read frame format word
0643  *
0644  * Note: Frame format word must be read separately and provided in 'ffw'.
0645  */
0646 static void ctucan_read_rx_frame(struct ctucan_priv *priv, struct canfd_frame *cf, u32 ffw)
0647 {
0648     u32 idw;
0649     unsigned int i;
0650     unsigned int wc;
0651     unsigned int len;
0652 
0653     idw = ctucan_read32(priv, CTUCANFD_RX_DATA);
0654     if (FIELD_GET(REG_FRAME_FORMAT_W_IDE, ffw))
0655         cf->can_id = (idw & CAN_EFF_MASK) | CAN_EFF_FLAG;
0656     else
0657         cf->can_id = (idw >> 18) & CAN_SFF_MASK;
0658 
0659     /* BRS, ESI, RTR Flags */
0660     cf->flags = 0;
0661     if (FIELD_GET(REG_FRAME_FORMAT_W_FDF, ffw)) {
0662         if (FIELD_GET(REG_FRAME_FORMAT_W_BRS, ffw))
0663             cf->flags |= CANFD_BRS;
0664         if (FIELD_GET(REG_FRAME_FORMAT_W_ESI_RSV, ffw))
0665             cf->flags |= CANFD_ESI;
0666     } else if (FIELD_GET(REG_FRAME_FORMAT_W_RTR, ffw)) {
0667         cf->can_id |= CAN_RTR_FLAG;
0668     }
0669 
0670     wc = FIELD_GET(REG_FRAME_FORMAT_W_RWCNT, ffw) - 3;
0671 
0672     /* DLC */
0673     if (FIELD_GET(REG_FRAME_FORMAT_W_DLC, ffw) <= 8) {
0674         len = FIELD_GET(REG_FRAME_FORMAT_W_DLC, ffw);
0675     } else {
0676         if (FIELD_GET(REG_FRAME_FORMAT_W_FDF, ffw))
0677             len = wc << 2;
0678         else
0679             len = 8;
0680     }
0681     cf->len = len;
0682     if (unlikely(len > wc * 4))
0683         len = wc * 4;
0684 
0685     /* Timestamp - Read and throw away */
0686     ctucan_read32(priv, CTUCANFD_RX_DATA);
0687     ctucan_read32(priv, CTUCANFD_RX_DATA);
0688 
0689     /* Data */
0690     for (i = 0; i < len; i += 4) {
0691         u32 data = ctucan_read32(priv, CTUCANFD_RX_DATA);
0692         *(__le32 *)(cf->data + i) = cpu_to_le32(data);
0693     }
0694     while (unlikely(i < wc * 4)) {
0695         ctucan_read32(priv, CTUCANFD_RX_DATA);
0696         i += 4;
0697     }
0698 }
0699 
0700 /**
0701  * ctucan_rx() -  Called from CAN ISR to complete the received frame processing
0702  * @ndev:   Pointer to net_device structure
0703  *
0704  * This function is invoked from the CAN isr(poll) to process the Rx frames. It does minimal
0705  * processing and invokes "netif_receive_skb" to complete further processing.
0706  * Return: 1 when frame is passed to the network layer, 0 when the first frame word is read but
0707  *     system is out of free SKBs temporally and left code to resolve SKB allocation later,
0708  *         -%EAGAIN in a case of empty Rx FIFO.
0709  */
0710 static int ctucan_rx(struct net_device *ndev)
0711 {
0712     struct ctucan_priv *priv = netdev_priv(ndev);
0713     struct net_device_stats *stats = &ndev->stats;
0714     struct canfd_frame *cf;
0715     struct sk_buff *skb;
0716     u32 ffw;
0717 
0718     if (test_bit(CTUCANFD_FLAG_RX_FFW_BUFFERED, &priv->drv_flags)) {
0719         ffw = priv->rxfrm_first_word;
0720         clear_bit(CTUCANFD_FLAG_RX_FFW_BUFFERED, &priv->drv_flags);
0721     } else {
0722         ffw = ctucan_read32(priv, CTUCANFD_RX_DATA);
0723     }
0724 
0725     if (!FIELD_GET(REG_FRAME_FORMAT_W_RWCNT, ffw))
0726         return -EAGAIN;
0727 
0728     if (FIELD_GET(REG_FRAME_FORMAT_W_FDF, ffw))
0729         skb = alloc_canfd_skb(ndev, &cf);
0730     else
0731         skb = alloc_can_skb(ndev, (struct can_frame **)&cf);
0732 
0733     if (unlikely(!skb)) {
0734         priv->rxfrm_first_word = ffw;
0735         set_bit(CTUCANFD_FLAG_RX_FFW_BUFFERED, &priv->drv_flags);
0736         return 0;
0737     }
0738 
0739     ctucan_read_rx_frame(priv, cf, ffw);
0740 
0741     stats->rx_bytes += cf->len;
0742     stats->rx_packets++;
0743     netif_receive_skb(skb);
0744 
0745     return 1;
0746 }
0747 
0748 /**
0749  * ctucan_read_fault_state() - Reads CTU CAN FDs fault confinement state.
0750  * @priv:   Pointer to private data
0751  *
0752  * Returns: Fault confinement state of controller
0753  */
0754 static enum can_state ctucan_read_fault_state(struct ctucan_priv *priv)
0755 {
0756     u32 fs;
0757     u32 rec_tec;
0758     u32 ewl;
0759 
0760     fs = ctucan_read32(priv, CTUCANFD_EWL);
0761     rec_tec = ctucan_read32(priv, CTUCANFD_REC);
0762     ewl = FIELD_GET(REG_EWL_EW_LIMIT, fs);
0763 
0764     if (FIELD_GET(REG_EWL_ERA, fs)) {
0765         if (ewl > FIELD_GET(REG_REC_REC_VAL, rec_tec) &&
0766             ewl > FIELD_GET(REG_REC_TEC_VAL, rec_tec))
0767             return CAN_STATE_ERROR_ACTIVE;
0768         else
0769             return CAN_STATE_ERROR_WARNING;
0770     } else if (FIELD_GET(REG_EWL_ERP, fs)) {
0771         return CAN_STATE_ERROR_PASSIVE;
0772     } else if (FIELD_GET(REG_EWL_BOF, fs)) {
0773         return CAN_STATE_BUS_OFF;
0774     }
0775 
0776     WARN(true, "Invalid error state");
0777     return CAN_STATE_ERROR_PASSIVE;
0778 }
0779 
0780 /**
0781  * ctucan_get_rec_tec() - Reads REC/TEC counter values from controller
0782  * @priv:   Pointer to private data
0783  * @bec:    Pointer to Error counter structure
0784  */
0785 static void ctucan_get_rec_tec(struct ctucan_priv *priv, struct can_berr_counter *bec)
0786 {
0787     u32 err_ctrs = ctucan_read32(priv, CTUCANFD_REC);
0788 
0789     bec->rxerr = FIELD_GET(REG_REC_REC_VAL, err_ctrs);
0790     bec->txerr = FIELD_GET(REG_REC_TEC_VAL, err_ctrs);
0791 }
0792 
0793 /**
0794  * ctucan_err_interrupt() - Error frame ISR
0795  * @ndev:   net_device pointer
0796  * @isr:    interrupt status register value
0797  *
0798  * This is the CAN error interrupt and it will check the type of error and forward the error
0799  * frame to upper layers.
0800  */
0801 static void ctucan_err_interrupt(struct net_device *ndev, u32 isr)
0802 {
0803     struct ctucan_priv *priv = netdev_priv(ndev);
0804     struct net_device_stats *stats = &ndev->stats;
0805     struct can_frame *cf;
0806     struct sk_buff *skb;
0807     enum can_state state;
0808     struct can_berr_counter bec;
0809     u32 err_capt_alc;
0810     int dologerr = net_ratelimit();
0811 
0812     ctucan_get_rec_tec(priv, &bec);
0813     state = ctucan_read_fault_state(priv);
0814     err_capt_alc = ctucan_read32(priv, CTUCANFD_ERR_CAPT);
0815 
0816     if (dologerr)
0817         netdev_info(ndev, "%s: ISR = 0x%08x, rxerr %d, txerr %d, error type %lu, pos %lu, ALC id_field %lu, bit %lu\n",
0818                 __func__, isr, bec.rxerr, bec.txerr,
0819                 FIELD_GET(REG_ERR_CAPT_ERR_TYPE, err_capt_alc),
0820                 FIELD_GET(REG_ERR_CAPT_ERR_POS, err_capt_alc),
0821                 FIELD_GET(REG_ERR_CAPT_ALC_ID_FIELD, err_capt_alc),
0822                 FIELD_GET(REG_ERR_CAPT_ALC_BIT, err_capt_alc));
0823 
0824     skb = alloc_can_err_skb(ndev, &cf);
0825 
0826     /* EWLI: error warning limit condition met
0827      * FCSI: fault confinement state changed
0828      * ALI:  arbitration lost (just informative)
0829      * BEI:  bus error interrupt
0830      */
0831     if (FIELD_GET(REG_INT_STAT_FCSI, isr) || FIELD_GET(REG_INT_STAT_EWLI, isr)) {
0832         netdev_info(ndev, "state changes from %s to %s\n",
0833                 ctucan_state_to_str(priv->can.state),
0834                 ctucan_state_to_str(state));
0835 
0836         if (priv->can.state == state)
0837             netdev_warn(ndev,
0838                     "current and previous state is the same! (missed interrupt?)\n");
0839 
0840         priv->can.state = state;
0841         switch (state) {
0842         case CAN_STATE_BUS_OFF:
0843             priv->can.can_stats.bus_off++;
0844             can_bus_off(ndev);
0845             if (skb)
0846                 cf->can_id |= CAN_ERR_BUSOFF;
0847             break;
0848         case CAN_STATE_ERROR_PASSIVE:
0849             priv->can.can_stats.error_passive++;
0850             if (skb) {
0851                 cf->can_id |= CAN_ERR_CRTL | CAN_ERR_CNT;
0852                 cf->data[1] = (bec.rxerr > 127) ?
0853                         CAN_ERR_CRTL_RX_PASSIVE :
0854                         CAN_ERR_CRTL_TX_PASSIVE;
0855                 cf->data[6] = bec.txerr;
0856                 cf->data[7] = bec.rxerr;
0857             }
0858             break;
0859         case CAN_STATE_ERROR_WARNING:
0860             priv->can.can_stats.error_warning++;
0861             if (skb) {
0862                 cf->can_id |= CAN_ERR_CRTL | CAN_ERR_CNT;
0863                 cf->data[1] |= (bec.txerr > bec.rxerr) ?
0864                     CAN_ERR_CRTL_TX_WARNING :
0865                     CAN_ERR_CRTL_RX_WARNING;
0866                 cf->data[6] = bec.txerr;
0867                 cf->data[7] = bec.rxerr;
0868             }
0869             break;
0870         case CAN_STATE_ERROR_ACTIVE:
0871             cf->can_id |= CAN_ERR_CNT;
0872             cf->data[1] = CAN_ERR_CRTL_ACTIVE;
0873             cf->data[6] = bec.txerr;
0874             cf->data[7] = bec.rxerr;
0875             break;
0876         default:
0877             netdev_warn(ndev, "unhandled error state (%d:%s)!\n",
0878                     state, ctucan_state_to_str(state));
0879             break;
0880         }
0881     }
0882 
0883     /* Check for Arbitration Lost interrupt */
0884     if (FIELD_GET(REG_INT_STAT_ALI, isr)) {
0885         if (dologerr)
0886             netdev_info(ndev, "arbitration lost\n");
0887         priv->can.can_stats.arbitration_lost++;
0888         if (skb) {
0889             cf->can_id |= CAN_ERR_LOSTARB;
0890             cf->data[0] = CAN_ERR_LOSTARB_UNSPEC;
0891         }
0892     }
0893 
0894     /* Check for Bus Error interrupt */
0895     if (FIELD_GET(REG_INT_STAT_BEI, isr)) {
0896         netdev_info(ndev, "bus error\n");
0897         priv->can.can_stats.bus_error++;
0898         stats->rx_errors++;
0899         if (skb) {
0900             cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;
0901             cf->data[2] = CAN_ERR_PROT_UNSPEC;
0902             cf->data[3] = CAN_ERR_PROT_LOC_UNSPEC;
0903         }
0904     }
0905 
0906     if (skb) {
0907         stats->rx_packets++;
0908         stats->rx_bytes += cf->can_dlc;
0909         netif_rx(skb);
0910     }
0911 }
0912 
0913 /**
0914  * ctucan_rx_poll() - Poll routine for rx packets (NAPI)
0915  * @napi:   NAPI structure pointer
0916  * @quota:  Max number of rx packets to be processed.
0917  *
0918  * This is the poll routine for rx part. It will process the packets maximux quota value.
0919  *
0920  * Return: Number of packets received
0921  */
0922 static int ctucan_rx_poll(struct napi_struct *napi, int quota)
0923 {
0924     struct net_device *ndev = napi->dev;
0925     struct ctucan_priv *priv = netdev_priv(ndev);
0926     int work_done = 0;
0927     u32 status;
0928     u32 framecnt;
0929     int res = 1;
0930 
0931     framecnt = FIELD_GET(REG_RX_STATUS_RXFRC, ctucan_read32(priv, CTUCANFD_RX_STATUS));
0932     while (framecnt && work_done < quota && res > 0) {
0933         res = ctucan_rx(ndev);
0934         work_done++;
0935         framecnt = FIELD_GET(REG_RX_STATUS_RXFRC, ctucan_read32(priv, CTUCANFD_RX_STATUS));
0936     }
0937 
0938     /* Check for RX FIFO Overflow */
0939     status = ctucan_read32(priv, CTUCANFD_STATUS);
0940     if (FIELD_GET(REG_STATUS_DOR, status)) {
0941         struct net_device_stats *stats = &ndev->stats;
0942         struct can_frame *cf;
0943         struct sk_buff *skb;
0944 
0945         netdev_info(ndev, "rx_poll: rx fifo overflow\n");
0946         stats->rx_over_errors++;
0947         stats->rx_errors++;
0948         skb = alloc_can_err_skb(ndev, &cf);
0949         if (skb) {
0950             cf->can_id |= CAN_ERR_CRTL;
0951             cf->data[1] |= CAN_ERR_CRTL_RX_OVERFLOW;
0952             stats->rx_packets++;
0953             stats->rx_bytes += cf->can_dlc;
0954             netif_rx(skb);
0955         }
0956 
0957         /* Clear Data Overrun */
0958         ctucan_write32(priv, CTUCANFD_COMMAND, REG_COMMAND_CDO);
0959     }
0960 
0961     if (!framecnt && res != 0) {
0962         if (napi_complete_done(napi, work_done)) {
0963             /* Clear and enable RBNEI. It is level-triggered, so
0964              * there is no race condition.
0965              */
0966             ctucan_write32(priv, CTUCANFD_INT_STAT, REG_INT_STAT_RBNEI);
0967             ctucan_write32(priv, CTUCANFD_INT_MASK_CLR, REG_INT_STAT_RBNEI);
0968         }
0969     }
0970 
0971     return work_done;
0972 }
0973 
0974 /**
0975  * ctucan_rotate_txb_prio() - Rotates priorities of TXT Buffers
0976  * @ndev:   net_device pointer
0977  */
0978 static void ctucan_rotate_txb_prio(struct net_device *ndev)
0979 {
0980     struct ctucan_priv *priv = netdev_priv(ndev);
0981     u32 prio = priv->txb_prio;
0982 
0983     prio = (prio << 4) | ((prio >> ((priv->ntxbufs - 1) * 4)) & 0xF);
0984     ctucan_netdev_dbg(ndev, "%s: from 0x%08x to 0x%08x\n", __func__, priv->txb_prio, prio);
0985     priv->txb_prio = prio;
0986     ctucan_write32(priv, CTUCANFD_TX_PRIORITY, prio);
0987 }
0988 
0989 /**
0990  * ctucan_tx_interrupt() - Tx done Isr
0991  * @ndev:   net_device pointer
0992  */
0993 static void ctucan_tx_interrupt(struct net_device *ndev)
0994 {
0995     struct ctucan_priv *priv = netdev_priv(ndev);
0996     struct net_device_stats *stats = &ndev->stats;
0997     bool first = true;
0998     bool some_buffers_processed;
0999     unsigned long flags;
1000     enum ctucan_txtb_status txtb_status;
1001     u32 txtb_id;
1002 
1003     /*  read tx_status
1004      *  if txb[n].finished (bit 2)
1005      *  if ok -> echo
1006      *  if error / aborted -> ?? (find how to handle oneshot mode)
1007      *  txb_tail++
1008      */
1009     do {
1010         spin_lock_irqsave(&priv->tx_lock, flags);
1011 
1012         some_buffers_processed = false;
1013         while ((int)(priv->txb_head - priv->txb_tail) > 0) {
1014             txtb_id = priv->txb_tail % priv->ntxbufs;
1015             txtb_status = ctucan_get_tx_status(priv, txtb_id);
1016 
1017             ctucan_netdev_dbg(ndev, "TXI: TXB#%u: status 0x%x\n", txtb_id, txtb_status);
1018 
1019             switch (txtb_status) {
1020             case TXT_TOK:
1021                 ctucan_netdev_dbg(ndev, "TXT_OK\n");
1022                 stats->tx_bytes += can_get_echo_skb(ndev, txtb_id, NULL);
1023                 stats->tx_packets++;
1024                 break;
1025             case TXT_ERR:
1026                 /* This indicated that retransmit limit has been reached. Obviously
1027                  * we should not echo the frame, but also not indicate any kind of
1028                  * error. If desired, it was already reported (possible multiple
1029                  * times) on each arbitration lost.
1030                  */
1031                 netdev_warn(ndev, "TXB in Error state\n");
1032                 can_free_echo_skb(ndev, txtb_id, NULL);
1033                 stats->tx_dropped++;
1034                 break;
1035             case TXT_ABT:
1036                 /* Same as for TXT_ERR, only with different cause. We *could*
1037                  * re-queue the frame, but multiqueue/abort is not supported yet
1038                  * anyway.
1039                  */
1040                 netdev_warn(ndev, "TXB in Aborted state\n");
1041                 can_free_echo_skb(ndev, txtb_id, NULL);
1042                 stats->tx_dropped++;
1043                 break;
1044             default:
1045                 /* Bug only if the first buffer is not finished, otherwise it is
1046                  * pretty much expected.
1047                  */
1048                 if (first) {
1049                     netdev_err(ndev,
1050                            "BUG: TXB#%u not in a finished state (0x%x)!\n",
1051                            txtb_id, txtb_status);
1052                     spin_unlock_irqrestore(&priv->tx_lock, flags);
1053                     /* do not clear nor wake */
1054                     return;
1055                 }
1056                 goto clear;
1057             }
1058             priv->txb_tail++;
1059             first = false;
1060             some_buffers_processed = true;
1061             /* Adjust priorities *before* marking the buffer as empty. */
1062             ctucan_rotate_txb_prio(ndev);
1063             ctucan_give_txtb_cmd(priv, TXT_CMD_SET_EMPTY, txtb_id);
1064         }
1065 clear:
1066         spin_unlock_irqrestore(&priv->tx_lock, flags);
1067 
1068         /* If no buffers were processed this time, we cannot clear - that would introduce
1069          * a race condition.
1070          */
1071         if (some_buffers_processed) {
1072             /* Clear the interrupt again. We do not want to receive again interrupt for
1073              * the buffer already handled. If it is the last finished one then it would
1074              * cause log of spurious interrupt.
1075              */
1076             ctucan_write32(priv, CTUCANFD_INT_STAT, REG_INT_STAT_TXBHCI);
1077         }
1078     } while (some_buffers_processed);
1079 
1080     spin_lock_irqsave(&priv->tx_lock, flags);
1081 
1082     /* Check if at least one TX buffer is free */
1083     if (CTU_CAN_FD_TXTNF(priv))
1084         netif_wake_queue(ndev);
1085 
1086     spin_unlock_irqrestore(&priv->tx_lock, flags);
1087 }
1088 
1089 /**
1090  * ctucan_interrupt() - CAN Isr
1091  * @irq:    irq number
1092  * @dev_id: device id pointer
1093  *
1094  * This is the CTU CAN FD ISR. It checks for the type of interrupt
1095  * and invokes the corresponding ISR.
1096  *
1097  * Return:
1098  * IRQ_NONE - If CAN device is in sleep mode, IRQ_HANDLED otherwise
1099  */
1100 static irqreturn_t ctucan_interrupt(int irq, void *dev_id)
1101 {
1102     struct net_device *ndev = (struct net_device *)dev_id;
1103     struct ctucan_priv *priv = netdev_priv(ndev);
1104     u32 isr, icr;
1105     u32 imask;
1106     int irq_loops;
1107 
1108     for (irq_loops = 0; irq_loops < 10000; irq_loops++) {
1109         /* Get the interrupt status */
1110         isr = ctucan_read32(priv, CTUCANFD_INT_STAT);
1111 
1112         if (!isr)
1113             return irq_loops ? IRQ_HANDLED : IRQ_NONE;
1114 
1115         /* Receive Buffer Not Empty Interrupt */
1116         if (FIELD_GET(REG_INT_STAT_RBNEI, isr)) {
1117             ctucan_netdev_dbg(ndev, "RXBNEI\n");
1118             /* Mask RXBNEI the first, then clear interrupt and schedule NAPI. Even if
1119              * another IRQ fires, RBNEI will always be 0 (masked).
1120              */
1121             icr = REG_INT_STAT_RBNEI;
1122             ctucan_write32(priv, CTUCANFD_INT_MASK_SET, icr);
1123             ctucan_write32(priv, CTUCANFD_INT_STAT, icr);
1124             napi_schedule(&priv->napi);
1125         }
1126 
1127         /* TXT Buffer HW Command Interrupt */
1128         if (FIELD_GET(REG_INT_STAT_TXBHCI, isr)) {
1129             ctucan_netdev_dbg(ndev, "TXBHCI\n");
1130             /* Cleared inside */
1131             ctucan_tx_interrupt(ndev);
1132         }
1133 
1134         /* Error interrupts */
1135         if (FIELD_GET(REG_INT_STAT_EWLI, isr) ||
1136             FIELD_GET(REG_INT_STAT_FCSI, isr) ||
1137             FIELD_GET(REG_INT_STAT_ALI, isr)) {
1138             icr = isr & (REG_INT_STAT_EWLI | REG_INT_STAT_FCSI | REG_INT_STAT_ALI);
1139 
1140             ctucan_netdev_dbg(ndev, "some ERR interrupt: clearing 0x%08x\n", icr);
1141             ctucan_write32(priv, CTUCANFD_INT_STAT, icr);
1142             ctucan_err_interrupt(ndev, isr);
1143         }
1144         /* Ignore RI, TI, LFI, RFI, BSI */
1145     }
1146 
1147     netdev_err(ndev, "%s: stuck interrupt (isr=0x%08x), stopping\n", __func__, isr);
1148 
1149     if (FIELD_GET(REG_INT_STAT_TXBHCI, isr)) {
1150         int i;
1151 
1152         netdev_err(ndev, "txb_head=0x%08x txb_tail=0x%08x\n",
1153                priv->txb_head, priv->txb_tail);
1154         for (i = 0; i < priv->ntxbufs; i++) {
1155             u32 status = ctucan_get_tx_status(priv, i);
1156 
1157             netdev_err(ndev, "txb[%d] txb status=0x%08x\n", i, status);
1158         }
1159     }
1160 
1161     imask = 0xffffffff;
1162     ctucan_write32(priv, CTUCANFD_INT_ENA_CLR, imask);
1163     ctucan_write32(priv, CTUCANFD_INT_MASK_SET, imask);
1164 
1165     return IRQ_HANDLED;
1166 }
1167 
1168 /**
1169  * ctucan_chip_stop() - Driver stop routine
1170  * @ndev:   Pointer to net_device structure
1171  *
1172  * This is the drivers stop routine. It will disable the
1173  * interrupts and disable the controller.
1174  */
1175 static void ctucan_chip_stop(struct net_device *ndev)
1176 {
1177     struct ctucan_priv *priv = netdev_priv(ndev);
1178     u32 mask = 0xffffffff;
1179     u32 mode;
1180 
1181     /* Disable interrupts and disable CAN */
1182     ctucan_write32(priv, CTUCANFD_INT_ENA_CLR, mask);
1183     ctucan_write32(priv, CTUCANFD_INT_MASK_SET, mask);
1184     mode = ctucan_read32(priv, CTUCANFD_MODE);
1185     mode &= ~REG_MODE_ENA;
1186     ctucan_write32(priv, CTUCANFD_MODE, mode);
1187 
1188     priv->can.state = CAN_STATE_STOPPED;
1189 }
1190 
1191 /**
1192  * ctucan_open() - Driver open routine
1193  * @ndev:   Pointer to net_device structure
1194  *
1195  * This is the driver open routine.
1196  * Return: 0 on success and failure value on error
1197  */
1198 static int ctucan_open(struct net_device *ndev)
1199 {
1200     struct ctucan_priv *priv = netdev_priv(ndev);
1201     int ret;
1202 
1203     ret = pm_runtime_get_sync(priv->dev);
1204     if (ret < 0) {
1205         netdev_err(ndev, "%s: pm_runtime_get failed(%d)\n",
1206                __func__, ret);
1207         pm_runtime_put_noidle(priv->dev);
1208         return ret;
1209     }
1210 
1211     ret = ctucan_reset(ndev);
1212     if (ret < 0)
1213         goto err_reset;
1214 
1215     /* Common open */
1216     ret = open_candev(ndev);
1217     if (ret) {
1218         netdev_warn(ndev, "open_candev failed!\n");
1219         goto err_open;
1220     }
1221 
1222     ret = request_irq(ndev->irq, ctucan_interrupt, priv->irq_flags, ndev->name, ndev);
1223     if (ret < 0) {
1224         netdev_err(ndev, "irq allocation for CAN failed\n");
1225         goto err_irq;
1226     }
1227 
1228     ret = ctucan_chip_start(ndev);
1229     if (ret < 0) {
1230         netdev_err(ndev, "ctucan_chip_start failed!\n");
1231         goto err_chip_start;
1232     }
1233 
1234     netdev_info(ndev, "ctu_can_fd device registered\n");
1235     napi_enable(&priv->napi);
1236     netif_start_queue(ndev);
1237 
1238     return 0;
1239 
1240 err_chip_start:
1241     free_irq(ndev->irq, ndev);
1242 err_irq:
1243     close_candev(ndev);
1244 err_open:
1245 err_reset:
1246     pm_runtime_put(priv->dev);
1247 
1248     return ret;
1249 }
1250 
1251 /**
1252  * ctucan_close() - Driver close routine
1253  * @ndev:   Pointer to net_device structure
1254  *
1255  * Return: 0 always
1256  */
1257 static int ctucan_close(struct net_device *ndev)
1258 {
1259     struct ctucan_priv *priv = netdev_priv(ndev);
1260 
1261     netif_stop_queue(ndev);
1262     napi_disable(&priv->napi);
1263     ctucan_chip_stop(ndev);
1264     free_irq(ndev->irq, ndev);
1265     close_candev(ndev);
1266 
1267     pm_runtime_put(priv->dev);
1268 
1269     return 0;
1270 }
1271 
1272 /**
1273  * ctucan_get_berr_counter() - error counter routine
1274  * @ndev:   Pointer to net_device structure
1275  * @bec:    Pointer to can_berr_counter structure
1276  *
1277  * This is the driver error counter routine.
1278  * Return: 0 on success and failure value on error
1279  */
1280 static int ctucan_get_berr_counter(const struct net_device *ndev, struct can_berr_counter *bec)
1281 {
1282     struct ctucan_priv *priv = netdev_priv(ndev);
1283     int ret;
1284 
1285     ret = pm_runtime_get_sync(priv->dev);
1286     if (ret < 0) {
1287         netdev_err(ndev, "%s: pm_runtime_get failed(%d)\n", __func__, ret);
1288         pm_runtime_put_noidle(priv->dev);
1289         return ret;
1290     }
1291 
1292     ctucan_get_rec_tec(priv, bec);
1293     pm_runtime_put(priv->dev);
1294 
1295     return 0;
1296 }
1297 
1298 static const struct net_device_ops ctucan_netdev_ops = {
1299     .ndo_open   = ctucan_open,
1300     .ndo_stop   = ctucan_close,
1301     .ndo_start_xmit = ctucan_start_xmit,
1302     .ndo_change_mtu = can_change_mtu,
1303 };
1304 
1305 static const struct ethtool_ops ctucan_ethtool_ops = {
1306     .get_ts_info = ethtool_op_get_ts_info,
1307 };
1308 
1309 int ctucan_suspend(struct device *dev)
1310 {
1311     struct net_device *ndev = dev_get_drvdata(dev);
1312     struct ctucan_priv *priv = netdev_priv(ndev);
1313 
1314     if (netif_running(ndev)) {
1315         netif_stop_queue(ndev);
1316         netif_device_detach(ndev);
1317     }
1318 
1319     priv->can.state = CAN_STATE_SLEEPING;
1320 
1321     return 0;
1322 }
1323 EXPORT_SYMBOL(ctucan_suspend);
1324 
1325 int ctucan_resume(struct device *dev)
1326 {
1327     struct net_device *ndev = dev_get_drvdata(dev);
1328     struct ctucan_priv *priv = netdev_priv(ndev);
1329 
1330     priv->can.state = CAN_STATE_ERROR_ACTIVE;
1331 
1332     if (netif_running(ndev)) {
1333         netif_device_attach(ndev);
1334         netif_start_queue(ndev);
1335     }
1336 
1337     return 0;
1338 }
1339 EXPORT_SYMBOL(ctucan_resume);
1340 
1341 int ctucan_probe_common(struct device *dev, void __iomem *addr, int irq, unsigned int ntxbufs,
1342             unsigned long can_clk_rate, int pm_enable_call,
1343             void (*set_drvdata_fnc)(struct device *dev, struct net_device *ndev))
1344 {
1345     struct ctucan_priv *priv;
1346     struct net_device *ndev;
1347     int ret;
1348 
1349     /* Create a CAN device instance */
1350     ndev = alloc_candev(sizeof(struct ctucan_priv), ntxbufs);
1351     if (!ndev)
1352         return -ENOMEM;
1353 
1354     priv = netdev_priv(ndev);
1355     spin_lock_init(&priv->tx_lock);
1356     INIT_LIST_HEAD(&priv->peers_on_pdev);
1357     priv->ntxbufs = ntxbufs;
1358     priv->dev = dev;
1359     priv->can.bittiming_const = &ctu_can_fd_bit_timing_max;
1360     priv->can.data_bittiming_const = &ctu_can_fd_bit_timing_data_max;
1361     priv->can.do_set_mode = ctucan_do_set_mode;
1362 
1363     /* Needed for timing adjustment to be performed as soon as possible */
1364     priv->can.do_set_bittiming = ctucan_set_bittiming;
1365     priv->can.do_set_data_bittiming = ctucan_set_data_bittiming;
1366 
1367     priv->can.do_get_berr_counter = ctucan_get_berr_counter;
1368     priv->can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK
1369                     | CAN_CTRLMODE_LISTENONLY
1370                     | CAN_CTRLMODE_FD
1371                     | CAN_CTRLMODE_PRESUME_ACK
1372                     | CAN_CTRLMODE_BERR_REPORTING
1373                     | CAN_CTRLMODE_FD_NON_ISO
1374                     | CAN_CTRLMODE_ONE_SHOT;
1375     priv->mem_base = addr;
1376 
1377     /* Get IRQ for the device */
1378     ndev->irq = irq;
1379     ndev->flags |= IFF_ECHO;    /* We support local echo */
1380 
1381     if (set_drvdata_fnc)
1382         set_drvdata_fnc(dev, ndev);
1383     SET_NETDEV_DEV(ndev, dev);
1384     ndev->netdev_ops = &ctucan_netdev_ops;
1385     ndev->ethtool_ops = &ctucan_ethtool_ops;
1386 
1387     /* Getting the can_clk info */
1388     if (!can_clk_rate) {
1389         priv->can_clk = devm_clk_get(dev, NULL);
1390         if (IS_ERR(priv->can_clk)) {
1391             dev_err(dev, "Device clock not found.\n");
1392             ret = PTR_ERR(priv->can_clk);
1393             goto err_free;
1394         }
1395         can_clk_rate = clk_get_rate(priv->can_clk);
1396     }
1397 
1398     priv->write_reg = ctucan_write32_le;
1399     priv->read_reg = ctucan_read32_le;
1400 
1401     if (pm_enable_call)
1402         pm_runtime_enable(dev);
1403     ret = pm_runtime_get_sync(dev);
1404     if (ret < 0) {
1405         netdev_err(ndev, "%s: pm_runtime_get failed(%d)\n",
1406                __func__, ret);
1407         pm_runtime_put_noidle(priv->dev);
1408         goto err_pmdisable;
1409     }
1410 
1411     /* Check for big-endianity and set according IO-accessors */
1412     if ((ctucan_read32(priv, CTUCANFD_DEVICE_ID) & 0xFFFF) != CTUCANFD_ID) {
1413         priv->write_reg = ctucan_write32_be;
1414         priv->read_reg = ctucan_read32_be;
1415         if ((ctucan_read32(priv, CTUCANFD_DEVICE_ID) & 0xFFFF) != CTUCANFD_ID) {
1416             netdev_err(ndev, "CTU_CAN_FD signature not found\n");
1417             ret = -ENODEV;
1418             goto err_deviceoff;
1419         }
1420     }
1421 
1422     ret = ctucan_reset(ndev);
1423     if (ret < 0)
1424         goto err_deviceoff;
1425 
1426     priv->can.clock.freq = can_clk_rate;
1427 
1428     netif_napi_add(ndev, &priv->napi, ctucan_rx_poll, NAPI_POLL_WEIGHT);
1429 
1430     ret = register_candev(ndev);
1431     if (ret) {
1432         dev_err(dev, "fail to register failed (err=%d)\n", ret);
1433         goto err_deviceoff;
1434     }
1435 
1436     pm_runtime_put(dev);
1437 
1438     netdev_dbg(ndev, "mem_base=0x%p irq=%d clock=%d, no. of txt buffers:%d\n",
1439            priv->mem_base, ndev->irq, priv->can.clock.freq, priv->ntxbufs);
1440 
1441     return 0;
1442 
1443 err_deviceoff:
1444     pm_runtime_put(priv->dev);
1445 err_pmdisable:
1446     if (pm_enable_call)
1447         pm_runtime_disable(dev);
1448 err_free:
1449     list_del_init(&priv->peers_on_pdev);
1450     free_candev(ndev);
1451     return ret;
1452 }
1453 EXPORT_SYMBOL(ctucan_probe_common);
1454 
1455 MODULE_LICENSE("GPL");
1456 MODULE_AUTHOR("Martin Jerabek <martin.jerabek01@gmail.com>");
1457 MODULE_AUTHOR("Pavel Pisa <pisa@cmp.felk.cvut.cz>");
1458 MODULE_AUTHOR("Ondrej Ille <ondrej.ille@gmail.com>");
1459 MODULE_DESCRIPTION("CTU CAN FD interface");
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