0001 config CAN_CTUCANFD
0002 tristate "CTU CAN-FD IP core" if COMPILE_TEST
0003 help
0004 This driver adds support for the CTU CAN FD open-source IP core.
0005 More documentation and core sources at project page
0006 (https://gitlab.fel.cvut.cz/canbus/ctucanfd_ip_core).
0007 The core integration to Xilinx Zynq system as platform driver
0008 is available (https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top).
0009 Implementation on Intel FPGA-based PCI Express board is available
0010 from project (https://gitlab.fel.cvut.cz/canbus/pcie-ctucanfd) and
0011 on Intel SoC from project (https://gitlab.fel.cvut.cz/canbus/intel-soc-ctucanfd).
0012 Guidepost CTU FEE CAN bus projects page https://canbus.pages.fel.cvut.cz/ .
0013
0014 config CAN_CTUCANFD_PCI
0015 tristate "CTU CAN-FD IP core PCI/PCIe driver"
0016 depends on PCI
0017 select CAN_CTUCANFD
0018 help
0019 This driver adds PCI/PCIe support for CTU CAN-FD IP core.
0020 The project providing FPGA design for Intel EP4CGX15 based DB4CGX15
0021 PCIe board with PiKRON.com designed transceiver riser shield is available
0022 at https://gitlab.fel.cvut.cz/canbus/pcie-ctucanfd .
0023
0024 config CAN_CTUCANFD_PLATFORM
0025 tristate "CTU CAN-FD IP core platform (FPGA, SoC) driver"
0026 depends on HAS_IOMEM && (OF || COMPILE_TEST)
0027 select CAN_CTUCANFD
0028 help
0029 The core has been tested together with OpenCores SJA1000
0030 modified to be CAN FD frames tolerant on MicroZed Zynq based
0031 MZ_APO education kits designed by Petr Porazil from PiKRON.com
0032 company. FPGA design https://gitlab.fel.cvut.cz/canbus/zynq/zynq-can-sja1000-top.
0033 The kit description at the Computer Architectures course pages
0034 https://cw.fel.cvut.cz/wiki/courses/b35apo/documentation/mz_apo/start .
