can/cc770/cc770.h

0001 /* SPDX-License-Identifier: GPL-2.0-only */
0002 /*
0003  * Core driver for the CC770 and AN82527 CAN controllers
0004  *
0005  * Copyright (C) 2009, 2011 Wolfgang Grandegger <wg@grandegger.com>
0006  */
0007
0008 #ifndef CC770_DEV_H
0009 #define CC770_DEV_H
0010
0011 #include <linux/can/dev.h>
0012
0013 struct cc770_msgobj {
0014     u8 ctrl0;
0015     u8 ctrl1;
0016     u8 id[4];
0017     u8 config;
0018     u8 data[8];
0019     u8 dontuse;     /* padding */
0020 } __packed;
0021
0022 struct cc770_regs {
0023     union {
0024         struct cc770_msgobj msgobj[16]; /* Message object 1..15 */
0025         struct {
0026             u8 control;     /* Control Register */
0027             u8 status;      /* Status Register */
0028             u8 cpu_interface;   /* CPU Interface Register */
0029             u8 dontuse1;
0030             u8 high_speed_read[2];  /* High Speed Read */
0031             u8 global_mask_std[2];  /* Standard Global Mask */
0032             u8 global_mask_ext[4];  /* Extended Global Mask */
0033             u8 msg15_mask[4];   /* Message 15 Mask */
0034             u8 dontuse2[15];
0035             u8 clkout;      /* Clock Out Register */
0036             u8 dontuse3[15];
0037             u8 bus_config;      /* Bus Configuration Register */
0038             u8 dontuse4[15];
0039             u8 bit_timing_0;    /* Bit Timing Register byte 0 */
0040             u8 dontuse5[15];
0041             u8 bit_timing_1;    /* Bit Timing Register byte 1 */
0042             u8 dontuse6[15];
0043             u8 interrupt;       /* Interrupt Register */
0044             u8 dontuse7[15];
0045             u8 rx_error_counter;    /* Receive Error Counter */
0046             u8 dontuse8[15];
0047             u8 tx_error_counter;    /* Transmit Error Counter */
0048             u8 dontuse9[31];
0049             u8 p1_conf;
0050             u8 dontuse10[15];
0051             u8 p2_conf;
0052             u8 dontuse11[15];
0053             u8 p1_in;
0054             u8 dontuse12[15];
0055             u8 p2_in;
0056             u8 dontuse13[15];
0057             u8 p1_out;
0058             u8 dontuse14[15];
0059             u8 p2_out;
0060             u8 dontuse15[15];
0061             u8 serial_reset_addr;
0062         };
0063     };
0064 } __packed;
0065
0066 /* Control Register (0x00) */
0067 #define CTRL_INI    0x01    /* Initialization */
0068 #define CTRL_IE     0x02    /* Interrupt Enable */
0069 #define CTRL_SIE    0x04    /* Status Interrupt Enable */
0070 #define CTRL_EIE    0x08    /* Error Interrupt Enable */
0071 #define CTRL_EAF    0x20    /* Enable additional functions */
0072 #define CTRL_CCE    0x40    /* Change Configuration Enable */
0073
0074 /* Status Register (0x01) */
0075 #define STAT_LEC_STUFF  0x01    /* Stuff error */
0076 #define STAT_LEC_FORM   0x02    /* Form error */
0077 #define STAT_LEC_ACK    0x03    /* Acknowledgement error */
0078 #define STAT_LEC_BIT1   0x04    /* Bit1 error */
0079 #define STAT_LEC_BIT0   0x05    /* Bit0 error */
0080 #define STAT_LEC_CRC    0x06    /* CRC error */
0081 #define STAT_LEC_MASK   0x07    /* Last Error Code mask */
0082 #define STAT_TXOK   0x08    /* Transmit Message Successfully */
0083 #define STAT_RXOK   0x10    /* Receive Message Successfully */
0084 #define STAT_WAKE   0x20    /* Wake Up Status */
0085 #define STAT_WARN   0x40    /* Warning Status */
0086 #define STAT_BOFF   0x80    /* Bus Off Status */
0087
0088 /*
0089  * CPU Interface Register (0x02)
0090  * Clock Out Register (0x1f)
0091  * Bus Configuration Register (0x2f)
0092  *
0093  * see include/linux/can/platform/cc770.h
0094  */
0095
0096 /* Message Control Register 0 (Base Address + 0x0) */
0097 #define INTPND_RES  0x01    /* No Interrupt pending */
0098 #define INTPND_SET  0x02    /* Interrupt pending */
0099 #define INTPND_UNC  0x03
0100 #define RXIE_RES    0x04    /* Receive Interrupt Disable */
0101 #define RXIE_SET    0x08    /* Receive Interrupt Enable */
0102 #define RXIE_UNC    0x0c
0103 #define TXIE_RES    0x10    /* Transmit Interrupt Disable */
0104 #define TXIE_SET    0x20    /* Transmit Interrupt Enable */
0105 #define TXIE_UNC    0x30
0106 #define MSGVAL_RES  0x40    /* Message Invalid */
0107 #define MSGVAL_SET  0x80    /* Message Valid */
0108 #define MSGVAL_UNC  0xc0
0109
0110 /* Message Control Register 1 (Base Address + 0x01) */
0111 #define NEWDAT_RES  0x01    /* No New Data */
0112 #define NEWDAT_SET  0x02    /* New Data */
0113 #define NEWDAT_UNC  0x03
0114 #define MSGLST_RES  0x04    /* No Message Lost */
0115 #define MSGLST_SET  0x08    /* Message Lost */
0116 #define MSGLST_UNC  0x0c
0117 #define CPUUPD_RES  0x04    /* No CPU Updating */
0118 #define CPUUPD_SET  0x08    /* CPU Updating */
0119 #define CPUUPD_UNC  0x0c
0120 #define TXRQST_RES  0x10    /* No Transmission Request */
0121 #define TXRQST_SET  0x20    /* Transmission Request */
0122 #define TXRQST_UNC  0x30
0123 #define RMTPND_RES  0x40    /* No Remote Request Pending */
0124 #define RMTPND_SET  0x80    /* Remote Request Pending */
0125 #define RMTPND_UNC  0xc0
0126
0127 /* Message Configuration Register (Base Address + 0x06) */
0128 #define MSGCFG_XTD  0x04    /* Extended Identifier */
0129 #define MSGCFG_DIR  0x08    /* Direction is Transmit */
0130
0131 #define MSGOBJ_FIRST    1
0132 #define MSGOBJ_LAST 15
0133
0134 #define CC770_IO_SIZE   0x100
0135 #define CC770_MAX_IRQ   20  /* max. number of interrupts handled in ISR */
0136 #define CC770_MAX_MSG   4   /* max. number of messages handled in ISR */
0137
0138 #define CC770_ECHO_SKB_MAX  1
0139
0140 #define cc770_read_reg(priv, member)                    \
0141     priv->read_reg(priv, offsetof(struct cc770_regs, member))
0142
0143 #define cc770_write_reg(priv, member, value)                \
0144     priv->write_reg(priv, offsetof(struct cc770_regs, member), value)
0145
0146 /*
0147  * Message objects and flags used by this driver
0148  */
0149 #define CC770_OBJ_FLAG_RX   0x01
0150 #define CC770_OBJ_FLAG_RTR  0x02
0151 #define CC770_OBJ_FLAG_EFF  0x04
0152
0153 enum {
0154     CC770_OBJ_RX0 = 0,  /* for receiving normal messages */
0155     CC770_OBJ_RX1,      /* for receiving normal messages */
0156     CC770_OBJ_RX_RTR0,  /* for receiving remote transmission requests */
0157     CC770_OBJ_RX_RTR1,  /* for receiving remote transmission requests */
0158     CC770_OBJ_TX,       /* for sending messages */
0159     CC770_OBJ_MAX
0160 };
0161
0162 #define obj2msgobj(o)   (MSGOBJ_LAST - (o)) /* message object 11..15 */
0163
0164 /*
0165  * CC770 private data structure
0166  */
0167 struct cc770_priv {
0168     struct can_priv can;    /* must be the first member */
0169     struct sk_buff *echo_skb;
0170
0171     /* the lower-layer is responsible for appropriate locking */
0172     u8 (*read_reg)(const struct cc770_priv *priv, int reg);
0173     void (*write_reg)(const struct cc770_priv *priv, int reg, u8 val);
0174     void (*pre_irq)(const struct cc770_priv *priv);
0175     void (*post_irq)(const struct cc770_priv *priv);
0176
0177     void *priv;     /* for board-specific data */
0178     struct net_device *dev;
0179
0180     void __iomem *reg_base;  /* ioremap'ed address to registers */
0181     unsigned long irq_flags; /* for request_irq() */
0182
0183     unsigned char obj_flags[CC770_OBJ_MAX];
0184     u8 control_normal_mode; /* Control register for normal mode */
0185     u8 cpu_interface;   /* CPU interface register */
0186     u8 clkout;      /* Clock out register */
0187     u8 bus_config;      /* Bus configuration register */
0188
0189     struct sk_buff *tx_skb;
0190 };
0191
0192 struct net_device *alloc_cc770dev(int sizeof_priv);
0193 void free_cc770dev(struct net_device *dev);
0194 int register_cc770dev(struct net_device *dev);
0195 void unregister_cc770dev(struct net_device *dev);
0196
0197 #endif /* CC770_DEV_H */