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0008 #include <linux/bitops.h>
0009 #include <linux/err.h>
0010 #include <linux/mfd/syscon.h>
0011 #include <linux/module.h>
0012 #include <linux/mux/driver.h>
0013 #include <linux/of_platform.h>
0014 #include <linux/platform_device.h>
0015 #include <linux/property.h>
0016 #include <linux/regmap.h>
0017
0018 static int mux_mmio_set(struct mux_control *mux, int state)
0019 {
0020 struct regmap_field **fields = mux_chip_priv(mux->chip);
0021
0022 return regmap_field_write(fields[mux_control_get_index(mux)], state);
0023 }
0024
0025 static const struct mux_control_ops mux_mmio_ops = {
0026 .set = mux_mmio_set,
0027 };
0028
0029 static const struct of_device_id mux_mmio_dt_ids[] = {
0030 { .compatible = "mmio-mux", },
0031 { .compatible = "reg-mux", },
0032 { }
0033 };
0034 MODULE_DEVICE_TABLE(of, mux_mmio_dt_ids);
0035
0036 static int mux_mmio_probe(struct platform_device *pdev)
0037 {
0038 struct device *dev = &pdev->dev;
0039 struct device_node *np = dev->of_node;
0040 struct regmap_field **fields;
0041 struct mux_chip *mux_chip;
0042 struct regmap *regmap;
0043 int num_fields;
0044 int ret;
0045 int i;
0046
0047 if (of_device_is_compatible(np, "mmio-mux"))
0048 regmap = syscon_node_to_regmap(np->parent);
0049 else
0050 regmap = dev_get_regmap(dev->parent, NULL) ?: ERR_PTR(-ENODEV);
0051 if (IS_ERR(regmap)) {
0052 ret = PTR_ERR(regmap);
0053 dev_err(dev, "failed to get regmap: %d\n", ret);
0054 return ret;
0055 }
0056
0057 ret = of_property_count_u32_elems(np, "mux-reg-masks");
0058 if (ret == 0 || ret % 2)
0059 ret = -EINVAL;
0060 if (ret < 0) {
0061 dev_err(dev, "mux-reg-masks property missing or invalid: %d\n",
0062 ret);
0063 return ret;
0064 }
0065 num_fields = ret / 2;
0066
0067 mux_chip = devm_mux_chip_alloc(dev, num_fields, num_fields *
0068 sizeof(*fields));
0069 if (IS_ERR(mux_chip))
0070 return PTR_ERR(mux_chip);
0071
0072 fields = mux_chip_priv(mux_chip);
0073
0074 for (i = 0; i < num_fields; i++) {
0075 struct mux_control *mux = &mux_chip->mux[i];
0076 struct reg_field field;
0077 s32 idle_state = MUX_IDLE_AS_IS;
0078 u32 reg, mask;
0079 int bits;
0080
0081 ret = of_property_read_u32_index(np, "mux-reg-masks",
0082 2 * i, ®);
0083 if (!ret)
0084 ret = of_property_read_u32_index(np, "mux-reg-masks",
0085 2 * i + 1, &mask);
0086 if (ret < 0) {
0087 dev_err(dev, "bitfield %d: failed to read mux-reg-masks property: %d\n",
0088 i, ret);
0089 return ret;
0090 }
0091
0092 field.reg = reg;
0093 field.msb = fls(mask) - 1;
0094 field.lsb = ffs(mask) - 1;
0095
0096 if (mask != GENMASK(field.msb, field.lsb)) {
0097 dev_err(dev, "bitfield %d: invalid mask 0x%x\n",
0098 i, mask);
0099 return -EINVAL;
0100 }
0101
0102 fields[i] = devm_regmap_field_alloc(dev, regmap, field);
0103 if (IS_ERR(fields[i])) {
0104 ret = PTR_ERR(fields[i]);
0105 dev_err(dev, "bitfield %d: failed allocate: %d\n",
0106 i, ret);
0107 return ret;
0108 }
0109
0110 bits = 1 + field.msb - field.lsb;
0111 mux->states = 1 << bits;
0112
0113 of_property_read_u32_index(np, "idle-states", i,
0114 (u32 *)&idle_state);
0115 if (idle_state != MUX_IDLE_AS_IS) {
0116 if (idle_state < 0 || idle_state >= mux->states) {
0117 dev_err(dev, "bitfield: %d: out of range idle state %d\n",
0118 i, idle_state);
0119 return -EINVAL;
0120 }
0121
0122 mux->idle_state = idle_state;
0123 }
0124 }
0125
0126 mux_chip->ops = &mux_mmio_ops;
0127
0128 return devm_mux_chip_register(dev, mux_chip);
0129 }
0130
0131 static struct platform_driver mux_mmio_driver = {
0132 .driver = {
0133 .name = "mmio-mux",
0134 .of_match_table = of_match_ptr(mux_mmio_dt_ids),
0135 },
0136 .probe = mux_mmio_probe,
0137 };
0138 module_platform_driver(mux_mmio_driver);
0139
0140 MODULE_DESCRIPTION("MMIO register bitfield-controlled multiplexer driver");
0141 MODULE_AUTHOR("Philipp Zabel <p.zabel@pengutronix.de>");
0142 MODULE_LICENSE("GPL v2");