mtd/spi-nor/macronix.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Copyright (C) 2005, Intec Automation Inc.
0004  * Copyright (C) 2014, Freescale Semiconductor, Inc.
0005  */
0006
0007 #include <linux/mtd/spi-nor.h>
0008
0009 #include "core.h"
0010
0011 static int
0012 mx25l25635_post_bfpt_fixups(struct spi_nor *nor,
0013                 const struct sfdp_parameter_header *bfpt_header,
0014                 const struct sfdp_bfpt *bfpt)
0015 {
0016     /*
0017      * MX25L25635F supports 4B opcodes but MX25L25635E does not.
0018      * Unfortunately, Macronix has re-used the same JEDEC ID for both
0019      * variants which prevents us from defining a new entry in the parts
0020      * table.
0021      * We need a way to differentiate MX25L25635E and MX25L25635F, and it
0022      * seems that the F version advertises support for Fast Read 4-4-4 in
0023      * its BFPT table.
0024      */
0025     if (bfpt->dwords[BFPT_DWORD(5)] & BFPT_DWORD5_FAST_READ_4_4_4)
0026         nor->flags |= SNOR_F_4B_OPCODES;
0027
0028     return 0;
0029 }
0030
0031 static const struct spi_nor_fixups mx25l25635_fixups = {
0032     .post_bfpt = mx25l25635_post_bfpt_fixups,
0033 };
0034
0035 static const struct flash_info macronix_nor_parts[] = {
0036     /* Macronix */
0037     { "mx25l512e",   INFO(0xc22010, 0, 64 * 1024,   1)
0038         NO_SFDP_FLAGS(SECT_4K) },
0039     { "mx25l2005a",  INFO(0xc22012, 0, 64 * 1024,   4)
0040         NO_SFDP_FLAGS(SECT_4K) },
0041     { "mx25l4005a",  INFO(0xc22013, 0, 64 * 1024,   8)
0042         NO_SFDP_FLAGS(SECT_4K) },
0043     { "mx25l8005",   INFO(0xc22014, 0, 64 * 1024,  16) },
0044     { "mx25l1606e",  INFO(0xc22015, 0, 64 * 1024,  32)
0045         NO_SFDP_FLAGS(SECT_4K) },
0046     { "mx25l3205d",  INFO(0xc22016, 0, 64 * 1024,  64)
0047         NO_SFDP_FLAGS(SECT_4K) },
0048     { "mx25l3255e",  INFO(0xc29e16, 0, 64 * 1024,  64)
0049         NO_SFDP_FLAGS(SECT_4K) },
0050     { "mx25l6405d",  INFO(0xc22017, 0, 64 * 1024, 128)
0051         NO_SFDP_FLAGS(SECT_4K) },
0052     { "mx25u2033e",  INFO(0xc22532, 0, 64 * 1024,   4)
0053         NO_SFDP_FLAGS(SECT_4K) },
0054     { "mx25u3235f",  INFO(0xc22536, 0, 64 * 1024,  64)
0055         NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
0056                   SPI_NOR_QUAD_READ) },
0057     { "mx25u4035",   INFO(0xc22533, 0, 64 * 1024,   8)
0058         NO_SFDP_FLAGS(SECT_4K) },
0059     { "mx25u8035",   INFO(0xc22534, 0, 64 * 1024,  16)
0060         NO_SFDP_FLAGS(SECT_4K) },
0061     { "mx25u6435f",  INFO(0xc22537, 0, 64 * 1024, 128)
0062         NO_SFDP_FLAGS(SECT_4K) },
0063     { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256)
0064         FLAGS(SPI_NOR_HAS_LOCK | SPI_NOR_4BIT_BP)
0065         NO_SFDP_FLAGS(SECT_4K) },
0066     { "mx25l12855e", INFO(0xc22618, 0, 64 * 1024, 256) },
0067     { "mx25r1635f",  INFO(0xc22815, 0, 64 * 1024,  32)
0068         NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
0069                   SPI_NOR_QUAD_READ) },
0070     { "mx25r3235f",  INFO(0xc22816, 0, 64 * 1024,  64)
0071         NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
0072                   SPI_NOR_QUAD_READ) },
0073     { "mx25u12835f", INFO(0xc22538, 0, 64 * 1024, 256)
0074         NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
0075                   SPI_NOR_QUAD_READ) },
0076     { "mx25l25635e", INFO(0xc22019, 0, 64 * 1024, 512)
0077         NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
0078         .fixups = &mx25l25635_fixups },
0079     { "mx25u25635f", INFO(0xc22539, 0, 64 * 1024, 512)
0080         NO_SFDP_FLAGS(SECT_4K)
0081         FIXUP_FLAGS(SPI_NOR_4B_OPCODES) },
0082     { "mx25u51245g", INFO(0xc2253a, 0, 64 * 1024, 1024)
0083         NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
0084         FIXUP_FLAGS(SPI_NOR_4B_OPCODES) },
0085     { "mx25v8035f",  INFO(0xc22314, 0, 64 * 1024,  16)
0086         NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
0087                   SPI_NOR_QUAD_READ) },
0088     { "mx25l25655e", INFO(0xc22619, 0, 64 * 1024, 512) },
0089     { "mx66l51235f", INFO(0xc2201a, 0, 64 * 1024, 1024)
0090         NO_SFDP_FLAGS(SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
0091         FIXUP_FLAGS(SPI_NOR_4B_OPCODES) },
0092     { "mx66u51235f", INFO(0xc2253a, 0, 64 * 1024, 1024)
0093         NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
0094         FIXUP_FLAGS(SPI_NOR_4B_OPCODES) },
0095     { "mx66l1g45g",  INFO(0xc2201b, 0, 64 * 1024, 2048)
0096         NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ |
0097                   SPI_NOR_QUAD_READ) },
0098     { "mx66l1g55g",  INFO(0xc2261b, 0, 64 * 1024, 2048)
0099         NO_SFDP_FLAGS(SPI_NOR_QUAD_READ) },
0100     { "mx66u2g45g",  INFO(0xc2253c, 0, 64 * 1024, 4096)
0101         NO_SFDP_FLAGS(SECT_4K | SPI_NOR_DUAL_READ | SPI_NOR_QUAD_READ)
0102         FIXUP_FLAGS(SPI_NOR_4B_OPCODES) },
0103 };
0104
0105 static void macronix_nor_default_init(struct spi_nor *nor)
0106 {
0107     nor->params->quad_enable = spi_nor_sr1_bit6_quad_enable;
0108     nor->params->set_4byte_addr_mode = spi_nor_set_4byte_addr_mode;
0109 }
0110
0111 static const struct spi_nor_fixups macronix_nor_fixups = {
0112     .default_init = macronix_nor_default_init,
0113 };
0114
0115 const struct spi_nor_manufacturer spi_nor_macronix = {
0116     .name = "macronix",
0117     .parts = macronix_nor_parts,
0118     .nparts = ARRAY_SIZE(macronix_nor_parts),
0119     .fixups = &macronix_nor_fixups,
0120 };