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0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Copyright (C) 2005, Intec Automation Inc.
0004  * Copyright (C) 2014, Freescale Semiconductor, Inc.
0005  */
0006 
0007 #ifndef __LINUX_MTD_SPI_NOR_INTERNAL_H
0008 #define __LINUX_MTD_SPI_NOR_INTERNAL_H
0009 
0010 #include "sfdp.h"
0011 
0012 #define SPI_NOR_MAX_ID_LEN  6
0013 
0014 /* Standard SPI NOR flash operations. */
0015 #define SPI_NOR_READID_OP(naddr, ndummy, buf, len)          \
0016     SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDID, 0),           \
0017            SPI_MEM_OP_ADDR(naddr, 0, 0),            \
0018            SPI_MEM_OP_DUMMY(ndummy, 0),             \
0019            SPI_MEM_OP_DATA_IN(len, buf, 0))
0020 
0021 #define SPI_NOR_WREN_OP                         \
0022     SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WREN, 0),           \
0023            SPI_MEM_OP_NO_ADDR,                  \
0024            SPI_MEM_OP_NO_DUMMY,                 \
0025            SPI_MEM_OP_NO_DATA)
0026 
0027 #define SPI_NOR_WRDI_OP                         \
0028     SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRDI, 0),           \
0029            SPI_MEM_OP_NO_ADDR,                  \
0030            SPI_MEM_OP_NO_DUMMY,                 \
0031            SPI_MEM_OP_NO_DATA)
0032 
0033 #define SPI_NOR_RDSR_OP(buf)                        \
0034     SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDSR, 0),           \
0035            SPI_MEM_OP_NO_ADDR,                  \
0036            SPI_MEM_OP_NO_DUMMY,                 \
0037            SPI_MEM_OP_DATA_IN(1, buf, 0))
0038 
0039 #define SPI_NOR_WRSR_OP(buf, len)                   \
0040     SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRSR, 0),           \
0041            SPI_MEM_OP_NO_ADDR,                  \
0042            SPI_MEM_OP_NO_DUMMY,                 \
0043            SPI_MEM_OP_DATA_OUT(len, buf, 0))
0044 
0045 #define SPI_NOR_RDSR2_OP(buf)                       \
0046     SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDSR2, 0),          \
0047            SPI_MEM_OP_NO_ADDR,                  \
0048            SPI_MEM_OP_NO_DUMMY,                 \
0049            SPI_MEM_OP_DATA_OUT(1, buf, 0))
0050 
0051 #define SPI_NOR_WRSR2_OP(buf)                       \
0052     SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_WRSR2, 0),          \
0053            SPI_MEM_OP_NO_ADDR,                  \
0054            SPI_MEM_OP_NO_DUMMY,                 \
0055            SPI_MEM_OP_DATA_OUT(1, buf, 0))
0056 
0057 #define SPI_NOR_RDCR_OP(buf)                        \
0058     SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_RDCR, 0),           \
0059            SPI_MEM_OP_NO_ADDR,                  \
0060            SPI_MEM_OP_NO_DUMMY,                 \
0061            SPI_MEM_OP_DATA_IN(1, buf, 0))
0062 
0063 #define SPI_NOR_EN4B_EX4B_OP(enable)                    \
0064     SPI_MEM_OP(SPI_MEM_OP_CMD(enable ? SPINOR_OP_EN4B : SPINOR_OP_EX4B, 0), \
0065            SPI_MEM_OP_NO_ADDR,                  \
0066            SPI_MEM_OP_NO_DUMMY,                 \
0067            SPI_MEM_OP_NO_DATA)
0068 
0069 #define SPI_NOR_BRWR_OP(buf)                        \
0070     SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_BRWR, 0),           \
0071            SPI_MEM_OP_NO_ADDR,                  \
0072            SPI_MEM_OP_NO_DUMMY,                 \
0073            SPI_MEM_OP_DATA_OUT(1, buf, 0))
0074 
0075 #define SPI_NOR_GBULK_OP                        \
0076     SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_GBULK, 0),          \
0077            SPI_MEM_OP_NO_ADDR,                  \
0078            SPI_MEM_OP_NO_DUMMY,                 \
0079            SPI_MEM_OP_NO_DATA)
0080 
0081 #define SPI_NOR_CHIP_ERASE_OP                       \
0082     SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_CHIP_ERASE, 0),     \
0083            SPI_MEM_OP_NO_ADDR,                  \
0084            SPI_MEM_OP_NO_DUMMY,                 \
0085            SPI_MEM_OP_NO_DATA)
0086 
0087 #define SPI_NOR_SECTOR_ERASE_OP(opcode, addr_nbytes, addr)      \
0088     SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0),               \
0089            SPI_MEM_OP_ADDR(addr_nbytes, addr, 0),       \
0090            SPI_MEM_OP_NO_DUMMY,                 \
0091            SPI_MEM_OP_NO_DATA)
0092 
0093 #define SPI_NOR_READ_OP(opcode)                     \
0094     SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0),               \
0095            SPI_MEM_OP_ADDR(3, 0, 0),                \
0096            SPI_MEM_OP_DUMMY(1, 0),              \
0097            SPI_MEM_OP_DATA_IN(2, NULL, 0))
0098 
0099 #define SPI_NOR_PP_OP(opcode)                       \
0100     SPI_MEM_OP(SPI_MEM_OP_CMD(opcode, 0),               \
0101            SPI_MEM_OP_ADDR(3, 0, 0),                \
0102            SPI_MEM_OP_NO_DUMMY,                 \
0103            SPI_MEM_OP_DATA_OUT(2, NULL, 0))
0104 
0105 #define SPINOR_SRSTEN_OP                        \
0106     SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_SRSTEN, 0),         \
0107            SPI_MEM_OP_NO_DUMMY,                 \
0108            SPI_MEM_OP_NO_ADDR,                  \
0109            SPI_MEM_OP_NO_DATA)
0110 
0111 #define SPINOR_SRST_OP                          \
0112     SPI_MEM_OP(SPI_MEM_OP_CMD(SPINOR_OP_SRST, 0),           \
0113            SPI_MEM_OP_NO_DUMMY,                 \
0114            SPI_MEM_OP_NO_ADDR,                  \
0115            SPI_MEM_OP_NO_DATA)
0116 
0117 /* Keep these in sync with the list in debugfs.c */
0118 enum spi_nor_option_flags {
0119     SNOR_F_HAS_SR_TB    = BIT(0),
0120     SNOR_F_NO_OP_CHIP_ERASE = BIT(1),
0121     SNOR_F_BROKEN_RESET = BIT(2),
0122     SNOR_F_4B_OPCODES   = BIT(3),
0123     SNOR_F_HAS_4BAIT    = BIT(4),
0124     SNOR_F_HAS_LOCK     = BIT(5),
0125     SNOR_F_HAS_16BIT_SR = BIT(6),
0126     SNOR_F_NO_READ_CR   = BIT(7),
0127     SNOR_F_HAS_SR_TB_BIT6   = BIT(8),
0128     SNOR_F_HAS_4BIT_BP      = BIT(9),
0129     SNOR_F_HAS_SR_BP3_BIT6  = BIT(10),
0130     SNOR_F_IO_MODE_EN_VOLATILE = BIT(11),
0131     SNOR_F_SOFT_RESET   = BIT(12),
0132     SNOR_F_SWP_IS_VOLATILE  = BIT(13),
0133 };
0134 
0135 struct spi_nor_read_command {
0136     u8          num_mode_clocks;
0137     u8          num_wait_states;
0138     u8          opcode;
0139     enum spi_nor_protocol   proto;
0140 };
0141 
0142 struct spi_nor_pp_command {
0143     u8          opcode;
0144     enum spi_nor_protocol   proto;
0145 };
0146 
0147 enum spi_nor_read_command_index {
0148     SNOR_CMD_READ,
0149     SNOR_CMD_READ_FAST,
0150     SNOR_CMD_READ_1_1_1_DTR,
0151 
0152     /* Dual SPI */
0153     SNOR_CMD_READ_1_1_2,
0154     SNOR_CMD_READ_1_2_2,
0155     SNOR_CMD_READ_2_2_2,
0156     SNOR_CMD_READ_1_2_2_DTR,
0157 
0158     /* Quad SPI */
0159     SNOR_CMD_READ_1_1_4,
0160     SNOR_CMD_READ_1_4_4,
0161     SNOR_CMD_READ_4_4_4,
0162     SNOR_CMD_READ_1_4_4_DTR,
0163 
0164     /* Octal SPI */
0165     SNOR_CMD_READ_1_1_8,
0166     SNOR_CMD_READ_1_8_8,
0167     SNOR_CMD_READ_8_8_8,
0168     SNOR_CMD_READ_1_8_8_DTR,
0169     SNOR_CMD_READ_8_8_8_DTR,
0170 
0171     SNOR_CMD_READ_MAX
0172 };
0173 
0174 enum spi_nor_pp_command_index {
0175     SNOR_CMD_PP,
0176 
0177     /* Quad SPI */
0178     SNOR_CMD_PP_1_1_4,
0179     SNOR_CMD_PP_1_4_4,
0180     SNOR_CMD_PP_4_4_4,
0181 
0182     /* Octal SPI */
0183     SNOR_CMD_PP_1_1_8,
0184     SNOR_CMD_PP_1_8_8,
0185     SNOR_CMD_PP_8_8_8,
0186     SNOR_CMD_PP_8_8_8_DTR,
0187 
0188     SNOR_CMD_PP_MAX
0189 };
0190 
0191 /**
0192  * struct spi_nor_erase_type - Structure to describe a SPI NOR erase type
0193  * @size:       the size of the sector/block erased by the erase type.
0194  *          JEDEC JESD216B imposes erase sizes to be a power of 2.
0195  * @size_shift:     @size is a power of 2, the shift is stored in
0196  *          @size_shift.
0197  * @size_mask:      the size mask based on @size_shift.
0198  * @opcode:     the SPI command op code to erase the sector/block.
0199  * @idx:        Erase Type index as sorted in the Basic Flash Parameter
0200  *          Table. It will be used to synchronize the supported
0201  *          Erase Types with the ones identified in the SFDP
0202  *          optional tables.
0203  */
0204 struct spi_nor_erase_type {
0205     u32 size;
0206     u32 size_shift;
0207     u32 size_mask;
0208     u8  opcode;
0209     u8  idx;
0210 };
0211 
0212 /**
0213  * struct spi_nor_erase_command - Used for non-uniform erases
0214  * The structure is used to describe a list of erase commands to be executed
0215  * once we validate that the erase can be performed. The elements in the list
0216  * are run-length encoded.
0217  * @list:       for inclusion into the list of erase commands.
0218  * @count:      how many times the same erase command should be
0219  *          consecutively used.
0220  * @size:       the size of the sector/block erased by the command.
0221  * @opcode:     the SPI command op code to erase the sector/block.
0222  */
0223 struct spi_nor_erase_command {
0224     struct list_head    list;
0225     u32         count;
0226     u32         size;
0227     u8          opcode;
0228 };
0229 
0230 /**
0231  * struct spi_nor_erase_region - Structure to describe a SPI NOR erase region
0232  * @offset:     the offset in the data array of erase region start.
0233  *          LSB bits are used as a bitmask encoding flags to
0234  *          determine if this region is overlaid, if this region is
0235  *          the last in the SPI NOR flash memory and to indicate
0236  *          all the supported erase commands inside this region.
0237  *          The erase types are sorted in ascending order with the
0238  *          smallest Erase Type size being at BIT(0).
0239  * @size:       the size of the region in bytes.
0240  */
0241 struct spi_nor_erase_region {
0242     u64     offset;
0243     u64     size;
0244 };
0245 
0246 #define SNOR_ERASE_TYPE_MAX 4
0247 #define SNOR_ERASE_TYPE_MASK    GENMASK_ULL(SNOR_ERASE_TYPE_MAX - 1, 0)
0248 
0249 #define SNOR_LAST_REGION    BIT(4)
0250 #define SNOR_OVERLAID_REGION    BIT(5)
0251 
0252 #define SNOR_ERASE_FLAGS_MAX    6
0253 #define SNOR_ERASE_FLAGS_MASK   GENMASK_ULL(SNOR_ERASE_FLAGS_MAX - 1, 0)
0254 
0255 /**
0256  * struct spi_nor_erase_map - Structure to describe the SPI NOR erase map
0257  * @regions:        array of erase regions. The regions are consecutive in
0258  *          address space. Walking through the regions is done
0259  *          incrementally.
0260  * @uniform_region: a pre-allocated erase region for SPI NOR with a uniform
0261  *          sector size (legacy implementation).
0262  * @erase_type:     an array of erase types shared by all the regions.
0263  *          The erase types are sorted in ascending order, with the
0264  *          smallest Erase Type size being the first member in the
0265  *          erase_type array.
0266  * @uniform_erase_type: bitmask encoding erase types that can erase the
0267  *          entire memory. This member is completed at init by
0268  *          uniform and non-uniform SPI NOR flash memories if they
0269  *          support at least one erase type that can erase the
0270  *          entire memory.
0271  */
0272 struct spi_nor_erase_map {
0273     struct spi_nor_erase_region *regions;
0274     struct spi_nor_erase_region uniform_region;
0275     struct spi_nor_erase_type   erase_type[SNOR_ERASE_TYPE_MAX];
0276     u8              uniform_erase_type;
0277 };
0278 
0279 /**
0280  * struct spi_nor_locking_ops - SPI NOR locking methods
0281  * @lock:   lock a region of the SPI NOR.
0282  * @unlock: unlock a region of the SPI NOR.
0283  * @is_locked:  check if a region of the SPI NOR is completely locked
0284  */
0285 struct spi_nor_locking_ops {
0286     int (*lock)(struct spi_nor *nor, loff_t ofs, uint64_t len);
0287     int (*unlock)(struct spi_nor *nor, loff_t ofs, uint64_t len);
0288     int (*is_locked)(struct spi_nor *nor, loff_t ofs, uint64_t len);
0289 };
0290 
0291 /**
0292  * struct spi_nor_otp_organization - Structure to describe the SPI NOR OTP regions
0293  * @len:    size of one OTP region in bytes.
0294  * @base:   start address of the OTP area.
0295  * @offset: offset between consecutive OTP regions if there are more
0296  *              than one.
0297  * @n_regions:  number of individual OTP regions.
0298  */
0299 struct spi_nor_otp_organization {
0300     size_t len;
0301     loff_t base;
0302     loff_t offset;
0303     unsigned int n_regions;
0304 };
0305 
0306 /**
0307  * struct spi_nor_otp_ops - SPI NOR OTP methods
0308  * @read:   read from the SPI NOR OTP area.
0309  * @write:  write to the SPI NOR OTP area.
0310  * @lock:   lock an OTP region.
0311  * @erase:  erase an OTP region.
0312  * @is_locked:  check if an OTP region of the SPI NOR is locked.
0313  */
0314 struct spi_nor_otp_ops {
0315     int (*read)(struct spi_nor *nor, loff_t addr, size_t len, u8 *buf);
0316     int (*write)(struct spi_nor *nor, loff_t addr, size_t len,
0317              const u8 *buf);
0318     int (*lock)(struct spi_nor *nor, unsigned int region);
0319     int (*erase)(struct spi_nor *nor, loff_t addr);
0320     int (*is_locked)(struct spi_nor *nor, unsigned int region);
0321 };
0322 
0323 /**
0324  * struct spi_nor_otp - SPI NOR OTP grouping structure
0325  * @org:    OTP region organization
0326  * @ops:    OTP access ops
0327  */
0328 struct spi_nor_otp {
0329     const struct spi_nor_otp_organization *org;
0330     const struct spi_nor_otp_ops *ops;
0331 };
0332 
0333 /**
0334  * struct spi_nor_flash_parameter - SPI NOR flash parameters and settings.
0335  * Includes legacy flash parameters and settings that can be overwritten
0336  * by the spi_nor_fixups hooks, or dynamically when parsing the JESD216
0337  * Serial Flash Discoverable Parameters (SFDP) tables.
0338  *
0339  * @size:       the flash memory density in bytes.
0340  * @writesize       Minimal writable flash unit size. Defaults to 1. Set to
0341  *          ECC unit size for ECC-ed flashes.
0342  * @page_size:      the page size of the SPI NOR flash memory.
0343  * @addr_nbytes:    number of address bytes to send.
0344  * @addr_mode_nbytes:   number of address bytes of current address mode. Useful
0345  *          when the flash operates with 4B opcodes but needs the
0346  *          internal address mode for opcodes that don't have a 4B
0347  *          opcode correspondent.
0348  * @rdsr_dummy:     dummy cycles needed for Read Status Register command
0349  *          in octal DTR mode.
0350  * @rdsr_addr_nbytes:   dummy address bytes needed for Read Status Register
0351  *          command in octal DTR mode.
0352  * @hwcaps:     describes the read and page program hardware
0353  *          capabilities.
0354  * @reads:      read capabilities ordered by priority: the higher index
0355  *                      in the array, the higher priority.
0356  * @page_programs:  page program capabilities ordered by priority: the
0357  *                      higher index in the array, the higher priority.
0358  * @erase_map:      the erase map parsed from the SFDP Sector Map Parameter
0359  *                      Table.
0360  * @otp:        SPI NOR OTP info.
0361  * @octal_dtr_enable:   enables SPI NOR octal DTR mode.
0362  * @quad_enable:    enables SPI NOR quad mode.
0363  * @set_4byte_addr_mode: puts the SPI NOR in 4 byte addressing mode.
0364  * @convert_addr:   converts an absolute address into something the flash
0365  *                      will understand. Particularly useful when pagesize is
0366  *                      not a power-of-2.
0367  * @setup:      (optional) configures the SPI NOR memory. Useful for
0368  *          SPI NOR flashes that have peculiarities to the SPI NOR
0369  *          standard e.g. different opcodes, specific address
0370  *          calculation, page size, etc.
0371  * @ready:      (optional) flashes might use a different mechanism
0372  *          than reading the status register to indicate they
0373  *          are ready for a new command
0374  * @locking_ops:    SPI NOR locking methods.
0375  */
0376 struct spi_nor_flash_parameter {
0377     u64             size;
0378     u32             writesize;
0379     u32             page_size;
0380     u8              addr_nbytes;
0381     u8              addr_mode_nbytes;
0382     u8              rdsr_dummy;
0383     u8              rdsr_addr_nbytes;
0384 
0385     struct spi_nor_hwcaps       hwcaps;
0386     struct spi_nor_read_command reads[SNOR_CMD_READ_MAX];
0387     struct spi_nor_pp_command   page_programs[SNOR_CMD_PP_MAX];
0388 
0389     struct spi_nor_erase_map        erase_map;
0390     struct spi_nor_otp      otp;
0391 
0392     int (*octal_dtr_enable)(struct spi_nor *nor, bool enable);
0393     int (*quad_enable)(struct spi_nor *nor);
0394     int (*set_4byte_addr_mode)(struct spi_nor *nor, bool enable);
0395     u32 (*convert_addr)(struct spi_nor *nor, u32 addr);
0396     int (*setup)(struct spi_nor *nor, const struct spi_nor_hwcaps *hwcaps);
0397     int (*ready)(struct spi_nor *nor);
0398 
0399     const struct spi_nor_locking_ops *locking_ops;
0400 };
0401 
0402 /**
0403  * struct spi_nor_fixups - SPI NOR fixup hooks
0404  * @default_init: called after default flash parameters init. Used to tweak
0405  *                flash parameters when information provided by the flash_info
0406  *                table is incomplete or wrong.
0407  * @post_bfpt: called after the BFPT table has been parsed
0408  * @post_sfdp: called after SFDP has been parsed (is also called for SPI NORs
0409  *             that do not support RDSFDP). Typically used to tweak various
0410  *             parameters that could not be extracted by other means (i.e.
0411  *             when information provided by the SFDP/flash_info tables are
0412  *             incomplete or wrong).
0413  * @late_init: used to initialize flash parameters that are not declared in the
0414  *             JESD216 SFDP standard, or where SFDP tables not defined at all.
0415  *             Will replace the default_init() hook.
0416  *
0417  * Those hooks can be used to tweak the SPI NOR configuration when the SFDP
0418  * table is broken or not available.
0419  */
0420 struct spi_nor_fixups {
0421     void (*default_init)(struct spi_nor *nor);
0422     int (*post_bfpt)(struct spi_nor *nor,
0423              const struct sfdp_parameter_header *bfpt_header,
0424              const struct sfdp_bfpt *bfpt);
0425     void (*post_sfdp)(struct spi_nor *nor);
0426     void (*late_init)(struct spi_nor *nor);
0427 };
0428 
0429 /**
0430  * struct flash_info - SPI NOR flash_info entry.
0431  * @name: the name of the flash.
0432  * @id:             the flash's ID bytes. The first three bytes are the
0433  *                  JEDIC ID. JEDEC ID zero means "no ID" (mostly older chips).
0434  * @id_len:         the number of bytes of ID.
0435  * @sector_size:    the size listed here is what works with SPINOR_OP_SE, which
0436  *                  isn't necessarily called a "sector" by the vendor.
0437  * @n_sectors:      the number of sectors.
0438  * @page_size:      the flash's page size.
0439  * @addr_nbytes:    number of address bytes to send.
0440  *
0441  * @parse_sfdp:     true when flash supports SFDP tables. The false value has no
0442  *                  meaning. If one wants to skip the SFDP tables, one should
0443  *                  instead use the SPI_NOR_SKIP_SFDP sfdp_flag.
0444  * @flags:          flags that indicate support that is not defined by the
0445  *                  JESD216 standard in its SFDP tables. Flag meanings:
0446  *   SPI_NOR_HAS_LOCK:        flash supports lock/unlock via SR
0447  *   SPI_NOR_HAS_TB:          flash SR has Top/Bottom (TB) protect bit. Must be
0448  *                            used with SPI_NOR_HAS_LOCK.
0449  *   SPI_NOR_TB_SR_BIT6:      Top/Bottom (TB) is bit 6 of status register.
0450  *                            Must be used with SPI_NOR_HAS_TB.
0451  *   SPI_NOR_4BIT_BP:         flash SR has 4 bit fields (BP0-3) for block
0452  *                            protection.
0453  *   SPI_NOR_BP3_SR_BIT6:     BP3 is bit 6 of status register. Must be used with
0454  *                            SPI_NOR_4BIT_BP.
0455  *   SPI_NOR_SWP_IS_VOLATILE: flash has volatile software write protection bits.
0456  *                            Usually these will power-up in a write-protected
0457  *                            state.
0458  *   SPI_NOR_NO_ERASE:        no erase command needed.
0459  *   NO_CHIP_ERASE:           chip does not support chip erase.
0460  *   SPI_NOR_NO_FR:           can't do fastread.
0461  *
0462  * @no_sfdp_flags:  flags that indicate support that can be discovered via SFDP.
0463  *                  Used when SFDP tables are not defined in the flash. These
0464  *                  flags are used together with the SPI_NOR_SKIP_SFDP flag.
0465  *   SPI_NOR_SKIP_SFDP:       skip parsing of SFDP tables.
0466  *   SECT_4K:                 SPINOR_OP_BE_4K works uniformly.
0467  *   SPI_NOR_DUAL_READ:       flash supports Dual Read.
0468  *   SPI_NOR_QUAD_READ:       flash supports Quad Read.
0469  *   SPI_NOR_OCTAL_READ:      flash supports Octal Read.
0470  *   SPI_NOR_OCTAL_DTR_READ:  flash supports octal DTR Read.
0471  *   SPI_NOR_OCTAL_DTR_PP:    flash supports Octal DTR Page Program.
0472  *
0473  * @fixup_flags:    flags that indicate support that can be discovered via SFDP
0474  *                  ideally, but can not be discovered for this particular flash
0475  *                  because the SFDP table that indicates this support is not
0476  *                  defined by the flash. In case the table for this support is
0477  *                  defined but has wrong values, one should instead use a
0478  *                  post_sfdp() hook to set the SNOR_F equivalent flag.
0479  *
0480  *   SPI_NOR_4B_OPCODES:      use dedicated 4byte address op codes to support
0481  *                            memory size above 128Mib.
0482  *   SPI_NOR_IO_MODE_EN_VOLATILE: flash enables the best available I/O mode
0483  *                            via a volatile bit.
0484  * @mfr_flags:      manufacturer private flags. Used in the manufacturer fixup
0485  *                  hooks to differentiate support between flashes of the same
0486  *                  manufacturer.
0487  * @otp_org:        flash's OTP organization.
0488  * @fixups:         part specific fixup hooks.
0489  */
0490 struct flash_info {
0491     char *name;
0492     u8 id[SPI_NOR_MAX_ID_LEN];
0493     u8 id_len;
0494     unsigned sector_size;
0495     u16 n_sectors;
0496     u16 page_size;
0497     u8 addr_nbytes;
0498 
0499     bool parse_sfdp;
0500     u16 flags;
0501 #define SPI_NOR_HAS_LOCK        BIT(0)
0502 #define SPI_NOR_HAS_TB          BIT(1)
0503 #define SPI_NOR_TB_SR_BIT6      BIT(2)
0504 #define SPI_NOR_4BIT_BP         BIT(3)
0505 #define SPI_NOR_BP3_SR_BIT6     BIT(4)
0506 #define SPI_NOR_SWP_IS_VOLATILE     BIT(5)
0507 #define SPI_NOR_NO_ERASE        BIT(6)
0508 #define NO_CHIP_ERASE           BIT(7)
0509 #define SPI_NOR_NO_FR           BIT(8)
0510 
0511     u8 no_sfdp_flags;
0512 #define SPI_NOR_SKIP_SFDP       BIT(0)
0513 #define SECT_4K             BIT(1)
0514 #define SPI_NOR_DUAL_READ       BIT(3)
0515 #define SPI_NOR_QUAD_READ       BIT(4)
0516 #define SPI_NOR_OCTAL_READ      BIT(5)
0517 #define SPI_NOR_OCTAL_DTR_READ      BIT(6)
0518 #define SPI_NOR_OCTAL_DTR_PP        BIT(7)
0519 
0520     u8 fixup_flags;
0521 #define SPI_NOR_4B_OPCODES      BIT(0)
0522 #define SPI_NOR_IO_MODE_EN_VOLATILE BIT(1)
0523 
0524     u8 mfr_flags;
0525 
0526     const struct spi_nor_otp_organization otp_org;
0527     const struct spi_nor_fixups *fixups;
0528 };
0529 
0530 /* Used when the "_ext_id" is two bytes at most */
0531 #define INFO(_jedec_id, _ext_id, _sector_size, _n_sectors)      \
0532         .id = {                         \
0533             ((_jedec_id) >> 16) & 0xff,         \
0534             ((_jedec_id) >> 8) & 0xff,          \
0535             (_jedec_id) & 0xff,             \
0536             ((_ext_id) >> 8) & 0xff,            \
0537             (_ext_id) & 0xff,               \
0538             },                      \
0539         .id_len = (!(_jedec_id) ? 0 : (3 + ((_ext_id) ? 2 : 0))),   \
0540         .sector_size = (_sector_size),              \
0541         .n_sectors = (_n_sectors),              \
0542         .page_size = 256,                   \
0543 
0544 #define INFO6(_jedec_id, _ext_id, _sector_size, _n_sectors)     \
0545         .id = {                         \
0546             ((_jedec_id) >> 16) & 0xff,         \
0547             ((_jedec_id) >> 8) & 0xff,          \
0548             (_jedec_id) & 0xff,             \
0549             ((_ext_id) >> 16) & 0xff,           \
0550             ((_ext_id) >> 8) & 0xff,            \
0551             (_ext_id) & 0xff,               \
0552             },                      \
0553         .id_len = 6,                        \
0554         .sector_size = (_sector_size),              \
0555         .n_sectors = (_n_sectors),              \
0556         .page_size = 256,                   \
0557 
0558 #define CAT25_INFO(_sector_size, _n_sectors, _page_size, _addr_nbytes)  \
0559         .sector_size = (_sector_size),              \
0560         .n_sectors = (_n_sectors),              \
0561         .page_size = (_page_size),              \
0562         .addr_nbytes = (_addr_nbytes),              \
0563         .flags = SPI_NOR_NO_ERASE | SPI_NOR_NO_FR,      \
0564 
0565 #define OTP_INFO(_len, _n_regions, _base, _offset)          \
0566         .otp_org = {                        \
0567             .len = (_len),                  \
0568             .base = (_base),                \
0569             .offset = (_offset),                \
0570             .n_regions = (_n_regions),          \
0571         },
0572 
0573 #define PARSE_SFDP                          \
0574     .parse_sfdp = true,                     \
0575 
0576 #define FLAGS(_flags)                           \
0577         .flags = (_flags),                  \
0578 
0579 #define NO_SFDP_FLAGS(_no_sfdp_flags)                   \
0580         .no_sfdp_flags = (_no_sfdp_flags),          \
0581 
0582 #define FIXUP_FLAGS(_fixup_flags)                   \
0583         .fixup_flags = (_fixup_flags),              \
0584 
0585 #define MFR_FLAGS(_mfr_flags)                       \
0586         .mfr_flags = (_mfr_flags),              \
0587 
0588 /**
0589  * struct spi_nor_manufacturer - SPI NOR manufacturer object
0590  * @name: manufacturer name
0591  * @parts: array of parts supported by this manufacturer
0592  * @nparts: number of entries in the parts array
0593  * @fixups: hooks called at various points in time during spi_nor_scan()
0594  */
0595 struct spi_nor_manufacturer {
0596     const char *name;
0597     const struct flash_info *parts;
0598     unsigned int nparts;
0599     const struct spi_nor_fixups *fixups;
0600 };
0601 
0602 /**
0603  * struct sfdp - SFDP data
0604  * @num_dwords: number of entries in the dwords array
0605  * @dwords: array of double words of the SFDP data
0606  */
0607 struct sfdp {
0608     size_t  num_dwords;
0609     u32 *dwords;
0610 };
0611 
0612 /* Manufacturer drivers. */
0613 extern const struct spi_nor_manufacturer spi_nor_atmel;
0614 extern const struct spi_nor_manufacturer spi_nor_catalyst;
0615 extern const struct spi_nor_manufacturer spi_nor_eon;
0616 extern const struct spi_nor_manufacturer spi_nor_esmt;
0617 extern const struct spi_nor_manufacturer spi_nor_everspin;
0618 extern const struct spi_nor_manufacturer spi_nor_fujitsu;
0619 extern const struct spi_nor_manufacturer spi_nor_gigadevice;
0620 extern const struct spi_nor_manufacturer spi_nor_intel;
0621 extern const struct spi_nor_manufacturer spi_nor_issi;
0622 extern const struct spi_nor_manufacturer spi_nor_macronix;
0623 extern const struct spi_nor_manufacturer spi_nor_micron;
0624 extern const struct spi_nor_manufacturer spi_nor_st;
0625 extern const struct spi_nor_manufacturer spi_nor_spansion;
0626 extern const struct spi_nor_manufacturer spi_nor_sst;
0627 extern const struct spi_nor_manufacturer spi_nor_winbond;
0628 extern const struct spi_nor_manufacturer spi_nor_xilinx;
0629 extern const struct spi_nor_manufacturer spi_nor_xmc;
0630 
0631 extern const struct attribute_group *spi_nor_sysfs_groups[];
0632 
0633 void spi_nor_spimem_setup_op(const struct spi_nor *nor,
0634                  struct spi_mem_op *op,
0635                  const enum spi_nor_protocol proto);
0636 int spi_nor_write_enable(struct spi_nor *nor);
0637 int spi_nor_write_disable(struct spi_nor *nor);
0638 int spi_nor_set_4byte_addr_mode(struct spi_nor *nor, bool enable);
0639 int spi_nor_wait_till_ready(struct spi_nor *nor);
0640 int spi_nor_global_block_unlock(struct spi_nor *nor);
0641 int spi_nor_lock_and_prep(struct spi_nor *nor);
0642 void spi_nor_unlock_and_unprep(struct spi_nor *nor);
0643 int spi_nor_sr1_bit6_quad_enable(struct spi_nor *nor);
0644 int spi_nor_sr2_bit1_quad_enable(struct spi_nor *nor);
0645 int spi_nor_sr2_bit7_quad_enable(struct spi_nor *nor);
0646 int spi_nor_read_id(struct spi_nor *nor, u8 naddr, u8 ndummy, u8 *id,
0647             enum spi_nor_protocol reg_proto);
0648 int spi_nor_read_sr(struct spi_nor *nor, u8 *sr);
0649 int spi_nor_sr_ready(struct spi_nor *nor);
0650 int spi_nor_read_cr(struct spi_nor *nor, u8 *cr);
0651 int spi_nor_write_sr(struct spi_nor *nor, const u8 *sr, size_t len);
0652 int spi_nor_write_sr_and_check(struct spi_nor *nor, u8 sr1);
0653 int spi_nor_write_16bit_cr_and_check(struct spi_nor *nor, u8 cr);
0654 
0655 ssize_t spi_nor_read_data(struct spi_nor *nor, loff_t from, size_t len,
0656               u8 *buf);
0657 ssize_t spi_nor_write_data(struct spi_nor *nor, loff_t to, size_t len,
0658                const u8 *buf);
0659 int spi_nor_read_any_reg(struct spi_nor *nor, struct spi_mem_op *op,
0660              enum spi_nor_protocol proto);
0661 int spi_nor_write_any_volatile_reg(struct spi_nor *nor, struct spi_mem_op *op,
0662                    enum spi_nor_protocol proto);
0663 int spi_nor_erase_sector(struct spi_nor *nor, u32 addr);
0664 
0665 int spi_nor_otp_read_secr(struct spi_nor *nor, loff_t addr, size_t len, u8 *buf);
0666 int spi_nor_otp_write_secr(struct spi_nor *nor, loff_t addr, size_t len,
0667                const u8 *buf);
0668 int spi_nor_otp_erase_secr(struct spi_nor *nor, loff_t addr);
0669 int spi_nor_otp_lock_sr2(struct spi_nor *nor, unsigned int region);
0670 int spi_nor_otp_is_locked_sr2(struct spi_nor *nor, unsigned int region);
0671 
0672 int spi_nor_hwcaps_read2cmd(u32 hwcaps);
0673 int spi_nor_hwcaps_pp2cmd(u32 hwcaps);
0674 u8 spi_nor_convert_3to4_read(u8 opcode);
0675 void spi_nor_set_read_settings(struct spi_nor_read_command *read,
0676                    u8 num_mode_clocks,
0677                    u8 num_wait_states,
0678                    u8 opcode,
0679                    enum spi_nor_protocol proto);
0680 void spi_nor_set_pp_settings(struct spi_nor_pp_command *pp, u8 opcode,
0681                  enum spi_nor_protocol proto);
0682 
0683 void spi_nor_set_erase_type(struct spi_nor_erase_type *erase, u32 size,
0684                 u8 opcode);
0685 struct spi_nor_erase_region *
0686 spi_nor_region_next(struct spi_nor_erase_region *region);
0687 void spi_nor_init_uniform_erase_map(struct spi_nor_erase_map *map,
0688                     u8 erase_mask, u64 flash_size);
0689 
0690 int spi_nor_post_bfpt_fixups(struct spi_nor *nor,
0691                  const struct sfdp_parameter_header *bfpt_header,
0692                  const struct sfdp_bfpt *bfpt);
0693 
0694 void spi_nor_init_default_locking_ops(struct spi_nor *nor);
0695 void spi_nor_try_unlock_all(struct spi_nor *nor);
0696 void spi_nor_set_mtd_locking_ops(struct spi_nor *nor);
0697 void spi_nor_set_mtd_otp_ops(struct spi_nor *nor);
0698 
0699 int spi_nor_controller_ops_read_reg(struct spi_nor *nor, u8 opcode,
0700                     u8 *buf, size_t len);
0701 int spi_nor_controller_ops_write_reg(struct spi_nor *nor, u8 opcode,
0702                      const u8 *buf, size_t len);
0703 
0704 static inline struct spi_nor *mtd_to_spi_nor(struct mtd_info *mtd)
0705 {
0706     return container_of(mtd, struct spi_nor, mtd);
0707 }
0708 
0709 #ifdef CONFIG_DEBUG_FS
0710 void spi_nor_debugfs_register(struct spi_nor *nor);
0711 #else
0712 static inline void spi_nor_debugfs_register(struct spi_nor *nor) {}
0713 #endif
0714 
0715 #endif /* __LINUX_MTD_SPI_NOR_INTERNAL_H */
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