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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Copyright (C) 2017 Free Electrons
0004  * Copyright (C) 2017 NextThing Co
0005  *
0006  * Author: Boris Brezillon <boris.brezillon@free-electrons.com>
0007  */
0008 
0009 #include <linux/slab.h>
0010 
0011 #include "internals.h"
0012 
0013 /*
0014  * Special Micron status bit 3 indicates that the block has been
0015  * corrected by on-die ECC and should be rewritten.
0016  */
0017 #define NAND_ECC_STATUS_WRITE_RECOMMENDED   BIT(3)
0018 
0019 /*
0020  * On chips with 8-bit ECC and additional bit can be used to distinguish
0021  * cases where a errors were corrected without needing a rewrite
0022  *
0023  * Bit 4 Bit 3 Bit 0 Description
0024  * ----- ----- ----- -----------
0025  * 0     0     0     No Errors
0026  * 0     0     1     Multiple uncorrected errors
0027  * 0     1     0     4 - 6 errors corrected, recommend rewrite
0028  * 0     1     1     Reserved
0029  * 1     0     0     1 - 3 errors corrected
0030  * 1     0     1     Reserved
0031  * 1     1     0     7 - 8 errors corrected, recommend rewrite
0032  */
0033 #define NAND_ECC_STATUS_MASK        (BIT(4) | BIT(3) | BIT(0))
0034 #define NAND_ECC_STATUS_UNCORRECTABLE   BIT(0)
0035 #define NAND_ECC_STATUS_4_6_CORRECTED   BIT(3)
0036 #define NAND_ECC_STATUS_1_3_CORRECTED   BIT(4)
0037 #define NAND_ECC_STATUS_7_8_CORRECTED   (BIT(4) | BIT(3))
0038 
0039 struct nand_onfi_vendor_micron {
0040     u8 two_plane_read;
0041     u8 read_cache;
0042     u8 read_unique_id;
0043     u8 dq_imped;
0044     u8 dq_imped_num_settings;
0045     u8 dq_imped_feat_addr;
0046     u8 rb_pulldown_strength;
0047     u8 rb_pulldown_strength_feat_addr;
0048     u8 rb_pulldown_strength_num_settings;
0049     u8 otp_mode;
0050     u8 otp_page_start;
0051     u8 otp_data_prot_addr;
0052     u8 otp_num_pages;
0053     u8 otp_feat_addr;
0054     u8 read_retry_options;
0055     u8 reserved[72];
0056     u8 param_revision;
0057 } __packed;
0058 
0059 struct micron_on_die_ecc {
0060     bool forced;
0061     bool enabled;
0062     void *rawbuf;
0063 };
0064 
0065 struct micron_nand {
0066     struct micron_on_die_ecc ecc;
0067 };
0068 
0069 static int micron_nand_setup_read_retry(struct nand_chip *chip, int retry_mode)
0070 {
0071     u8 feature[ONFI_SUBFEATURE_PARAM_LEN] = {retry_mode};
0072 
0073     return nand_set_features(chip, ONFI_FEATURE_ADDR_READ_RETRY, feature);
0074 }
0075 
0076 /*
0077  * Configure chip properties from Micron vendor-specific ONFI table
0078  */
0079 static int micron_nand_onfi_init(struct nand_chip *chip)
0080 {
0081     struct nand_parameters *p = &chip->parameters;
0082 
0083     if (p->onfi) {
0084         struct nand_onfi_vendor_micron *micron = (void *)p->onfi->vendor;
0085 
0086         chip->read_retries = micron->read_retry_options;
0087         chip->ops.setup_read_retry = micron_nand_setup_read_retry;
0088     }
0089 
0090     if (p->supports_set_get_features) {
0091         set_bit(ONFI_FEATURE_ADDR_READ_RETRY, p->set_feature_list);
0092         set_bit(ONFI_FEATURE_ON_DIE_ECC, p->set_feature_list);
0093         set_bit(ONFI_FEATURE_ADDR_READ_RETRY, p->get_feature_list);
0094         set_bit(ONFI_FEATURE_ON_DIE_ECC, p->get_feature_list);
0095     }
0096 
0097     return 0;
0098 }
0099 
0100 static int micron_nand_on_die_4_ooblayout_ecc(struct mtd_info *mtd,
0101                           int section,
0102                           struct mtd_oob_region *oobregion)
0103 {
0104     if (section >= 4)
0105         return -ERANGE;
0106 
0107     oobregion->offset = (section * 16) + 8;
0108     oobregion->length = 8;
0109 
0110     return 0;
0111 }
0112 
0113 static int micron_nand_on_die_4_ooblayout_free(struct mtd_info *mtd,
0114                            int section,
0115                            struct mtd_oob_region *oobregion)
0116 {
0117     if (section >= 4)
0118         return -ERANGE;
0119 
0120     oobregion->offset = (section * 16) + 2;
0121     oobregion->length = 6;
0122 
0123     return 0;
0124 }
0125 
0126 static const struct mtd_ooblayout_ops micron_nand_on_die_4_ooblayout_ops = {
0127     .ecc = micron_nand_on_die_4_ooblayout_ecc,
0128     .free = micron_nand_on_die_4_ooblayout_free,
0129 };
0130 
0131 static int micron_nand_on_die_8_ooblayout_ecc(struct mtd_info *mtd,
0132                           int section,
0133                           struct mtd_oob_region *oobregion)
0134 {
0135     struct nand_chip *chip = mtd_to_nand(mtd);
0136 
0137     if (section)
0138         return -ERANGE;
0139 
0140     oobregion->offset = mtd->oobsize - chip->ecc.total;
0141     oobregion->length = chip->ecc.total;
0142 
0143     return 0;
0144 }
0145 
0146 static int micron_nand_on_die_8_ooblayout_free(struct mtd_info *mtd,
0147                            int section,
0148                            struct mtd_oob_region *oobregion)
0149 {
0150     struct nand_chip *chip = mtd_to_nand(mtd);
0151 
0152     if (section)
0153         return -ERANGE;
0154 
0155     oobregion->offset = 2;
0156     oobregion->length = mtd->oobsize - chip->ecc.total - 2;
0157 
0158     return 0;
0159 }
0160 
0161 static const struct mtd_ooblayout_ops micron_nand_on_die_8_ooblayout_ops = {
0162     .ecc = micron_nand_on_die_8_ooblayout_ecc,
0163     .free = micron_nand_on_die_8_ooblayout_free,
0164 };
0165 
0166 static int micron_nand_on_die_ecc_setup(struct nand_chip *chip, bool enable)
0167 {
0168     struct micron_nand *micron = nand_get_manufacturer_data(chip);
0169     u8 feature[ONFI_SUBFEATURE_PARAM_LEN] = { 0, };
0170     int ret;
0171 
0172     if (micron->ecc.forced)
0173         return 0;
0174 
0175     if (micron->ecc.enabled == enable)
0176         return 0;
0177 
0178     if (enable)
0179         feature[0] |= ONFI_FEATURE_ON_DIE_ECC_EN;
0180 
0181     ret = nand_set_features(chip, ONFI_FEATURE_ON_DIE_ECC, feature);
0182     if (!ret)
0183         micron->ecc.enabled = enable;
0184 
0185     return ret;
0186 }
0187 
0188 static int micron_nand_on_die_ecc_status_4(struct nand_chip *chip, u8 status,
0189                        void *buf, int page,
0190                        int oob_required)
0191 {
0192     struct micron_nand *micron = nand_get_manufacturer_data(chip);
0193     struct mtd_info *mtd = nand_to_mtd(chip);
0194     unsigned int step, max_bitflips = 0;
0195     bool use_datain = false;
0196     int ret;
0197 
0198     if (!(status & NAND_ECC_STATUS_WRITE_RECOMMENDED)) {
0199         if (status & NAND_STATUS_FAIL)
0200             mtd->ecc_stats.failed++;
0201 
0202         return 0;
0203     }
0204 
0205     /*
0206      * The internal ECC doesn't tell us the number of bitflips that have
0207      * been corrected, but tells us if it recommends to rewrite the block.
0208      * If it's the case, we need to read the page in raw mode and compare
0209      * its content to the corrected version to extract the actual number of
0210      * bitflips.
0211      * But before we do that, we must make sure we have all OOB bytes read
0212      * in non-raw mode, even if the user did not request those bytes.
0213      */
0214     if (!oob_required) {
0215         /*
0216          * We first check which operation is supported by the controller
0217          * before running it. This trick makes it possible to support
0218          * all controllers, even the most constraints, without almost
0219          * any performance hit.
0220          *
0221          * TODO: could be enhanced to avoid repeating the same check
0222          * over and over in the fast path.
0223          */
0224         if (!nand_has_exec_op(chip) ||
0225             !nand_read_data_op(chip, chip->oob_poi, mtd->oobsize, false,
0226                        true))
0227             use_datain = true;
0228 
0229         if (use_datain)
0230             ret = nand_read_data_op(chip, chip->oob_poi,
0231                         mtd->oobsize, false, false);
0232         else
0233             ret = nand_change_read_column_op(chip, mtd->writesize,
0234                              chip->oob_poi,
0235                              mtd->oobsize, false);
0236         if (ret)
0237             return ret;
0238     }
0239 
0240     micron_nand_on_die_ecc_setup(chip, false);
0241 
0242     ret = nand_read_page_op(chip, page, 0, micron->ecc.rawbuf,
0243                 mtd->writesize + mtd->oobsize);
0244     if (ret)
0245         return ret;
0246 
0247     for (step = 0; step < chip->ecc.steps; step++) {
0248         unsigned int offs, i, nbitflips = 0;
0249         u8 *rawbuf, *corrbuf;
0250 
0251         offs = step * chip->ecc.size;
0252         rawbuf = micron->ecc.rawbuf + offs;
0253         corrbuf = buf + offs;
0254 
0255         for (i = 0; i < chip->ecc.size; i++)
0256             nbitflips += hweight8(corrbuf[i] ^ rawbuf[i]);
0257 
0258         offs = (step * 16) + 4;
0259         rawbuf = micron->ecc.rawbuf + mtd->writesize + offs;
0260         corrbuf = chip->oob_poi + offs;
0261 
0262         for (i = 0; i < chip->ecc.bytes + 4; i++)
0263             nbitflips += hweight8(corrbuf[i] ^ rawbuf[i]);
0264 
0265         if (WARN_ON(nbitflips > chip->ecc.strength))
0266             return -EINVAL;
0267 
0268         max_bitflips = max(nbitflips, max_bitflips);
0269         mtd->ecc_stats.corrected += nbitflips;
0270     }
0271 
0272     return max_bitflips;
0273 }
0274 
0275 static int micron_nand_on_die_ecc_status_8(struct nand_chip *chip, u8 status)
0276 {
0277     struct mtd_info *mtd = nand_to_mtd(chip);
0278 
0279     /*
0280      * With 8/512 we have more information but still don't know precisely
0281      * how many bit-flips were seen.
0282      */
0283     switch (status & NAND_ECC_STATUS_MASK) {
0284     case NAND_ECC_STATUS_UNCORRECTABLE:
0285         mtd->ecc_stats.failed++;
0286         return 0;
0287     case NAND_ECC_STATUS_1_3_CORRECTED:
0288         mtd->ecc_stats.corrected += 3;
0289         return 3;
0290     case NAND_ECC_STATUS_4_6_CORRECTED:
0291         mtd->ecc_stats.corrected += 6;
0292         /* rewrite recommended */
0293         return 6;
0294     case NAND_ECC_STATUS_7_8_CORRECTED:
0295         mtd->ecc_stats.corrected += 8;
0296         /* rewrite recommended */
0297         return 8;
0298     default:
0299         return 0;
0300     }
0301 }
0302 
0303 static int
0304 micron_nand_read_page_on_die_ecc(struct nand_chip *chip, uint8_t *buf,
0305                  int oob_required, int page)
0306 {
0307     struct mtd_info *mtd = nand_to_mtd(chip);
0308     bool use_datain = false;
0309     u8 status;
0310     int ret, max_bitflips = 0;
0311 
0312     ret = micron_nand_on_die_ecc_setup(chip, true);
0313     if (ret)
0314         return ret;
0315 
0316     ret = nand_read_page_op(chip, page, 0, NULL, 0);
0317     if (ret)
0318         goto out;
0319 
0320     ret = nand_status_op(chip, &status);
0321     if (ret)
0322         goto out;
0323 
0324     /*
0325      * We first check which operation is supported by the controller before
0326      * running it. This trick makes it possible to support all controllers,
0327      * even the most constraints, without almost any performance hit.
0328      *
0329      * TODO: could be enhanced to avoid repeating the same check over and
0330      * over in the fast path.
0331      */
0332     if (!nand_has_exec_op(chip) ||
0333         !nand_read_data_op(chip, buf, mtd->writesize, false, true))
0334         use_datain = true;
0335 
0336     if (use_datain) {
0337         ret = nand_exit_status_op(chip);
0338         if (ret)
0339             goto out;
0340 
0341         ret = nand_read_data_op(chip, buf, mtd->writesize, false,
0342                     false);
0343         if (!ret && oob_required)
0344             ret = nand_read_data_op(chip, chip->oob_poi,
0345                         mtd->oobsize, false, false);
0346     } else {
0347         ret = nand_change_read_column_op(chip, 0, buf, mtd->writesize,
0348                          false);
0349         if (!ret && oob_required)
0350             ret = nand_change_read_column_op(chip, mtd->writesize,
0351                              chip->oob_poi,
0352                              mtd->oobsize, false);
0353     }
0354 
0355     if (chip->ecc.strength == 4)
0356         max_bitflips = micron_nand_on_die_ecc_status_4(chip, status,
0357                                    buf, page,
0358                                    oob_required);
0359     else
0360         max_bitflips = micron_nand_on_die_ecc_status_8(chip, status);
0361 
0362 out:
0363     micron_nand_on_die_ecc_setup(chip, false);
0364 
0365     return ret ? ret : max_bitflips;
0366 }
0367 
0368 static int
0369 micron_nand_write_page_on_die_ecc(struct nand_chip *chip, const uint8_t *buf,
0370                   int oob_required, int page)
0371 {
0372     int ret;
0373 
0374     ret = micron_nand_on_die_ecc_setup(chip, true);
0375     if (ret)
0376         return ret;
0377 
0378     ret = nand_write_page_raw(chip, buf, oob_required, page);
0379     micron_nand_on_die_ecc_setup(chip, false);
0380 
0381     return ret;
0382 }
0383 
0384 enum {
0385     /* The NAND flash doesn't support on-die ECC */
0386     MICRON_ON_DIE_UNSUPPORTED,
0387 
0388     /*
0389      * The NAND flash supports on-die ECC and it can be
0390      * enabled/disabled by a set features command.
0391      */
0392     MICRON_ON_DIE_SUPPORTED,
0393 
0394     /*
0395      * The NAND flash supports on-die ECC, and it cannot be
0396      * disabled.
0397      */
0398     MICRON_ON_DIE_MANDATORY,
0399 };
0400 
0401 #define MICRON_ID_INTERNAL_ECC_MASK GENMASK(1, 0)
0402 #define MICRON_ID_ECC_ENABLED       BIT(7)
0403 
0404 /*
0405  * Try to detect if the NAND support on-die ECC. To do this, we enable
0406  * the feature, and read back if it has been enabled as expected. We
0407  * also check if it can be disabled, because some Micron NANDs do not
0408  * allow disabling the on-die ECC and we don't support such NANDs for
0409  * now.
0410  *
0411  * This function also has the side effect of disabling on-die ECC if
0412  * it had been left enabled by the firmware/bootloader.
0413  */
0414 static int micron_supports_on_die_ecc(struct nand_chip *chip)
0415 {
0416     const struct nand_ecc_props *requirements =
0417         nanddev_get_ecc_requirements(&chip->base);
0418     u8 id[5];
0419     int ret;
0420 
0421     if (!chip->parameters.onfi)
0422         return MICRON_ON_DIE_UNSUPPORTED;
0423 
0424     if (nanddev_bits_per_cell(&chip->base) != 1)
0425         return MICRON_ON_DIE_UNSUPPORTED;
0426 
0427     /*
0428      * We only support on-die ECC of 4/512 or 8/512
0429      */
0430     if  (requirements->strength != 4 && requirements->strength != 8)
0431         return MICRON_ON_DIE_UNSUPPORTED;
0432 
0433     /* 0x2 means on-die ECC is available. */
0434     if (chip->id.len != 5 ||
0435         (chip->id.data[4] & MICRON_ID_INTERNAL_ECC_MASK) != 0x2)
0436         return MICRON_ON_DIE_UNSUPPORTED;
0437 
0438     /*
0439      * It seems that there are devices which do not support ECC officially.
0440      * At least the MT29F2G08ABAGA / MT29F2G08ABBGA devices supports
0441      * enabling the ECC feature but don't reflect that to the READ_ID table.
0442      * So we have to guarantee that we disable the ECC feature directly
0443      * after we did the READ_ID table command. Later we can evaluate the
0444      * ECC_ENABLE support.
0445      */
0446     ret = micron_nand_on_die_ecc_setup(chip, true);
0447     if (ret)
0448         return MICRON_ON_DIE_UNSUPPORTED;
0449 
0450     ret = nand_readid_op(chip, 0, id, sizeof(id));
0451     if (ret)
0452         return MICRON_ON_DIE_UNSUPPORTED;
0453 
0454     ret = micron_nand_on_die_ecc_setup(chip, false);
0455     if (ret)
0456         return MICRON_ON_DIE_UNSUPPORTED;
0457 
0458     if (!(id[4] & MICRON_ID_ECC_ENABLED))
0459         return MICRON_ON_DIE_UNSUPPORTED;
0460 
0461     ret = nand_readid_op(chip, 0, id, sizeof(id));
0462     if (ret)
0463         return MICRON_ON_DIE_UNSUPPORTED;
0464 
0465     if (id[4] & MICRON_ID_ECC_ENABLED)
0466         return MICRON_ON_DIE_MANDATORY;
0467 
0468     /*
0469      * We only support on-die ECC of 4/512 or 8/512
0470      */
0471     if  (requirements->strength != 4 && requirements->strength != 8)
0472         return MICRON_ON_DIE_UNSUPPORTED;
0473 
0474     return MICRON_ON_DIE_SUPPORTED;
0475 }
0476 
0477 static int micron_nand_init(struct nand_chip *chip)
0478 {
0479     struct nand_device *base = &chip->base;
0480     const struct nand_ecc_props *requirements =
0481         nanddev_get_ecc_requirements(base);
0482     struct mtd_info *mtd = nand_to_mtd(chip);
0483     struct micron_nand *micron;
0484     int ondie;
0485     int ret;
0486 
0487     micron = kzalloc(sizeof(*micron), GFP_KERNEL);
0488     if (!micron)
0489         return -ENOMEM;
0490 
0491     nand_set_manufacturer_data(chip, micron);
0492 
0493     ret = micron_nand_onfi_init(chip);
0494     if (ret)
0495         goto err_free_manuf_data;
0496 
0497     chip->options |= NAND_BBM_FIRSTPAGE;
0498 
0499     if (mtd->writesize == 2048)
0500         chip->options |= NAND_BBM_SECONDPAGE;
0501 
0502     ondie = micron_supports_on_die_ecc(chip);
0503 
0504     if (ondie == MICRON_ON_DIE_MANDATORY &&
0505         chip->ecc.engine_type != NAND_ECC_ENGINE_TYPE_ON_DIE) {
0506         pr_err("On-die ECC forcefully enabled, not supported\n");
0507         ret = -EINVAL;
0508         goto err_free_manuf_data;
0509     }
0510 
0511     if (chip->ecc.engine_type == NAND_ECC_ENGINE_TYPE_ON_DIE) {
0512         if (ondie == MICRON_ON_DIE_UNSUPPORTED) {
0513             pr_err("On-die ECC selected but not supported\n");
0514             ret = -EINVAL;
0515             goto err_free_manuf_data;
0516         }
0517 
0518         if (ondie == MICRON_ON_DIE_MANDATORY) {
0519             micron->ecc.forced = true;
0520             micron->ecc.enabled = true;
0521         }
0522 
0523         /*
0524          * In case of 4bit on-die ECC, we need a buffer to store a
0525          * page dumped in raw mode so that we can compare its content
0526          * to the same page after ECC correction happened and extract
0527          * the real number of bitflips from this comparison.
0528          * That's not needed for 8-bit ECC, because the status expose
0529          * a better approximation of the number of bitflips in a page.
0530          */
0531         if (requirements->strength == 4) {
0532             micron->ecc.rawbuf = kmalloc(mtd->writesize +
0533                              mtd->oobsize,
0534                              GFP_KERNEL);
0535             if (!micron->ecc.rawbuf) {
0536                 ret = -ENOMEM;
0537                 goto err_free_manuf_data;
0538             }
0539         }
0540 
0541         if (requirements->strength == 4)
0542             mtd_set_ooblayout(mtd,
0543                       &micron_nand_on_die_4_ooblayout_ops);
0544         else
0545             mtd_set_ooblayout(mtd,
0546                       &micron_nand_on_die_8_ooblayout_ops);
0547 
0548         chip->ecc.bytes = requirements->strength * 2;
0549         chip->ecc.size = 512;
0550         chip->ecc.strength = requirements->strength;
0551         chip->ecc.algo = NAND_ECC_ALGO_BCH;
0552         chip->ecc.read_page = micron_nand_read_page_on_die_ecc;
0553         chip->ecc.write_page = micron_nand_write_page_on_die_ecc;
0554 
0555         if (ondie == MICRON_ON_DIE_MANDATORY) {
0556             chip->ecc.read_page_raw = nand_read_page_raw_notsupp;
0557             chip->ecc.write_page_raw = nand_write_page_raw_notsupp;
0558         } else {
0559             if (!chip->ecc.read_page_raw)
0560                 chip->ecc.read_page_raw = nand_read_page_raw;
0561             if (!chip->ecc.write_page_raw)
0562                 chip->ecc.write_page_raw = nand_write_page_raw;
0563         }
0564     }
0565 
0566     return 0;
0567 
0568 err_free_manuf_data:
0569     kfree(micron->ecc.rawbuf);
0570     kfree(micron);
0571 
0572     return ret;
0573 }
0574 
0575 static void micron_nand_cleanup(struct nand_chip *chip)
0576 {
0577     struct micron_nand *micron = nand_get_manufacturer_data(chip);
0578 
0579     kfree(micron->ecc.rawbuf);
0580     kfree(micron);
0581 }
0582 
0583 static void micron_fixup_onfi_param_page(struct nand_chip *chip,
0584                      struct nand_onfi_params *p)
0585 {
0586     /*
0587      * MT29F1G08ABAFAWP-ITE:F and possibly others report 00 00 for the
0588      * revision number field of the ONFI parameter page. Assume ONFI
0589      * version 1.0 if the revision number is 00 00.
0590      */
0591     if (le16_to_cpu(p->revision) == 0)
0592         p->revision = cpu_to_le16(ONFI_VERSION_1_0);
0593 }
0594 
0595 const struct nand_manufacturer_ops micron_nand_manuf_ops = {
0596     .init = micron_nand_init,
0597     .cleanup = micron_nand_cleanup,
0598     .fixup_onfi_param_page = micron_fixup_onfi_param_page,
0599 };
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