nand/raw/nand_esmt.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Copyright (C) 2018 Toradex AG
0004  *
0005  * Author: Marcel Ziswiler <marcel.ziswiler@toradex.com>
0006  */
0007
0008 #include <linux/mtd/rawnand.h>
0009 #include "internals.h"
0010
0011 static void esmt_nand_decode_id(struct nand_chip *chip)
0012 {
0013     struct nand_device *base = &chip->base;
0014     struct nand_ecc_props requirements = {};
0015
0016     nand_decode_ext_id(chip);
0017
0018     /* Extract ECC requirements from 5th id byte. */
0019     if (chip->id.len >= 5 && nand_is_slc(chip)) {
0020         requirements.step_size = 512;
0021         switch (chip->id.data[4] & 0x3) {
0022         case 0x0:
0023             requirements.strength = 4;
0024             break;
0025         case 0x1:
0026             requirements.strength = 2;
0027             break;
0028         case 0x2:
0029             requirements.strength = 1;
0030             break;
0031         default:
0032             WARN(1, "Could not get ECC info");
0033             requirements.step_size = 0;
0034             break;
0035         }
0036     }
0037
0038     nanddev_set_ecc_requirements(base, &requirements);
0039 }
0040
0041 static int esmt_nand_init(struct nand_chip *chip)
0042 {
0043     if (nand_is_slc(chip))
0044         /*
0045          * It is known that some ESMT SLC NANDs have been shipped
0046          * with the factory bad block markers in the first or last page
0047          * of the block, instead of the first or second page. To be on
0048          * the safe side, let's check all three locations.
0049          */
0050         chip->options |= NAND_BBM_FIRSTPAGE | NAND_BBM_SECONDPAGE |
0051                  NAND_BBM_LASTPAGE;
0052
0053     return 0;
0054 }
0055
0056 const struct nand_manufacturer_ops esmt_nand_manuf_ops = {
0057     .detect = esmt_nand_decode_id,
0058     .init = esmt_nand_init,
0059 };