nand/raw/internals.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Copyright (c) 2018 - Bootlin
0004  *
0005  * Author: Boris Brezillon <boris.brezillon@bootlin.com>
0006  *
0007  * Header containing internal definitions to be used only by core files.
0008  * NAND controller drivers should not include this file.
0009  */
0010
0011 #ifndef __LINUX_RAWNAND_INTERNALS
0012 #define __LINUX_RAWNAND_INTERNALS
0013
0014 #include <linux/mtd/rawnand.h>
0015
0016 /*
0017  * NAND Flash Manufacturer ID Codes
0018  */
0019 #define NAND_MFR_AMD        0x01
0020 #define NAND_MFR_ATO        0x9b
0021 #define NAND_MFR_EON        0x92
0022 #define NAND_MFR_ESMT       0xc8
0023 #define NAND_MFR_FUJITSU    0x04
0024 #define NAND_MFR_HYNIX      0xad
0025 #define NAND_MFR_INTEL      0x89
0026 #define NAND_MFR_MACRONIX   0xc2
0027 #define NAND_MFR_MICRON     0x2c
0028 #define NAND_MFR_NATIONAL   0x8f
0029 #define NAND_MFR_RENESAS    0x07
0030 #define NAND_MFR_SAMSUNG    0xec
0031 #define NAND_MFR_SANDISK    0x45
0032 #define NAND_MFR_STMICRO    0x20
0033 /* Kioxia is new name of Toshiba memory. */
0034 #define NAND_MFR_TOSHIBA    0x98
0035 #define NAND_MFR_WINBOND    0xef
0036
0037 /**
0038  * struct nand_manufacturer_ops - NAND Manufacturer operations
0039  * @detect: detect the NAND memory organization and capabilities
0040  * @init: initialize all vendor specific fields (like the ->read_retry()
0041  *    implementation) if any.
0042  * @cleanup: the ->init() function may have allocated resources, ->cleanup()
0043  *       is here to let vendor specific code release those resources.
0044  * @fixup_onfi_param_page: apply vendor specific fixups to the ONFI parameter
0045  *             page. This is called after the checksum is verified.
0046  */
0047 struct nand_manufacturer_ops {
0048     void (*detect)(struct nand_chip *chip);
0049     int (*init)(struct nand_chip *chip);
0050     void (*cleanup)(struct nand_chip *chip);
0051     void (*fixup_onfi_param_page)(struct nand_chip *chip,
0052                       struct nand_onfi_params *p);
0053 };
0054
0055 /**
0056  * struct nand_manufacturer_desc - NAND Flash Manufacturer descriptor
0057  * @name: Manufacturer name
0058  * @id: manufacturer ID code of device.
0059  * @ops: manufacturer operations
0060  */
0061 struct nand_manufacturer_desc {
0062     int id;
0063     char *name;
0064     const struct nand_manufacturer_ops *ops;
0065 };
0066
0067
0068 extern struct nand_flash_dev nand_flash_ids[];
0069
0070 extern const struct nand_manufacturer_ops amd_nand_manuf_ops;
0071 extern const struct nand_manufacturer_ops esmt_nand_manuf_ops;
0072 extern const struct nand_manufacturer_ops hynix_nand_manuf_ops;
0073 extern const struct nand_manufacturer_ops macronix_nand_manuf_ops;
0074 extern const struct nand_manufacturer_ops micron_nand_manuf_ops;
0075 extern const struct nand_manufacturer_ops samsung_nand_manuf_ops;
0076 extern const struct nand_manufacturer_ops toshiba_nand_manuf_ops;
0077
0078 /* MLC pairing schemes */
0079 extern const struct mtd_pairing_scheme dist3_pairing_scheme;
0080
0081 /* Core functions */
0082 const struct nand_manufacturer_desc *nand_get_manufacturer_desc(u8 id);
0083 int nand_bbm_get_next_page(struct nand_chip *chip, int page);
0084 int nand_markbad_bbm(struct nand_chip *chip, loff_t ofs);
0085 int nand_erase_nand(struct nand_chip *chip, struct erase_info *instr,
0086             int allowbbt);
0087 void onfi_fill_interface_config(struct nand_chip *chip,
0088                 struct nand_interface_config *iface,
0089                 enum nand_interface_type type,
0090                 unsigned int timing_mode);
0091 unsigned int
0092 onfi_find_closest_sdr_mode(const struct nand_sdr_timings *spec_timings);
0093 unsigned int
0094 onfi_find_closest_nvddr_mode(const struct nand_nvddr_timings *spec_timings);
0095 int nand_choose_best_sdr_timings(struct nand_chip *chip,
0096                  struct nand_interface_config *iface,
0097                  struct nand_sdr_timings *spec_timings);
0098 int nand_choose_best_nvddr_timings(struct nand_chip *chip,
0099                    struct nand_interface_config *iface,
0100                    struct nand_nvddr_timings *spec_timings);
0101 const struct nand_interface_config *nand_get_reset_interface_config(void);
0102 int nand_get_features(struct nand_chip *chip, int addr, u8 *subfeature_param);
0103 int nand_set_features(struct nand_chip *chip, int addr, u8 *subfeature_param);
0104 int nand_read_page_raw_notsupp(struct nand_chip *chip, u8 *buf,
0105                    int oob_required, int page);
0106 int nand_write_page_raw_notsupp(struct nand_chip *chip, const u8 *buf,
0107                 int oob_required, int page);
0108 int nand_exit_status_op(struct nand_chip *chip);
0109 int nand_read_param_page_op(struct nand_chip *chip, u8 page, void *buf,
0110                 unsigned int len);
0111 void nand_decode_ext_id(struct nand_chip *chip);
0112 void panic_nand_wait(struct nand_chip *chip, unsigned long timeo);
0113 void sanitize_string(uint8_t *s, size_t len);
0114
0115 static inline bool nand_has_exec_op(struct nand_chip *chip)
0116 {
0117     if (!chip->controller || !chip->controller->ops ||
0118         !chip->controller->ops->exec_op)
0119         return false;
0120
0121     return true;
0122 }
0123
0124 static inline int nand_check_op(struct nand_chip *chip,
0125                 const struct nand_operation *op)
0126 {
0127     if (!nand_has_exec_op(chip))
0128         return 0;
0129
0130     return chip->controller->ops->exec_op(chip, op, true);
0131 }
0132
0133 static inline int nand_exec_op(struct nand_chip *chip,
0134                    const struct nand_operation *op)
0135 {
0136     if (!nand_has_exec_op(chip))
0137         return -ENOTSUPP;
0138
0139     if (WARN_ON(op->cs >= nanddev_ntargets(&chip->base)))
0140         return -EINVAL;
0141
0142     return chip->controller->ops->exec_op(chip, op, false);
0143 }
0144
0145 static inline bool nand_controller_can_setup_interface(struct nand_chip *chip)
0146 {
0147     if (!chip->controller || !chip->controller->ops ||
0148         !chip->controller->ops->setup_interface)
0149         return false;
0150
0151     if (chip->options & NAND_KEEP_TIMINGS)
0152         return false;
0153
0154     return true;
0155 }
0156
0157 /* BBT functions */
0158 int nand_markbad_bbt(struct nand_chip *chip, loff_t offs);
0159 int nand_isreserved_bbt(struct nand_chip *chip, loff_t offs);
0160 int nand_isbad_bbt(struct nand_chip *chip, loff_t offs, int allowbbt);
0161
0162 /* Legacy */
0163 void nand_legacy_set_defaults(struct nand_chip *chip);
0164 void nand_legacy_adjust_cmdfunc(struct nand_chip *chip);
0165 int nand_legacy_check_hooks(struct nand_chip *chip);
0166
0167 /* ONFI functions */
0168 u16 onfi_crc16(u16 crc, u8 const *p, size_t len);
0169 int nand_onfi_detect(struct nand_chip *chip);
0170
0171 /* JEDEC functions */
0172 int nand_jedec_detect(struct nand_chip *chip);
0173
0174 #endif /* __LINUX_RAWNAND_INTERNALS */