mtd/maps/physmap-gemini.c

0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * Cortina Systems Gemini OF physmap add-on
0004  * Copyright (C) 2017 Linus Walleij <linus.walleij@linaro.org>
0005  *
0006  * This SoC has an elaborate flash control register, so we need to
0007  * detect and set it up when booting on this platform.
0008  */
0009 #include <linux/export.h>
0010 #include <linux/of.h>
0011 #include <linux/of_device.h>
0012 #include <linux/mtd/map.h>
0013 #include <linux/mtd/xip.h>
0014 #include <linux/mfd/syscon.h>
0015 #include <linux/regmap.h>
0016 #include <linux/bitops.h>
0017 #include <linux/pinctrl/consumer.h>
0018 #include "physmap-gemini.h"
0019
0020 /*
0021  * The Flash-relevant parts of the global status register
0022  * These would also be relevant for a NAND driver.
0023  */
0024 #define GLOBAL_STATUS           0x04
0025 #define FLASH_TYPE_MASK         (0x3 << 24)
0026 #define FLASH_TYPE_NAND_2K      (0x3 << 24)
0027 #define FLASH_TYPE_NAND_512     (0x2 << 24)
0028 #define FLASH_TYPE_PARALLEL     (0x1 << 24)
0029 #define FLASH_TYPE_SERIAL       (0x0 << 24)
0030 /* if parallel */
0031 #define FLASH_WIDTH_16BIT       (1 << 23)   /* else 8 bit */
0032 /* if serial */
0033 #define FLASH_ATMEL         (1 << 23)   /* else STM */
0034
0035 #define FLASH_SIZE_MASK         (0x3 << 21)
0036 #define NAND_256M           (0x3 << 21) /* and more */
0037 #define NAND_128M           (0x2 << 21)
0038 #define NAND_64M            (0x1 << 21)
0039 #define NAND_32M            (0x0 << 21)
0040 #define ATMEL_16M           (0x3 << 21) /* and more */
0041 #define ATMEL_8M            (0x2 << 21)
0042 #define ATMEL_4M_2M         (0x1 << 21)
0043 #define ATMEL_1M            (0x0 << 21) /* and less */
0044 #define STM_32M             (1 << 22)   /* and more */
0045 #define STM_16M             (0 << 22)   /* and less */
0046
0047 #define FLASH_PARALLEL_HIGH_PIN_CNT (1 << 20)   /* else low pin cnt */
0048
0049 struct gemini_flash {
0050     struct device *dev;
0051     struct pinctrl *p;
0052     struct pinctrl_state *enabled_state;
0053     struct pinctrl_state *disabled_state;
0054 };
0055
0056 /* Static local state */
0057 static struct gemini_flash *gf;
0058
0059 static void gemini_flash_enable_pins(void)
0060 {
0061     int ret;
0062
0063     if (IS_ERR(gf->enabled_state))
0064         return;
0065     ret = pinctrl_select_state(gf->p, gf->enabled_state);
0066     if (ret)
0067         dev_err(gf->dev, "failed to enable pins\n");
0068 }
0069
0070 static void gemini_flash_disable_pins(void)
0071 {
0072     int ret;
0073
0074     if (IS_ERR(gf->disabled_state))
0075         return;
0076     ret = pinctrl_select_state(gf->p, gf->disabled_state);
0077     if (ret)
0078         dev_err(gf->dev, "failed to disable pins\n");
0079 }
0080
0081 static map_word __xipram gemini_flash_map_read(struct map_info *map,
0082                            unsigned long ofs)
0083 {
0084     map_word ret;
0085
0086     gemini_flash_enable_pins();
0087     ret = inline_map_read(map, ofs);
0088     gemini_flash_disable_pins();
0089
0090     return ret;
0091 }
0092
0093 static void __xipram gemini_flash_map_write(struct map_info *map,
0094                         const map_word datum,
0095                         unsigned long ofs)
0096 {
0097     gemini_flash_enable_pins();
0098     inline_map_write(map, datum, ofs);
0099     gemini_flash_disable_pins();
0100 }
0101
0102 static void __xipram gemini_flash_map_copy_from(struct map_info *map,
0103                         void *to, unsigned long from,
0104                         ssize_t len)
0105 {
0106     gemini_flash_enable_pins();
0107     inline_map_copy_from(map, to, from, len);
0108     gemini_flash_disable_pins();
0109 }
0110
0111 static void __xipram gemini_flash_map_copy_to(struct map_info *map,
0112                           unsigned long to,
0113                           const void *from, ssize_t len)
0114 {
0115     gemini_flash_enable_pins();
0116     inline_map_copy_to(map, to, from, len);
0117     gemini_flash_disable_pins();
0118 }
0119
0120 int of_flash_probe_gemini(struct platform_device *pdev,
0121               struct device_node *np,
0122               struct map_info *map)
0123 {
0124     struct regmap *rmap;
0125     struct device *dev = &pdev->dev;
0126     u32 val;
0127     int ret;
0128
0129     /* Multiplatform guard */
0130     if (!of_device_is_compatible(np, "cortina,gemini-flash"))
0131         return 0;
0132
0133     gf = devm_kzalloc(dev, sizeof(*gf), GFP_KERNEL);
0134     if (!gf)
0135         return -ENOMEM;
0136     gf->dev = dev;
0137
0138     rmap = syscon_regmap_lookup_by_phandle(np, "syscon");
0139     if (IS_ERR(rmap)) {
0140         dev_err(dev, "no syscon\n");
0141         return PTR_ERR(rmap);
0142     }
0143
0144     ret = regmap_read(rmap, GLOBAL_STATUS, &val);
0145     if (ret) {
0146         dev_err(dev, "failed to read global status register\n");
0147         return -ENODEV;
0148     }
0149     dev_dbg(dev, "global status reg: %08x\n", val);
0150
0151     /*
0152      * It would be contradictory if a physmap flash was NOT parallel.
0153      */
0154     if ((val & FLASH_TYPE_MASK) != FLASH_TYPE_PARALLEL) {
0155         dev_err(dev, "flash is not parallel\n");
0156         return -ENODEV;
0157     }
0158
0159     /*
0160      * Complain if DT data and hardware definition is different.
0161      */
0162     if (val & FLASH_WIDTH_16BIT) {
0163         if (map->bankwidth != 2)
0164             dev_warn(dev, "flash hardware say flash is 16 bit wide but DT says it is %d bits wide\n",
0165                  map->bankwidth * 8);
0166     } else {
0167         if (map->bankwidth != 1)
0168             dev_warn(dev, "flash hardware say flash is 8 bit wide but DT says it is %d bits wide\n",
0169                  map->bankwidth * 8);
0170     }
0171
0172     gf->p = devm_pinctrl_get(dev);
0173     if (IS_ERR(gf->p)) {
0174         dev_err(dev, "no pinctrl handle\n");
0175         ret = PTR_ERR(gf->p);
0176         return ret;
0177     }
0178
0179     gf->enabled_state = pinctrl_lookup_state(gf->p, "enabled");
0180     if (IS_ERR(gf->enabled_state))
0181         dev_err(dev, "no enabled pin control state\n");
0182
0183     gf->disabled_state = pinctrl_lookup_state(gf->p, "disabled");
0184     if (IS_ERR(gf->enabled_state)) {
0185         dev_err(dev, "no disabled pin control state\n");
0186     } else {
0187         ret = pinctrl_select_state(gf->p, gf->disabled_state);
0188         if (ret)
0189             dev_err(gf->dev, "failed to disable pins\n");
0190     }
0191
0192     map->read = gemini_flash_map_read;
0193     map->write = gemini_flash_map_write;
0194     map->copy_from = gemini_flash_map_copy_from;
0195     map->copy_to = gemini_flash_map_copy_to;
0196
0197     dev_info(dev, "initialized Gemini-specific physmap control\n");
0198
0199     return 0;
0200 }