mtd/maps/l440gx.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * BIOS Flash chip on Intel 440GX board.
0004  *
0005  * Bugs this currently does not work under linuxBIOS.
0006  */
0007
0008 #include <linux/module.h>
0009 #include <linux/pci.h>
0010 #include <linux/kernel.h>
0011 #include <linux/init.h>
0012 #include <asm/io.h>
0013 #include <linux/mtd/mtd.h>
0014 #include <linux/mtd/map.h>
0015
0016 #define PIIXE_IOBASE_RESOURCE   11
0017
0018 #define WINDOW_ADDR 0xfff00000
0019 #define WINDOW_SIZE 0x00100000
0020 #define BUSWIDTH 1
0021
0022 static u32 iobase;
0023 #define IOBASE iobase
0024 #define TRIBUF_PORT (IOBASE+0x37)
0025 #define VPP_PORT (IOBASE+0x28)
0026
0027 static struct mtd_info *mymtd;
0028
0029
0030 /* Is this really the vpp port? */
0031 static DEFINE_SPINLOCK(l440gx_vpp_lock);
0032 static int l440gx_vpp_refcnt;
0033 static void l440gx_set_vpp(struct map_info *map, int vpp)
0034 {
0035     unsigned long flags;
0036
0037     spin_lock_irqsave(&l440gx_vpp_lock, flags);
0038     if (vpp) {
0039         if (++l440gx_vpp_refcnt == 1)   /* first nested 'on' */
0040             outl(inl(VPP_PORT) | 1, VPP_PORT);
0041     } else {
0042         if (--l440gx_vpp_refcnt == 0)   /* last nested 'off' */
0043             outl(inl(VPP_PORT) & ~1, VPP_PORT);
0044     }
0045     spin_unlock_irqrestore(&l440gx_vpp_lock, flags);
0046 }
0047
0048 static struct map_info l440gx_map = {
0049     .name = "L440GX BIOS",
0050     .size = WINDOW_SIZE,
0051     .bankwidth = BUSWIDTH,
0052     .phys = WINDOW_ADDR,
0053 #if 0
0054     /* FIXME verify that this is the
0055      * appripriate code for vpp enable/disable
0056      */
0057     .set_vpp = l440gx_set_vpp
0058 #endif
0059 };
0060
0061 static int __init init_l440gx(void)
0062 {
0063     struct pci_dev *dev, *pm_dev;
0064     struct resource *pm_iobase;
0065     __u16 word;
0066
0067     dev = pci_get_device(PCI_VENDOR_ID_INTEL,
0068         PCI_DEVICE_ID_INTEL_82371AB_0, NULL);
0069
0070     pm_dev = pci_get_device(PCI_VENDOR_ID_INTEL,
0071         PCI_DEVICE_ID_INTEL_82371AB_3, NULL);
0072
0073     pci_dev_put(dev);
0074
0075     if (!dev || !pm_dev) {
0076         printk(KERN_NOTICE "L440GX flash mapping: failed to find PIIX4 ISA bridge, cannot continue\n");
0077         pci_dev_put(pm_dev);
0078         return -ENODEV;
0079     }
0080
0081     l440gx_map.virt = ioremap(WINDOW_ADDR, WINDOW_SIZE);
0082
0083     if (!l440gx_map.virt) {
0084         printk(KERN_WARNING "Failed to ioremap L440GX flash region\n");
0085         pci_dev_put(pm_dev);
0086         return -ENOMEM;
0087     }
0088     simple_map_init(&l440gx_map);
0089     pr_debug("window_addr = %p\n", l440gx_map.virt);
0090
0091     /* Setup the pm iobase resource
0092      * This code should move into some kind of generic bridge
0093      * driver but for the moment I'm content with getting the
0094      * allocation correct.
0095      */
0096     pm_iobase = &pm_dev->resource[PIIXE_IOBASE_RESOURCE];
0097     if (!(pm_iobase->flags & IORESOURCE_IO)) {
0098         pm_iobase->name = "pm iobase";
0099         pm_iobase->start = 0;
0100         pm_iobase->end = 63;
0101         pm_iobase->flags = IORESOURCE_IO;
0102
0103         /* Put the current value in the resource */
0104         pci_read_config_dword(pm_dev, 0x40, &iobase);
0105         iobase &= ~1;
0106         pm_iobase->start += iobase & ~1;
0107         pm_iobase->end += iobase & ~1;
0108
0109         pci_dev_put(pm_dev);
0110
0111         /* Allocate the resource region */
0112         if (pci_assign_resource(pm_dev, PIIXE_IOBASE_RESOURCE) != 0) {
0113             pci_dev_put(dev);
0114             pci_dev_put(pm_dev);
0115             printk(KERN_WARNING "Could not allocate pm iobase resource\n");
0116             iounmap(l440gx_map.virt);
0117             return -ENXIO;
0118         }
0119     }
0120     /* Set the iobase */
0121     iobase = pm_iobase->start;
0122     pci_write_config_dword(pm_dev, 0x40, iobase | 1);
0123
0124
0125     /* Set XBCS# */
0126     pci_read_config_word(dev, 0x4e, &word);
0127     word |= 0x4;
0128         pci_write_config_word(dev, 0x4e, word);
0129
0130     /* Supply write voltage to the chip */
0131     l440gx_set_vpp(&l440gx_map, 1);
0132
0133     /* Enable the gate on the WE line */
0134     outb(inb(TRIBUF_PORT) & ~1, TRIBUF_PORT);
0135
0136         printk(KERN_NOTICE "Enabled WE line to L440GX BIOS flash chip.\n");
0137
0138     mymtd = do_map_probe("jedec_probe", &l440gx_map);
0139     if (!mymtd) {
0140         printk(KERN_NOTICE "JEDEC probe on BIOS chip failed. Using ROM\n");
0141         mymtd = do_map_probe("map_rom", &l440gx_map);
0142     }
0143     if (mymtd) {
0144         mymtd->owner = THIS_MODULE;
0145
0146         mtd_device_register(mymtd, NULL, 0);
0147         return 0;
0148     }
0149
0150     iounmap(l440gx_map.virt);
0151     return -ENXIO;
0152 }
0153
0154 static void __exit cleanup_l440gx(void)
0155 {
0156     mtd_device_unregister(mymtd);
0157     map_destroy(mymtd);
0158
0159     iounmap(l440gx_map.virt);
0160 }
0161
0162 module_init(init_l440gx);
0163 module_exit(cleanup_l440gx);
0164
0165 MODULE_LICENSE("GPL");
0166 MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org>");
0167 MODULE_DESCRIPTION("MTD map driver for BIOS chips on Intel L440GX motherboards");