mtd/devices/mtd_dataflash.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Atmel AT45xxx DataFlash MTD driver for lightweight SPI framework
0004  *
0005  * Largely derived from at91_dataflash.c:
0006  *  Copyright (C) 2003-2005 SAN People (Pty) Ltd
0007 */
0008 #include <linux/module.h>
0009 #include <linux/slab.h>
0010 #include <linux/delay.h>
0011 #include <linux/device.h>
0012 #include <linux/mutex.h>
0013 #include <linux/err.h>
0014 #include <linux/math64.h>
0015 #include <linux/of.h>
0016 #include <linux/of_device.h>
0017
0018 #include <linux/spi/spi.h>
0019 #include <linux/spi/flash.h>
0020
0021 #include <linux/mtd/mtd.h>
0022 #include <linux/mtd/partitions.h>
0023
0024 /*
0025  * DataFlash is a kind of SPI flash.  Most AT45 chips have two buffers in
0026  * each chip, which may be used for double buffered I/O; but this driver
0027  * doesn't (yet) use these for any kind of i/o overlap or prefetching.
0028  *
0029  * Sometimes DataFlash is packaged in MMC-format cards, although the
0030  * MMC stack can't (yet?) distinguish between MMC and DataFlash
0031  * protocols during enumeration.
0032  */
0033
0034 /* reads can bypass the buffers */
0035 #define OP_READ_CONTINUOUS  0xE8
0036 #define OP_READ_PAGE        0xD2
0037
0038 /* group B requests can run even while status reports "busy" */
0039 #define OP_READ_STATUS      0xD7    /* group B */
0040
0041 /* move data between host and buffer */
0042 #define OP_READ_BUFFER1     0xD4    /* group B */
0043 #define OP_READ_BUFFER2     0xD6    /* group B */
0044 #define OP_WRITE_BUFFER1    0x84    /* group B */
0045 #define OP_WRITE_BUFFER2    0x87    /* group B */
0046
0047 /* erasing flash */
0048 #define OP_ERASE_PAGE       0x81
0049 #define OP_ERASE_BLOCK      0x50
0050
0051 /* move data between buffer and flash */
0052 #define OP_TRANSFER_BUF1    0x53
0053 #define OP_TRANSFER_BUF2    0x55
0054 #define OP_MREAD_BUFFER1    0xD4
0055 #define OP_MREAD_BUFFER2    0xD6
0056 #define OP_MWERASE_BUFFER1  0x83
0057 #define OP_MWERASE_BUFFER2  0x86
0058 #define OP_MWRITE_BUFFER1   0x88    /* sector must be pre-erased */
0059 #define OP_MWRITE_BUFFER2   0x89    /* sector must be pre-erased */
0060
0061 /* write to buffer, then write-erase to flash */
0062 #define OP_PROGRAM_VIA_BUF1 0x82
0063 #define OP_PROGRAM_VIA_BUF2 0x85
0064
0065 /* compare buffer to flash */
0066 #define OP_COMPARE_BUF1     0x60
0067 #define OP_COMPARE_BUF2     0x61
0068
0069 /* read flash to buffer, then write-erase to flash */
0070 #define OP_REWRITE_VIA_BUF1 0x58
0071 #define OP_REWRITE_VIA_BUF2 0x59
0072
0073 /* newer chips report JEDEC manufacturer and device IDs; chip
0074  * serial number and OTP bits; and per-sector writeprotect.
0075  */
0076 #define OP_READ_ID      0x9F
0077 #define OP_READ_SECURITY    0x77
0078 #define OP_WRITE_SECURITY_REVC  0x9A
0079 #define OP_WRITE_SECURITY   0x9B    /* revision D */
0080
0081 #define CFI_MFR_ATMEL       0x1F
0082
0083 #define DATAFLASH_SHIFT_EXTID   24
0084 #define DATAFLASH_SHIFT_ID  40
0085
0086 struct dataflash {
0087     u8          command[4];
0088     char            name[24];
0089
0090     unsigned short      page_offset;    /* offset in flash address */
0091     unsigned int        page_size;  /* of bytes per page */
0092
0093     struct mutex        lock;
0094     struct spi_device   *spi;
0095
0096     struct mtd_info     mtd;
0097 };
0098
0099 static const struct spi_device_id dataflash_dev_ids[] = {
0100     { "at45" },
0101     { "dataflash" },
0102     { },
0103 };
0104 MODULE_DEVICE_TABLE(spi, dataflash_dev_ids);
0105
0106 #ifdef CONFIG_OF
0107 static const struct of_device_id dataflash_dt_ids[] = {
0108     { .compatible = "atmel,at45", },
0109     { .compatible = "atmel,dataflash", },
0110     { /* sentinel */ }
0111 };
0112 MODULE_DEVICE_TABLE(of, dataflash_dt_ids);
0113 #endif
0114
0115 static const struct spi_device_id dataflash_spi_ids[] = {
0116     { .name = "at45", },
0117     { .name = "dataflash", },
0118     { /* sentinel */ }
0119 };
0120 MODULE_DEVICE_TABLE(spi, dataflash_spi_ids);
0121
0122 /* ......................................................................... */
0123
0124 /*
0125  * Return the status of the DataFlash device.
0126  */
0127 static inline int dataflash_status(struct spi_device *spi)
0128 {
0129     /* NOTE:  at45db321c over 25 MHz wants to write
0130      * a dummy byte after the opcode...
0131      */
0132     return spi_w8r8(spi, OP_READ_STATUS);
0133 }
0134
0135 /*
0136  * Poll the DataFlash device until it is READY.
0137  * This usually takes 5-20 msec or so; more for sector erase.
0138  */
0139 static int dataflash_waitready(struct spi_device *spi)
0140 {
0141     int status;
0142
0143     for (;;) {
0144         status = dataflash_status(spi);
0145         if (status < 0) {
0146             dev_dbg(&spi->dev, "status %d?\n", status);
0147             status = 0;
0148         }
0149
0150         if (status & (1 << 7))  /* RDY/nBSY */
0151             return status;
0152
0153         usleep_range(3000, 4000);
0154     }
0155 }
0156
0157 /* ......................................................................... */
0158
0159 /*
0160  * Erase pages of flash.
0161  */
0162 static int dataflash_erase(struct mtd_info *mtd, struct erase_info *instr)
0163 {
0164     struct dataflash    *priv = mtd->priv;
0165     struct spi_device   *spi = priv->spi;
0166     struct spi_transfer x = { };
0167     struct spi_message  msg;
0168     unsigned        blocksize = priv->page_size << 3;
0169     u8          *command;
0170     u32         rem;
0171
0172     dev_dbg(&spi->dev, "erase addr=0x%llx len 0x%llx\n",
0173         (long long)instr->addr, (long long)instr->len);
0174
0175     div_u64_rem(instr->len, priv->page_size, &rem);
0176     if (rem)
0177         return -EINVAL;
0178     div_u64_rem(instr->addr, priv->page_size, &rem);
0179     if (rem)
0180         return -EINVAL;
0181
0182     spi_message_init(&msg);
0183
0184     x.tx_buf = command = priv->command;
0185     x.len = 4;
0186     spi_message_add_tail(&x, &msg);
0187
0188     mutex_lock(&priv->lock);
0189     while (instr->len > 0) {
0190         unsigned int    pageaddr;
0191         int     status;
0192         int     do_block;
0193
0194         /* Calculate flash page address; use block erase (for speed) if
0195          * we're at a block boundary and need to erase the whole block.
0196          */
0197         pageaddr = div_u64(instr->addr, priv->page_size);
0198         do_block = (pageaddr & 0x7) == 0 && instr->len >= blocksize;
0199         pageaddr = pageaddr << priv->page_offset;
0200
0201         command[0] = do_block ? OP_ERASE_BLOCK : OP_ERASE_PAGE;
0202         command[1] = (u8)(pageaddr >> 16);
0203         command[2] = (u8)(pageaddr >> 8);
0204         command[3] = 0;
0205
0206         dev_dbg(&spi->dev, "ERASE %s: (%x) %x %x %x [%i]\n",
0207             do_block ? "block" : "page",
0208             command[0], command[1], command[2], command[3],
0209             pageaddr);
0210
0211         status = spi_sync(spi, &msg);
0212         (void) dataflash_waitready(spi);
0213
0214         if (status < 0) {
0215             dev_err(&spi->dev, "erase %x, err %d\n",
0216                 pageaddr, status);
0217             /* REVISIT:  can retry instr->retries times; or
0218              * giveup and instr->fail_addr = instr->addr;
0219              */
0220             continue;
0221         }
0222
0223         if (do_block) {
0224             instr->addr += blocksize;
0225             instr->len -= blocksize;
0226         } else {
0227             instr->addr += priv->page_size;
0228             instr->len -= priv->page_size;
0229         }
0230     }
0231     mutex_unlock(&priv->lock);
0232
0233     return 0;
0234 }
0235
0236 /*
0237  * Read from the DataFlash device.
0238  *   from   : Start offset in flash device
0239  *   len    : Amount to read
0240  *   retlen : About of data actually read
0241  *   buf    : Buffer containing the data
0242  */
0243 static int dataflash_read(struct mtd_info *mtd, loff_t from, size_t len,
0244                    size_t *retlen, u_char *buf)
0245 {
0246     struct dataflash    *priv = mtd->priv;
0247     struct spi_transfer x[2] = { };
0248     struct spi_message  msg;
0249     unsigned int        addr;
0250     u8          *command;
0251     int         status;
0252
0253     dev_dbg(&priv->spi->dev, "read 0x%x..0x%x\n",
0254           (unsigned int)from, (unsigned int)(from + len));
0255
0256     /* Calculate flash page/byte address */
0257     addr = (((unsigned)from / priv->page_size) << priv->page_offset)
0258         + ((unsigned)from % priv->page_size);
0259
0260     command = priv->command;
0261
0262     dev_dbg(&priv->spi->dev, "READ: (%x) %x %x %x\n",
0263         command[0], command[1], command[2], command[3]);
0264
0265     spi_message_init(&msg);
0266
0267     x[0].tx_buf = command;
0268     x[0].len = 8;
0269     spi_message_add_tail(&x[0], &msg);
0270
0271     x[1].rx_buf = buf;
0272     x[1].len = len;
0273     spi_message_add_tail(&x[1], &msg);
0274
0275     mutex_lock(&priv->lock);
0276
0277     /* Continuous read, max clock = f(car) which may be less than
0278      * the peak rate available.  Some chips support commands with
0279      * fewer "don't care" bytes.  Both buffers stay unchanged.
0280      */
0281     command[0] = OP_READ_CONTINUOUS;
0282     command[1] = (u8)(addr >> 16);
0283     command[2] = (u8)(addr >> 8);
0284     command[3] = (u8)(addr >> 0);
0285     /* plus 4 "don't care" bytes */
0286
0287     status = spi_sync(priv->spi, &msg);
0288     mutex_unlock(&priv->lock);
0289
0290     if (status >= 0) {
0291         *retlen = msg.actual_length - 8;
0292         status = 0;
0293     } else
0294         dev_dbg(&priv->spi->dev, "read %x..%x --> %d\n",
0295             (unsigned)from, (unsigned)(from + len),
0296             status);
0297     return status;
0298 }
0299
0300 /*
0301  * Write to the DataFlash device.
0302  *   to     : Start offset in flash device
0303  *   len    : Amount to write
0304  *   retlen : Amount of data actually written
0305  *   buf    : Buffer containing the data
0306  */
0307 static int dataflash_write(struct mtd_info *mtd, loff_t to, size_t len,
0308                 size_t * retlen, const u_char * buf)
0309 {
0310     struct dataflash    *priv = mtd->priv;
0311     struct spi_device   *spi = priv->spi;
0312     struct spi_transfer x[2] = { };
0313     struct spi_message  msg;
0314     unsigned int        pageaddr, addr, offset, writelen;
0315     size_t          remaining = len;
0316     u_char          *writebuf = (u_char *) buf;
0317     int         status = -EINVAL;
0318     u8          *command;
0319
0320     dev_dbg(&spi->dev, "write 0x%x..0x%x\n",
0321         (unsigned int)to, (unsigned int)(to + len));
0322
0323     spi_message_init(&msg);
0324
0325     x[0].tx_buf = command = priv->command;
0326     x[0].len = 4;
0327     spi_message_add_tail(&x[0], &msg);
0328
0329     pageaddr = ((unsigned)to / priv->page_size);
0330     offset = ((unsigned)to % priv->page_size);
0331     if (offset + len > priv->page_size)
0332         writelen = priv->page_size - offset;
0333     else
0334         writelen = len;
0335
0336     mutex_lock(&priv->lock);
0337     while (remaining > 0) {
0338         dev_dbg(&spi->dev, "write @ %i:%i len=%i\n",
0339             pageaddr, offset, writelen);
0340
0341         /* REVISIT:
0342          * (a) each page in a sector must be rewritten at least
0343          *     once every 10K sibling erase/program operations.
0344          * (b) for pages that are already erased, we could
0345          *     use WRITE+MWRITE not PROGRAM for ~30% speedup.
0346          * (c) WRITE to buffer could be done while waiting for
0347          *     a previous MWRITE/MWERASE to complete ...
0348          * (d) error handling here seems to be mostly missing.
0349          *
0350          * Two persistent bits per page, plus a per-sector counter,
0351          * could support (a) and (b) ... we might consider using
0352          * the second half of sector zero, which is just one block,
0353          * to track that state.  (On AT91, that sector should also
0354          * support boot-from-DataFlash.)
0355          */
0356
0357         addr = pageaddr << priv->page_offset;
0358
0359         /* (1) Maybe transfer partial page to Buffer1 */
0360         if (writelen != priv->page_size) {
0361             command[0] = OP_TRANSFER_BUF1;
0362             command[1] = (addr & 0x00FF0000) >> 16;
0363             command[2] = (addr & 0x0000FF00) >> 8;
0364             command[3] = 0;
0365
0366             dev_dbg(&spi->dev, "TRANSFER: (%x) %x %x %x\n",
0367                 command[0], command[1], command[2], command[3]);
0368
0369             status = spi_sync(spi, &msg);
0370             if (status < 0)
0371                 dev_dbg(&spi->dev, "xfer %u -> %d\n",
0372                     addr, status);
0373
0374             (void) dataflash_waitready(priv->spi);
0375         }
0376
0377         /* (2) Program full page via Buffer1 */
0378         addr += offset;
0379         command[0] = OP_PROGRAM_VIA_BUF1;
0380         command[1] = (addr & 0x00FF0000) >> 16;
0381         command[2] = (addr & 0x0000FF00) >> 8;
0382         command[3] = (addr & 0x000000FF);
0383
0384         dev_dbg(&spi->dev, "PROGRAM: (%x) %x %x %x\n",
0385             command[0], command[1], command[2], command[3]);
0386
0387         x[1].tx_buf = writebuf;
0388         x[1].len = writelen;
0389         spi_message_add_tail(x + 1, &msg);
0390         status = spi_sync(spi, &msg);
0391         spi_transfer_del(x + 1);
0392         if (status < 0)
0393             dev_dbg(&spi->dev, "pgm %u/%u -> %d\n",
0394                 addr, writelen, status);
0395
0396         (void) dataflash_waitready(priv->spi);
0397
0398
0399 #ifdef CONFIG_MTD_DATAFLASH_WRITE_VERIFY
0400
0401         /* (3) Compare to Buffer1 */
0402         addr = pageaddr << priv->page_offset;
0403         command[0] = OP_COMPARE_BUF1;
0404         command[1] = (addr & 0x00FF0000) >> 16;
0405         command[2] = (addr & 0x0000FF00) >> 8;
0406         command[3] = 0;
0407
0408         dev_dbg(&spi->dev, "COMPARE: (%x) %x %x %x\n",
0409             command[0], command[1], command[2], command[3]);
0410
0411         status = spi_sync(spi, &msg);
0412         if (status < 0)
0413             dev_dbg(&spi->dev, "compare %u -> %d\n",
0414                 addr, status);
0415
0416         status = dataflash_waitready(priv->spi);
0417
0418         /* Check result of the compare operation */
0419         if (status & (1 << 6)) {
0420             dev_err(&spi->dev, "compare page %u, err %d\n",
0421                 pageaddr, status);
0422             remaining = 0;
0423             status = -EIO;
0424             break;
0425         } else
0426             status = 0;
0427
0428 #endif  /* CONFIG_MTD_DATAFLASH_WRITE_VERIFY */
0429
0430         remaining = remaining - writelen;
0431         pageaddr++;
0432         offset = 0;
0433         writebuf += writelen;
0434         *retlen += writelen;
0435
0436         if (remaining > priv->page_size)
0437             writelen = priv->page_size;
0438         else
0439             writelen = remaining;
0440     }
0441     mutex_unlock(&priv->lock);
0442
0443     return status;
0444 }
0445
0446 /* ......................................................................... */
0447
0448 #ifdef CONFIG_MTD_DATAFLASH_OTP
0449
0450 static int dataflash_get_otp_info(struct mtd_info *mtd, size_t len,
0451                   size_t *retlen, struct otp_info *info)
0452 {
0453     /* Report both blocks as identical:  bytes 0..64, locked.
0454      * Unless the user block changed from all-ones, we can't
0455      * tell whether it's still writable; so we assume it isn't.
0456      */
0457     info->start = 0;
0458     info->length = 64;
0459     info->locked = 1;
0460     *retlen = sizeof(*info);
0461     return 0;
0462 }
0463
0464 static ssize_t otp_read(struct spi_device *spi, unsigned base,
0465         u8 *buf, loff_t off, size_t len)
0466 {
0467     struct spi_message  m;
0468     size_t          l;
0469     u8          *scratch;
0470     struct spi_transfer t;
0471     int         status;
0472
0473     if (off > 64)
0474         return -EINVAL;
0475
0476     if ((off + len) > 64)
0477         len = 64 - off;
0478
0479     spi_message_init(&m);
0480
0481     l = 4 + base + off + len;
0482     scratch = kzalloc(l, GFP_KERNEL);
0483     if (!scratch)
0484         return -ENOMEM;
0485
0486     /* OUT: OP_READ_SECURITY, 3 don't-care bytes, zeroes
0487      * IN:  ignore 4 bytes, data bytes 0..N (max 127)
0488      */
0489     scratch[0] = OP_READ_SECURITY;
0490
0491     memset(&t, 0, sizeof t);
0492     t.tx_buf = scratch;
0493     t.rx_buf = scratch;
0494     t.len = l;
0495     spi_message_add_tail(&t, &m);
0496
0497     dataflash_waitready(spi);
0498
0499     status = spi_sync(spi, &m);
0500     if (status >= 0) {
0501         memcpy(buf, scratch + 4 + base + off, len);
0502         status = len;
0503     }
0504
0505     kfree(scratch);
0506     return status;
0507 }
0508
0509 static int dataflash_read_fact_otp(struct mtd_info *mtd,
0510         loff_t from, size_t len, size_t *retlen, u_char *buf)
0511 {
0512     struct dataflash    *priv = mtd->priv;
0513     int         status;
0514
0515     /* 64 bytes, from 0..63 ... start at 64 on-chip */
0516     mutex_lock(&priv->lock);
0517     status = otp_read(priv->spi, 64, buf, from, len);
0518     mutex_unlock(&priv->lock);
0519
0520     if (status < 0)
0521         return status;
0522     *retlen = status;
0523     return 0;
0524 }
0525
0526 static int dataflash_read_user_otp(struct mtd_info *mtd,
0527         loff_t from, size_t len, size_t *retlen, u_char *buf)
0528 {
0529     struct dataflash    *priv = mtd->priv;
0530     int         status;
0531
0532     /* 64 bytes, from 0..63 ... start at 0 on-chip */
0533     mutex_lock(&priv->lock);
0534     status = otp_read(priv->spi, 0, buf, from, len);
0535     mutex_unlock(&priv->lock);
0536
0537     if (status < 0)
0538         return status;
0539     *retlen = status;
0540     return 0;
0541 }
0542
0543 static int dataflash_write_user_otp(struct mtd_info *mtd,
0544         loff_t from, size_t len, size_t *retlen, const u_char *buf)
0545 {
0546     struct spi_message  m;
0547     const size_t        l = 4 + 64;
0548     u8          *scratch;
0549     struct spi_transfer t;
0550     struct dataflash    *priv = mtd->priv;
0551     int         status;
0552
0553     if (from >= 64) {
0554         /*
0555          * Attempting to write beyond the end of OTP memory,
0556          * no data can be written.
0557          */
0558         *retlen = 0;
0559         return 0;
0560     }
0561
0562     /* Truncate the write to fit into OTP memory. */
0563     if ((from + len) > 64)
0564         len = 64 - from;
0565
0566     /* OUT: OP_WRITE_SECURITY, 3 zeroes, 64 data-or-zero bytes
0567      * IN:  ignore all
0568      */
0569     scratch = kzalloc(l, GFP_KERNEL);
0570     if (!scratch)
0571         return -ENOMEM;
0572     scratch[0] = OP_WRITE_SECURITY;
0573     memcpy(scratch + 4 + from, buf, len);
0574
0575     spi_message_init(&m);
0576
0577     memset(&t, 0, sizeof t);
0578     t.tx_buf = scratch;
0579     t.len = l;
0580     spi_message_add_tail(&t, &m);
0581
0582     /* Write the OTP bits, if they've not yet been written.
0583      * This modifies SRAM buffer1.
0584      */
0585     mutex_lock(&priv->lock);
0586     dataflash_waitready(priv->spi);
0587     status = spi_sync(priv->spi, &m);
0588     mutex_unlock(&priv->lock);
0589
0590     kfree(scratch);
0591
0592     if (status >= 0) {
0593         status = 0;
0594         *retlen = len;
0595     }
0596     return status;
0597 }
0598
0599 static char *otp_setup(struct mtd_info *device, char revision)
0600 {
0601     device->_get_fact_prot_info = dataflash_get_otp_info;
0602     device->_read_fact_prot_reg = dataflash_read_fact_otp;
0603     device->_get_user_prot_info = dataflash_get_otp_info;
0604     device->_read_user_prot_reg = dataflash_read_user_otp;
0605
0606     /* rev c parts (at45db321c and at45db1281 only!) use a
0607      * different write procedure; not (yet?) implemented.
0608      */
0609     if (revision > 'c')
0610         device->_write_user_prot_reg = dataflash_write_user_otp;
0611
0612     return ", OTP";
0613 }
0614
0615 #else
0616
0617 static char *otp_setup(struct mtd_info *device, char revision)
0618 {
0619     return " (OTP)";
0620 }
0621
0622 #endif
0623
0624 /* ......................................................................... */
0625
0626 /*
0627  * Register DataFlash device with MTD subsystem.
0628  */
0629 static int add_dataflash_otp(struct spi_device *spi, char *name, int nr_pages,
0630                  int pagesize, int pageoffset, char revision)
0631 {
0632     struct dataflash        *priv;
0633     struct mtd_info         *device;
0634     struct flash_platform_data  *pdata = dev_get_platdata(&spi->dev);
0635     char                *otp_tag = "";
0636     int             err = 0;
0637
0638     priv = kzalloc(sizeof *priv, GFP_KERNEL);
0639     if (!priv)
0640         return -ENOMEM;
0641
0642     mutex_init(&priv->lock);
0643     priv->spi = spi;
0644     priv->page_size = pagesize;
0645     priv->page_offset = pageoffset;
0646
0647     /* name must be usable with cmdlinepart */
0648     sprintf(priv->name, "spi%d.%d-%s",
0649             spi->master->bus_num, spi->chip_select,
0650             name);
0651
0652     device = &priv->mtd;
0653     device->name = (pdata && pdata->name) ? pdata->name : priv->name;
0654     device->size = nr_pages * pagesize;
0655     device->erasesize = pagesize;
0656     device->writesize = pagesize;
0657     device->type = MTD_DATAFLASH;
0658     device->flags = MTD_WRITEABLE;
0659     device->_erase = dataflash_erase;
0660     device->_read = dataflash_read;
0661     device->_write = dataflash_write;
0662     device->priv = priv;
0663
0664     device->dev.parent = &spi->dev;
0665     mtd_set_of_node(device, spi->dev.of_node);
0666
0667     if (revision >= 'c')
0668         otp_tag = otp_setup(device, revision);
0669
0670     dev_info(&spi->dev, "%s (%lld KBytes) pagesize %d bytes%s\n",
0671             name, (long long)((device->size + 1023) >> 10),
0672             pagesize, otp_tag);
0673     spi_set_drvdata(spi, priv);
0674
0675     err = mtd_device_register(device,
0676             pdata ? pdata->parts : NULL,
0677             pdata ? pdata->nr_parts : 0);
0678
0679     if (!err)
0680         return 0;
0681
0682     kfree(priv);
0683     return err;
0684 }
0685
0686 static inline int add_dataflash(struct spi_device *spi, char *name,
0687                 int nr_pages, int pagesize, int pageoffset)
0688 {
0689     return add_dataflash_otp(spi, name, nr_pages, pagesize,
0690             pageoffset, 0);
0691 }
0692
0693 struct flash_info {
0694     char        *name;
0695
0696     /* JEDEC id has a high byte of zero plus three data bytes:
0697      * the manufacturer id, then a two byte device id.
0698      */
0699     u64     jedec_id;
0700
0701     /* The size listed here is what works with OP_ERASE_PAGE. */
0702     unsigned    nr_pages;
0703     u16     pagesize;
0704     u16     pageoffset;
0705
0706     u16     flags;
0707 #define SUP_EXTID   0x0004      /* supports extended ID data */
0708 #define SUP_POW2PS  0x0002      /* supports 2^N byte pages */
0709 #define IS_POW2PS   0x0001      /* uses 2^N byte pages */
0710 };
0711
0712 static struct flash_info dataflash_data[] = {
0713
0714     /*
0715      * NOTE:  chips with SUP_POW2PS (rev D and up) need two entries,
0716      * one with IS_POW2PS and the other without.  The entry with the
0717      * non-2^N byte page size can't name exact chip revisions without
0718      * losing backwards compatibility for cmdlinepart.
0719      *
0720      * These newer chips also support 128-byte security registers (with
0721      * 64 bytes one-time-programmable) and software write-protection.
0722      */
0723     { "AT45DB011B",  0x1f2200, 512, 264, 9, SUP_POW2PS},
0724     { "at45db011d",  0x1f2200, 512, 256, 8, SUP_POW2PS | IS_POW2PS},
0725
0726     { "AT45DB021B",  0x1f2300, 1024, 264, 9, SUP_POW2PS},
0727     { "at45db021d",  0x1f2300, 1024, 256, 8, SUP_POW2PS | IS_POW2PS},
0728
0729     { "AT45DB041x",  0x1f2400, 2048, 264, 9, SUP_POW2PS},
0730     { "at45db041d",  0x1f2400, 2048, 256, 8, SUP_POW2PS | IS_POW2PS},
0731
0732     { "AT45DB081B",  0x1f2500, 4096, 264, 9, SUP_POW2PS},
0733     { "at45db081d",  0x1f2500, 4096, 256, 8, SUP_POW2PS | IS_POW2PS},
0734
0735     { "AT45DB161x",  0x1f2600, 4096, 528, 10, SUP_POW2PS},
0736     { "at45db161d",  0x1f2600, 4096, 512, 9, SUP_POW2PS | IS_POW2PS},
0737
0738     { "AT45DB321x",  0x1f2700, 8192, 528, 10, 0},       /* rev C */
0739
0740     { "AT45DB321x",  0x1f2701, 8192, 528, 10, SUP_POW2PS},
0741     { "at45db321d",  0x1f2701, 8192, 512, 9, SUP_POW2PS | IS_POW2PS},
0742
0743     { "AT45DB642x",  0x1f2800, 8192, 1056, 11, SUP_POW2PS},
0744     { "at45db642d",  0x1f2800, 8192, 1024, 10, SUP_POW2PS | IS_POW2PS},
0745
0746     { "AT45DB641E",  0x1f28000100ULL, 32768, 264, 9, SUP_EXTID | SUP_POW2PS},
0747     { "at45db641e",  0x1f28000100ULL, 32768, 256, 8, SUP_EXTID | SUP_POW2PS | IS_POW2PS},
0748 };
0749
0750 static struct flash_info *jedec_lookup(struct spi_device *spi,
0751                        u64 jedec, bool use_extid)
0752 {
0753     struct flash_info *info;
0754     int status;
0755
0756     for (info = dataflash_data;
0757          info < dataflash_data + ARRAY_SIZE(dataflash_data);
0758          info++) {
0759         if (use_extid && !(info->flags & SUP_EXTID))
0760             continue;
0761
0762         if (info->jedec_id == jedec) {
0763             dev_dbg(&spi->dev, "OTP, sector protect%s\n",
0764                 (info->flags & SUP_POW2PS) ?
0765                 ", binary pagesize" : "");
0766             if (info->flags & SUP_POW2PS) {
0767                 status = dataflash_status(spi);
0768                 if (status < 0) {
0769                     dev_dbg(&spi->dev, "status error %d\n",
0770                         status);
0771                     return ERR_PTR(status);
0772                 }
0773                 if (status & 0x1) {
0774                     if (info->flags & IS_POW2PS)
0775                         return info;
0776                 } else {
0777                     if (!(info->flags & IS_POW2PS))
0778                         return info;
0779                 }
0780             } else
0781                 return info;
0782         }
0783     }
0784
0785     return ERR_PTR(-ENODEV);
0786 }
0787
0788 static struct flash_info *jedec_probe(struct spi_device *spi)
0789 {
0790     int ret;
0791     u8 code = OP_READ_ID;
0792     u64 jedec;
0793     u8 id[sizeof(jedec)] = {0};
0794     const unsigned int id_size = 5;
0795     struct flash_info *info;
0796
0797     /*
0798      * JEDEC also defines an optional "extended device information"
0799      * string for after vendor-specific data, after the three bytes
0800      * we use here.  Supporting some chips might require using it.
0801      *
0802      * If the vendor ID isn't Atmel's (0x1f), assume this call failed.
0803      * That's not an error; only rev C and newer chips handle it, and
0804      * only Atmel sells these chips.
0805      */
0806     ret = spi_write_then_read(spi, &code, 1, id, id_size);
0807     if (ret < 0) {
0808         dev_dbg(&spi->dev, "error %d reading JEDEC ID\n", ret);
0809         return ERR_PTR(ret);
0810     }
0811
0812     if (id[0] != CFI_MFR_ATMEL)
0813         return NULL;
0814
0815     jedec = be64_to_cpup((__be64 *)id);
0816
0817     /*
0818      * First, try to match device using extended device
0819      * information
0820      */
0821     info = jedec_lookup(spi, jedec >> DATAFLASH_SHIFT_EXTID, true);
0822     if (!IS_ERR(info))
0823         return info;
0824     /*
0825      * If that fails, make another pass using regular ID
0826      * information
0827      */
0828     info = jedec_lookup(spi, jedec >> DATAFLASH_SHIFT_ID, false);
0829     if (!IS_ERR(info))
0830         return info;
0831     /*
0832      * Treat other chips as errors ... we won't know the right page
0833      * size (it might be binary) even when we can tell which density
0834      * class is involved (legacy chip id scheme).
0835      */
0836     dev_warn(&spi->dev, "JEDEC id %016llx not handled\n", jedec);
0837     return ERR_PTR(-ENODEV);
0838 }
0839
0840 /*
0841  * Detect and initialize DataFlash device, using JEDEC IDs on newer chips
0842  * or else the ID code embedded in the status bits:
0843  *
0844  *   Device      Density         ID code          #Pages PageSize  Offset
0845  *   AT45DB011B  1Mbit   (128K)  xx0011xx (0x0c)    512    264      9
0846  *   AT45DB021B  2Mbit   (256K)  xx0101xx (0x14)   1024    264      9
0847  *   AT45DB041B  4Mbit   (512K)  xx0111xx (0x1c)   2048    264      9
0848  *   AT45DB081B  8Mbit   (1M)    xx1001xx (0x24)   4096    264      9
0849  *   AT45DB0161B 16Mbit  (2M)    xx1011xx (0x2c)   4096    528     10
0850  *   AT45DB0321B 32Mbit  (4M)    xx1101xx (0x34)   8192    528     10
0851  *   AT45DB0642  64Mbit  (8M)    xx111xxx (0x3c)   8192   1056     11
0852  *   AT45DB1282  128Mbit (16M)   xx0100xx (0x10)  16384   1056     11
0853  */
0854 static int dataflash_probe(struct spi_device *spi)
0855 {
0856     int status;
0857     struct flash_info   *info;
0858
0859     /*
0860      * Try to detect dataflash by JEDEC ID.
0861      * If it succeeds we know we have either a C or D part.
0862      * D will support power of 2 pagesize option.
0863      * Both support the security register, though with different
0864      * write procedures.
0865      */
0866     info = jedec_probe(spi);
0867     if (IS_ERR(info))
0868         return PTR_ERR(info);
0869     if (info != NULL)
0870         return add_dataflash_otp(spi, info->name, info->nr_pages,
0871                 info->pagesize, info->pageoffset,
0872                 (info->flags & SUP_POW2PS) ? 'd' : 'c');
0873
0874     /*
0875      * Older chips support only legacy commands, identifing
0876      * capacity using bits in the status byte.
0877      */
0878     status = dataflash_status(spi);
0879     if (status <= 0 || status == 0xff) {
0880         dev_dbg(&spi->dev, "status error %d\n", status);
0881         if (status == 0 || status == 0xff)
0882             status = -ENODEV;
0883         return status;
0884     }
0885
0886     /* if there's a device there, assume it's dataflash.
0887      * board setup should have set spi->max_speed_max to
0888      * match f(car) for continuous reads, mode 0 or 3.
0889      */
0890     switch (status & 0x3c) {
0891     case 0x0c:  /* 0 0 1 1 x x */
0892         status = add_dataflash(spi, "AT45DB011B", 512, 264, 9);
0893         break;
0894     case 0x14:  /* 0 1 0 1 x x */
0895         status = add_dataflash(spi, "AT45DB021B", 1024, 264, 9);
0896         break;
0897     case 0x1c:  /* 0 1 1 1 x x */
0898         status = add_dataflash(spi, "AT45DB041x", 2048, 264, 9);
0899         break;
0900     case 0x24:  /* 1 0 0 1 x x */
0901         status = add_dataflash(spi, "AT45DB081B", 4096, 264, 9);
0902         break;
0903     case 0x2c:  /* 1 0 1 1 x x */
0904         status = add_dataflash(spi, "AT45DB161x", 4096, 528, 10);
0905         break;
0906     case 0x34:  /* 1 1 0 1 x x */
0907         status = add_dataflash(spi, "AT45DB321x", 8192, 528, 10);
0908         break;
0909     case 0x38:  /* 1 1 1 x x x */
0910     case 0x3c:
0911         status = add_dataflash(spi, "AT45DB642x", 8192, 1056, 11);
0912         break;
0913     /* obsolete AT45DB1282 not (yet?) supported */
0914     default:
0915         dev_info(&spi->dev, "unsupported device (%x)\n",
0916                 status & 0x3c);
0917         status = -ENODEV;
0918     }
0919
0920     if (status < 0)
0921         dev_dbg(&spi->dev, "add_dataflash --> %d\n", status);
0922
0923     return status;
0924 }
0925
0926 static void dataflash_remove(struct spi_device *spi)
0927 {
0928     struct dataflash    *flash = spi_get_drvdata(spi);
0929
0930     dev_dbg(&spi->dev, "remove\n");
0931
0932     WARN_ON(mtd_device_unregister(&flash->mtd));
0933
0934     kfree(flash);
0935 }
0936
0937 static struct spi_driver dataflash_driver = {
0938     .driver = {
0939         .name       = "mtd_dataflash",
0940         .of_match_table = of_match_ptr(dataflash_dt_ids),
0941     },
0942     .id_table = dataflash_dev_ids,
0943
0944     .probe      = dataflash_probe,
0945     .remove     = dataflash_remove,
0946     .id_table   = dataflash_spi_ids,
0947
0948     /* FIXME:  investigate suspend and resume... */
0949 };
0950
0951 module_spi_driver(dataflash_driver);
0952
0953 MODULE_LICENSE("GPL");
0954 MODULE_AUTHOR("Andrew Victor, David Brownell");
0955 MODULE_DESCRIPTION("MTD DataFlash driver");
0956 MODULE_ALIAS("spi:mtd_dataflash");