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0001 /* SPDX-License-Identifier: GPL-2.0-or-later */ 0002 /* 0003 * Copyright (c) 2001, 2003 Maciej W. Rozycki 0004 * 0005 * DEC MS02-NV (54-20948-01) battery backed-up NVRAM module for 0006 * DECstation/DECsystem 5000/2x0 and DECsystem 5900 and 5900/260 0007 * systems. 0008 */ 0009 0010 #include <linux/ioport.h> 0011 #include <linux/mtd/mtd.h> 0012 0013 /* 0014 * Addresses are decoded as follows: 0015 * 0016 * 0x000000 - 0x3fffff SRAM 0017 * 0x400000 - 0x7fffff CSR 0018 * 0019 * Within the SRAM area the following ranges are forced by the system 0020 * firmware: 0021 * 0022 * 0x000000 - 0x0003ff diagnostic area, destroyed upon a reboot 0023 * 0x000400 - ENDofRAM storage area, available to operating systems 0024 * 0025 * but we can't really use the available area right from 0x000400 as 0026 * the first word is used by the firmware as a status flag passed 0027 * from an operating system. If anything but the valid data magic 0028 * ID value is found, the firmware considers the SRAM clean, i.e. 0029 * containing no valid data, and disables the battery resulting in 0030 * data being erased as soon as power is switched off. So the choice 0031 * for the start address of the user-available is 0x001000 which is 0032 * nicely page aligned. The area between 0x000404 and 0x000fff may 0033 * be used by the driver for own needs. 0034 * 0035 * The diagnostic area defines two status words to be read by an 0036 * operating system, a magic ID to distinguish a MS02-NV board from 0037 * anything else and a status information providing results of tests 0038 * as well as the size of SRAM available, which can be 1MiB or 2MiB 0039 * (that's what the firmware handles; no idea if 2MiB modules ever 0040 * existed). 0041 * 0042 * The firmware only handles the MS02-NV board if installed in the 0043 * last (15th) slot, so for any other location the status information 0044 * stored in the SRAM cannot be relied upon. But from the hardware 0045 * point of view there is no problem using up to 14 such boards in a 0046 * system -- only the 1st slot needs to be filled with a DRAM module. 0047 * The MS02-NV board is ECC-protected, like other MS02 memory boards. 0048 * 0049 * The state of the battery as provided by the CSR is reflected on 0050 * the two onboard LEDs. When facing the battery side of the board, 0051 * with the LEDs at the top left and the battery at the bottom right 0052 * (i.e. looking from the back side of the system box), their meaning 0053 * is as follows (the system has to be powered on): 0054 * 0055 * left LED battery disable status: lit = enabled 0056 * right LED battery condition status: lit = OK 0057 */ 0058 0059 /* MS02-NV iomem register offsets. */ 0060 #define MS02NV_CSR 0x400000 /* control & status register */ 0061 0062 /* MS02-NV CSR status bits. */ 0063 #define MS02NV_CSR_BATT_OK 0x01 /* battery OK */ 0064 #define MS02NV_CSR_BATT_OFF 0x02 /* battery disabled */ 0065 0066 0067 /* MS02-NV memory offsets. */ 0068 #define MS02NV_DIAG 0x0003f8 /* diagnostic status */ 0069 #define MS02NV_MAGIC 0x0003fc /* MS02-NV magic ID */ 0070 #define MS02NV_VALID 0x000400 /* valid data magic ID */ 0071 #define MS02NV_RAM 0x001000 /* user-exposed RAM start */ 0072 0073 /* MS02-NV diagnostic status bits. */ 0074 #define MS02NV_DIAG_TEST 0x01 /* SRAM test done (?) */ 0075 #define MS02NV_DIAG_RO 0x02 /* SRAM r/o test done */ 0076 #define MS02NV_DIAG_RW 0x04 /* SRAM r/w test done */ 0077 #define MS02NV_DIAG_FAIL 0x08 /* SRAM test failed */ 0078 #define MS02NV_DIAG_SIZE_MASK 0xf0 /* SRAM size mask */ 0079 #define MS02NV_DIAG_SIZE_SHIFT 0x10 /* SRAM size shift (left) */ 0080 0081 /* MS02-NV general constants. */ 0082 #define MS02NV_ID 0x03021966 /* MS02-NV magic ID value */ 0083 #define MS02NV_VALID_ID 0xbd100248 /* valid data magic ID value */ 0084 #define MS02NV_SLOT_SIZE 0x800000 /* size of the address space 0085 decoded by the module */ 0086 0087 0088 typedef volatile u32 ms02nv_uint; 0089 0090 struct ms02nv_private { 0091 struct mtd_info *next; 0092 struct { 0093 struct resource *module; 0094 struct resource *diag_ram; 0095 struct resource *user_ram; 0096 struct resource *csr; 0097 } resource; 0098 u_char *addr; 0099 size_t size; 0100 u_char *uaddr; 0101 };
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