mtd/devices/bcm47xxsflash.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #ifndef __BCM47XXSFLASH_H
0003 #define __BCM47XXSFLASH_H
0004
0005 #include <linux/mtd/mtd.h>
0006
0007 #define BCM47XXSFLASH_WINDOW_SZ         SZ_16M
0008
0009 /* Used for ST flashes only. */
0010 #define OPCODE_ST_WREN      0x0006      /* Write Enable */
0011 #define OPCODE_ST_WRDIS     0x0004      /* Write Disable */
0012 #define OPCODE_ST_RDSR      0x0105      /* Read Status Register */
0013 #define OPCODE_ST_WRSR      0x0101      /* Write Status Register */
0014 #define OPCODE_ST_READ      0x0303      /* Read Data Bytes */
0015 #define OPCODE_ST_PP        0x0302      /* Page Program */
0016 #define OPCODE_ST_SE        0x02d8      /* Sector Erase */
0017 #define OPCODE_ST_BE        0x00c7      /* Bulk Erase */
0018 #define OPCODE_ST_DP        0x00b9      /* Deep Power-down */
0019 #define OPCODE_ST_RES       0x03ab      /* Read Electronic Signature */
0020 #define OPCODE_ST_CSA       0x1000      /* Keep chip select asserted */
0021 #define OPCODE_ST_SSE       0x0220      /* Sub-sector Erase */
0022 #define OPCODE_ST_READ4B    0x6313      /* Read Data Bytes in 4Byte addressing mode */
0023
0024 /* Used for Atmel flashes only. */
0025 #define OPCODE_AT_READ              0x07e8
0026 #define OPCODE_AT_PAGE_READ         0x07d2
0027 #define OPCODE_AT_STATUS            0x01d7
0028 #define OPCODE_AT_BUF1_WRITE            0x0384
0029 #define OPCODE_AT_BUF2_WRITE            0x0387
0030 #define OPCODE_AT_BUF1_ERASE_PROGRAM        0x0283
0031 #define OPCODE_AT_BUF2_ERASE_PROGRAM        0x0286
0032 #define OPCODE_AT_BUF1_PROGRAM          0x0288
0033 #define OPCODE_AT_BUF2_PROGRAM          0x0289
0034 #define OPCODE_AT_PAGE_ERASE            0x0281
0035 #define OPCODE_AT_BLOCK_ERASE           0x0250
0036 #define OPCODE_AT_BUF1_WRITE_ERASE_PROGRAM  0x0382
0037 #define OPCODE_AT_BUF2_WRITE_ERASE_PROGRAM  0x0385
0038 #define OPCODE_AT_BUF1_LOAD         0x0253
0039 #define OPCODE_AT_BUF2_LOAD         0x0255
0040 #define OPCODE_AT_BUF1_COMPARE          0x0260
0041 #define OPCODE_AT_BUF2_COMPARE          0x0261
0042 #define OPCODE_AT_BUF1_REPROGRAM        0x0258
0043 #define OPCODE_AT_BUF2_REPROGRAM        0x0259
0044
0045 /* Status register bits for ST flashes */
0046 #define SR_ST_WIP       0x01        /* Write In Progress */
0047 #define SR_ST_WEL       0x02        /* Write Enable Latch */
0048 #define SR_ST_BP_MASK       0x1c        /* Block Protect */
0049 #define SR_ST_BP_SHIFT      2
0050 #define SR_ST_SRWD      0x80        /* Status Register Write Disable */
0051
0052 /* Status register bits for Atmel flashes */
0053 #define SR_AT_READY     0x80
0054 #define SR_AT_MISMATCH      0x40
0055 #define SR_AT_ID_MASK       0x38
0056 #define SR_AT_ID_SHIFT      3
0057
0058 struct bcma_drv_cc;
0059
0060 enum bcm47xxsflash_type {
0061     BCM47XXSFLASH_TYPE_ATMEL,
0062     BCM47XXSFLASH_TYPE_ST,
0063 };
0064
0065 struct bcm47xxsflash {
0066     struct bcma_drv_cc *bcma_cc;
0067     int (*cc_read)(struct bcm47xxsflash *b47s, u16 offset);
0068     void (*cc_write)(struct bcm47xxsflash *b47s, u16 offset, u32 value);
0069
0070     enum bcm47xxsflash_type type;
0071
0072     void __iomem *window;
0073
0074     u32 blocksize;
0075     u16 numblocks;
0076     u32 size;
0077
0078     struct mtd_info mtd;
0079 };
0080
0081 #endif /* BCM47XXSFLASH */