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0001 /*
0002    Common Flash Interface probe code.
0003    (C) 2000 Red Hat. GPL'd.
0004    See JEDEC (http://www.jedec.org/) standard JESD21C (section 3.5)
0005    for the standard this probe goes back to.
0006 
0007    Occasionally maintained by Thayne Harbaugh tharbaugh at lnxi dot com
0008 */
0009 
0010 #include <linux/module.h>
0011 #include <linux/init.h>
0012 #include <linux/types.h>
0013 #include <linux/kernel.h>
0014 #include <asm/io.h>
0015 #include <asm/byteorder.h>
0016 #include <linux/errno.h>
0017 #include <linux/slab.h>
0018 #include <linux/interrupt.h>
0019 
0020 #include <linux/mtd/mtd.h>
0021 #include <linux/mtd/map.h>
0022 #include <linux/mtd/cfi.h>
0023 #include <linux/mtd/gen_probe.h>
0024 
0025 /* AMD */
0026 #define AM29DL800BB 0x22CB
0027 #define AM29DL800BT 0x224A
0028 
0029 #define AM29F800BB  0x2258
0030 #define AM29F800BT  0x22D6
0031 #define AM29LV400BB 0x22BA
0032 #define AM29LV400BT 0x22B9
0033 #define AM29LV800BB 0x225B
0034 #define AM29LV800BT 0x22DA
0035 #define AM29LV160DT 0x22C4
0036 #define AM29LV160DB 0x2249
0037 #define AM29F017D   0x003D
0038 #define AM29F016D   0x00AD
0039 #define AM29F080    0x00D5
0040 #define AM29F040    0x00A4
0041 #define AM29LV040B  0x004F
0042 #define AM29F032B   0x0041
0043 #define AM29F002T   0x00B0
0044 #define AM29SL800DB 0x226B
0045 #define AM29SL800DT 0x22EA
0046 
0047 /* Atmel */
0048 #define AT49BV512   0x0003
0049 #define AT29LV512   0x003d
0050 #define AT49BV16X   0x00C0
0051 #define AT49BV16XT  0x00C2
0052 #define AT49BV32X   0x00C8
0053 #define AT49BV32XT  0x00C9
0054 
0055 /* Eon */
0056 #define EN29LV400AT 0x22B9
0057 #define EN29LV400AB 0x22BA
0058 #define EN29SL800BB 0x226B
0059 #define EN29SL800BT 0x22EA
0060 
0061 /* Fujitsu */
0062 #define MBM29F040C  0x00A4
0063 #define MBM29F800BA 0x2258
0064 #define MBM29LV650UE    0x22D7
0065 #define MBM29LV320TE    0x22F6
0066 #define MBM29LV320BE    0x22F9
0067 #define MBM29LV160TE    0x22C4
0068 #define MBM29LV160BE    0x2249
0069 #define MBM29LV800BA    0x225B
0070 #define MBM29LV800TA    0x22DA
0071 #define MBM29LV400TC    0x22B9
0072 #define MBM29LV400BC    0x22BA
0073 
0074 /* Hyundai */
0075 #define HY29F002T   0x00B0
0076 
0077 /* Intel */
0078 #define I28F004B3T  0x00d4
0079 #define I28F004B3B  0x00d5
0080 #define I28F400B3T  0x8894
0081 #define I28F400B3B  0x8895
0082 #define I28F008S5   0x00a6
0083 #define I28F016S5   0x00a0
0084 #define I28F008SA   0x00a2
0085 #define I28F008B3T  0x00d2
0086 #define I28F008B3B  0x00d3
0087 #define I28F800B3T  0x8892
0088 #define I28F800B3B  0x8893
0089 #define I28F016S3   0x00aa
0090 #define I28F016B3T  0x00d0
0091 #define I28F016B3B  0x00d1
0092 #define I28F160B3T  0x8890
0093 #define I28F160B3B  0x8891
0094 #define I28F320B3T  0x8896
0095 #define I28F320B3B  0x8897
0096 #define I28F640B3T  0x8898
0097 #define I28F640B3B  0x8899
0098 #define I28F640C3B  0x88CD
0099 #define I28F160F3T  0x88F3
0100 #define I28F160F3B  0x88F4
0101 #define I28F160C3T  0x88C2
0102 #define I28F160C3B  0x88C3
0103 #define I82802AB    0x00ad
0104 #define I82802AC    0x00ac
0105 
0106 /* Macronix */
0107 #define MX29LV040C  0x004F
0108 #define MX29LV160T  0x22C4
0109 #define MX29LV160B  0x2249
0110 #define MX29F040    0x00A4
0111 #define MX29F016    0x00AD
0112 #define MX29F002T   0x00B0
0113 #define MX29F004T   0x0045
0114 #define MX29F004B   0x0046
0115 
0116 /* NEC */
0117 #define UPD29F064115    0x221C
0118 
0119 /* PMC */
0120 #define PM49FL002   0x006D
0121 #define PM49FL004   0x006E
0122 #define PM49FL008   0x006A
0123 
0124 /* Sharp */
0125 #define LH28F640BF  0x00B0
0126 
0127 /* ST - www.st.com */
0128 #define M29F800AB   0x0058
0129 #define M29W800DT   0x22D7
0130 #define M29W800DB   0x225B
0131 #define M29W400DT   0x00EE
0132 #define M29W400DB   0x00EF
0133 #define M29W160DT   0x22C4
0134 #define M29W160DB   0x2249
0135 #define M29W040B    0x00E3
0136 #define M50FW040    0x002C
0137 #define M50FW080    0x002D
0138 #define M50FW016    0x002E
0139 #define M50LPW080       0x002F
0140 #define M50FLW080A  0x0080
0141 #define M50FLW080B  0x0081
0142 #define PSD4256G6V  0x00e9
0143 
0144 /* SST */
0145 #define SST29EE020  0x0010
0146 #define SST29LE020  0x0012
0147 #define SST29EE512  0x005d
0148 #define SST29LE512  0x003d
0149 #define SST39LF800  0x2781
0150 #define SST39LF160  0x2782
0151 #define SST39VF1601 0x234b
0152 #define SST39VF3201 0x235b
0153 #define SST39WF1601 0x274b
0154 #define SST39WF1602 0x274a
0155 #define SST39LF512  0x00D4
0156 #define SST39LF010  0x00D5
0157 #define SST39LF020  0x00D6
0158 #define SST39LF040  0x00D7
0159 #define SST39SF010A 0x00B5
0160 #define SST39SF020A 0x00B6
0161 #define SST39SF040  0x00B7
0162 #define SST49LF004B 0x0060
0163 #define SST49LF040B 0x0050
0164 #define SST49LF008A 0x005a
0165 #define SST49LF030A 0x001C
0166 #define SST49LF040A 0x0051
0167 #define SST49LF080A 0x005B
0168 #define SST36VF3203 0x7354
0169 
0170 /* Toshiba */
0171 #define TC58FVT160  0x00C2
0172 #define TC58FVB160  0x0043
0173 #define TC58FVT321  0x009A
0174 #define TC58FVB321  0x009C
0175 #define TC58FVT641  0x0093
0176 #define TC58FVB641  0x0095
0177 
0178 /* Winbond */
0179 #define W49V002A    0x00b0
0180 
0181 
0182 /*
0183  * Unlock address sets for AMD command sets.
0184  * Intel command sets use the MTD_UADDR_UNNECESSARY.
0185  * Each identifier, except MTD_UADDR_UNNECESSARY, and
0186  * MTD_UADDR_NO_SUPPORT must be defined below in unlock_addrs[].
0187  * MTD_UADDR_NOT_SUPPORTED must be 0 so that structure
0188  * initialization need not require initializing all of the
0189  * unlock addresses for all bit widths.
0190  */
0191 enum uaddr {
0192     MTD_UADDR_NOT_SUPPORTED = 0,    /* data width not supported */
0193     MTD_UADDR_0x0555_0x02AA,
0194     MTD_UADDR_0x0555_0x0AAA,
0195     MTD_UADDR_0x5555_0x2AAA,
0196     MTD_UADDR_0x0AAA_0x0554,
0197     MTD_UADDR_0x0AAA_0x0555,
0198     MTD_UADDR_0xAAAA_0x5555,
0199     MTD_UADDR_DONT_CARE,        /* Requires an arbitrary address */
0200     MTD_UADDR_UNNECESSARY,      /* Does not require any address */
0201 };
0202 
0203 
0204 struct unlock_addr {
0205     uint32_t addr1;
0206     uint32_t addr2;
0207 };
0208 
0209 
0210 /*
0211  * I don't like the fact that the first entry in unlock_addrs[]
0212  * exists, but is for MTD_UADDR_NOT_SUPPORTED - and, therefore,
0213  * should not be used.  The  problem is that structures with
0214  * initializers have extra fields initialized to 0.  It is _very_
0215  * desirable to have the unlock address entries for unsupported
0216  * data widths automatically initialized - that means that
0217  * MTD_UADDR_NOT_SUPPORTED must be 0 and the first entry here
0218  * must go unused.
0219  */
0220 static const struct unlock_addr  unlock_addrs[] = {
0221     [MTD_UADDR_NOT_SUPPORTED] = {
0222         .addr1 = 0xffff,
0223         .addr2 = 0xffff
0224     },
0225 
0226     [MTD_UADDR_0x0555_0x02AA] = {
0227         .addr1 = 0x0555,
0228         .addr2 = 0x02aa
0229     },
0230 
0231     [MTD_UADDR_0x0555_0x0AAA] = {
0232         .addr1 = 0x0555,
0233         .addr2 = 0x0aaa
0234     },
0235 
0236     [MTD_UADDR_0x5555_0x2AAA] = {
0237         .addr1 = 0x5555,
0238         .addr2 = 0x2aaa
0239     },
0240 
0241     [MTD_UADDR_0x0AAA_0x0554] = {
0242         .addr1 = 0x0AAA,
0243         .addr2 = 0x0554
0244     },
0245 
0246     [MTD_UADDR_0x0AAA_0x0555] = {
0247         .addr1 = 0x0AAA,
0248         .addr2 = 0x0555
0249     },
0250 
0251     [MTD_UADDR_0xAAAA_0x5555] = {
0252         .addr1 = 0xaaaa,
0253         .addr2 = 0x5555
0254     },
0255 
0256     [MTD_UADDR_DONT_CARE] = {
0257         .addr1 = 0x0000,      /* Doesn't matter which address */
0258         .addr2 = 0x0000       /* is used - must be last entry */
0259     },
0260 
0261     [MTD_UADDR_UNNECESSARY] = {
0262         .addr1 = 0x0000,
0263         .addr2 = 0x0000
0264     }
0265 };
0266 
0267 struct amd_flash_info {
0268     const char *name;
0269     const uint16_t mfr_id;
0270     const uint16_t dev_id;
0271     const uint8_t dev_size;
0272     const uint8_t nr_regions;
0273     const uint16_t cmd_set;
0274     const uint32_t regions[6];
0275     const uint8_t devtypes;     /* Bitmask for x8, x16 etc. */
0276     const uint8_t uaddr;        /* unlock addrs for 8, 16, 32, 64 */
0277 };
0278 
0279 #define ERASEINFO(size,blocks) (size<<8)|(blocks-1)
0280 
0281 #define SIZE_64KiB  16
0282 #define SIZE_128KiB 17
0283 #define SIZE_256KiB 18
0284 #define SIZE_512KiB 19
0285 #define SIZE_1MiB   20
0286 #define SIZE_2MiB   21
0287 #define SIZE_4MiB   22
0288 #define SIZE_8MiB   23
0289 
0290 
0291 /*
0292  * Please keep this list ordered by manufacturer!
0293  * Fortunately, the list isn't searched often and so a
0294  * slow, linear search isn't so bad.
0295  */
0296 static const struct amd_flash_info jedec_table[] = {
0297     {
0298         .mfr_id     = CFI_MFR_AMD,
0299         .dev_id     = AM29F032B,
0300         .name       = "AMD AM29F032B",
0301         .uaddr      = MTD_UADDR_0x0555_0x02AA,
0302         .devtypes   = CFI_DEVICETYPE_X8,
0303         .dev_size   = SIZE_4MiB,
0304         .cmd_set    = P_ID_AMD_STD,
0305         .nr_regions = 1,
0306         .regions    = {
0307             ERASEINFO(0x10000,64)
0308         }
0309     }, {
0310         .mfr_id     = CFI_MFR_AMD,
0311         .dev_id     = AM29LV160DT,
0312         .name       = "AMD AM29LV160DT",
0313         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
0314         .uaddr      = MTD_UADDR_0x0AAA_0x0555,
0315         .dev_size   = SIZE_2MiB,
0316         .cmd_set    = P_ID_AMD_STD,
0317         .nr_regions = 4,
0318         .regions    = {
0319             ERASEINFO(0x10000,31),
0320             ERASEINFO(0x08000,1),
0321             ERASEINFO(0x02000,2),
0322             ERASEINFO(0x04000,1)
0323         }
0324     }, {
0325         .mfr_id     = CFI_MFR_AMD,
0326         .dev_id     = AM29LV160DB,
0327         .name       = "AMD AM29LV160DB",
0328         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
0329         .uaddr      = MTD_UADDR_0x0AAA_0x0555,
0330         .dev_size   = SIZE_2MiB,
0331         .cmd_set    = P_ID_AMD_STD,
0332         .nr_regions = 4,
0333         .regions    = {
0334             ERASEINFO(0x04000,1),
0335             ERASEINFO(0x02000,2),
0336             ERASEINFO(0x08000,1),
0337             ERASEINFO(0x10000,31)
0338         }
0339     }, {
0340         .mfr_id     = CFI_MFR_AMD,
0341         .dev_id     = AM29LV400BB,
0342         .name       = "AMD AM29LV400BB",
0343         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
0344         .uaddr      = MTD_UADDR_0x0AAA_0x0555,
0345         .dev_size   = SIZE_512KiB,
0346         .cmd_set    = P_ID_AMD_STD,
0347         .nr_regions = 4,
0348         .regions    = {
0349             ERASEINFO(0x04000,1),
0350             ERASEINFO(0x02000,2),
0351             ERASEINFO(0x08000,1),
0352             ERASEINFO(0x10000,7)
0353         }
0354     }, {
0355         .mfr_id     = CFI_MFR_AMD,
0356         .dev_id     = AM29LV400BT,
0357         .name       = "AMD AM29LV400BT",
0358         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
0359         .uaddr      = MTD_UADDR_0x0AAA_0x0555,
0360         .dev_size   = SIZE_512KiB,
0361         .cmd_set    = P_ID_AMD_STD,
0362         .nr_regions = 4,
0363         .regions    = {
0364             ERASEINFO(0x10000,7),
0365             ERASEINFO(0x08000,1),
0366             ERASEINFO(0x02000,2),
0367             ERASEINFO(0x04000,1)
0368         }
0369     }, {
0370         .mfr_id     = CFI_MFR_AMD,
0371         .dev_id     = AM29LV800BB,
0372         .name       = "AMD AM29LV800BB",
0373         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
0374         .uaddr      = MTD_UADDR_0x0AAA_0x0555,
0375         .dev_size   = SIZE_1MiB,
0376         .cmd_set    = P_ID_AMD_STD,
0377         .nr_regions = 4,
0378         .regions    = {
0379             ERASEINFO(0x04000,1),
0380             ERASEINFO(0x02000,2),
0381             ERASEINFO(0x08000,1),
0382             ERASEINFO(0x10000,15),
0383         }
0384     }, {
0385 /* add DL */
0386         .mfr_id     = CFI_MFR_AMD,
0387         .dev_id     = AM29DL800BB,
0388         .name       = "AMD AM29DL800BB",
0389         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
0390         .uaddr      = MTD_UADDR_0x0AAA_0x0555,
0391         .dev_size   = SIZE_1MiB,
0392         .cmd_set    = P_ID_AMD_STD,
0393         .nr_regions = 6,
0394         .regions    = {
0395             ERASEINFO(0x04000,1),
0396             ERASEINFO(0x08000,1),
0397             ERASEINFO(0x02000,4),
0398             ERASEINFO(0x08000,1),
0399             ERASEINFO(0x04000,1),
0400             ERASEINFO(0x10000,14)
0401         }
0402     }, {
0403         .mfr_id     = CFI_MFR_AMD,
0404         .dev_id     = AM29DL800BT,
0405         .name       = "AMD AM29DL800BT",
0406         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
0407         .uaddr      = MTD_UADDR_0x0AAA_0x0555,
0408         .dev_size   = SIZE_1MiB,
0409         .cmd_set    = P_ID_AMD_STD,
0410         .nr_regions = 6,
0411         .regions    = {
0412             ERASEINFO(0x10000,14),
0413             ERASEINFO(0x04000,1),
0414             ERASEINFO(0x08000,1),
0415             ERASEINFO(0x02000,4),
0416             ERASEINFO(0x08000,1),
0417             ERASEINFO(0x04000,1)
0418         }
0419     }, {
0420         .mfr_id     = CFI_MFR_AMD,
0421         .dev_id     = AM29F800BB,
0422         .name       = "AMD AM29F800BB",
0423         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
0424         .uaddr      = MTD_UADDR_0x0AAA_0x0555,
0425         .dev_size   = SIZE_1MiB,
0426         .cmd_set    = P_ID_AMD_STD,
0427         .nr_regions = 4,
0428         .regions    = {
0429             ERASEINFO(0x04000,1),
0430             ERASEINFO(0x02000,2),
0431             ERASEINFO(0x08000,1),
0432             ERASEINFO(0x10000,15),
0433         }
0434     }, {
0435         .mfr_id     = CFI_MFR_AMD,
0436         .dev_id     = AM29LV800BT,
0437         .name       = "AMD AM29LV800BT",
0438         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
0439         .uaddr      = MTD_UADDR_0x0AAA_0x0555,
0440         .dev_size   = SIZE_1MiB,
0441         .cmd_set    = P_ID_AMD_STD,
0442         .nr_regions = 4,
0443         .regions    = {
0444             ERASEINFO(0x10000,15),
0445             ERASEINFO(0x08000,1),
0446             ERASEINFO(0x02000,2),
0447             ERASEINFO(0x04000,1)
0448         }
0449     }, {
0450         .mfr_id     = CFI_MFR_AMD,
0451         .dev_id     = AM29F800BT,
0452         .name       = "AMD AM29F800BT",
0453         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
0454         .uaddr      = MTD_UADDR_0x0AAA_0x0555,
0455         .dev_size   = SIZE_1MiB,
0456         .cmd_set    = P_ID_AMD_STD,
0457         .nr_regions = 4,
0458         .regions    = {
0459             ERASEINFO(0x10000,15),
0460             ERASEINFO(0x08000,1),
0461             ERASEINFO(0x02000,2),
0462             ERASEINFO(0x04000,1)
0463         }
0464     }, {
0465         .mfr_id     = CFI_MFR_AMD,
0466         .dev_id     = AM29F017D,
0467         .name       = "AMD AM29F017D",
0468         .devtypes   = CFI_DEVICETYPE_X8,
0469         .uaddr      = MTD_UADDR_DONT_CARE,
0470         .dev_size   = SIZE_2MiB,
0471         .cmd_set    = P_ID_AMD_STD,
0472         .nr_regions = 1,
0473         .regions    = {
0474             ERASEINFO(0x10000,32),
0475         }
0476     }, {
0477         .mfr_id     = CFI_MFR_AMD,
0478         .dev_id     = AM29F016D,
0479         .name       = "AMD AM29F016D",
0480         .devtypes   = CFI_DEVICETYPE_X8,
0481         .uaddr      = MTD_UADDR_0x0555_0x02AA,
0482         .dev_size   = SIZE_2MiB,
0483         .cmd_set    = P_ID_AMD_STD,
0484         .nr_regions = 1,
0485         .regions    = {
0486             ERASEINFO(0x10000,32),
0487         }
0488     }, {
0489         .mfr_id     = CFI_MFR_AMD,
0490         .dev_id     = AM29F080,
0491         .name       = "AMD AM29F080",
0492         .devtypes   = CFI_DEVICETYPE_X8,
0493         .uaddr      = MTD_UADDR_0x0555_0x02AA,
0494         .dev_size   = SIZE_1MiB,
0495         .cmd_set    = P_ID_AMD_STD,
0496         .nr_regions = 1,
0497         .regions    = {
0498             ERASEINFO(0x10000,16),
0499         }
0500     }, {
0501         .mfr_id     = CFI_MFR_AMD,
0502         .dev_id     = AM29F040,
0503         .name       = "AMD AM29F040",
0504         .devtypes   = CFI_DEVICETYPE_X8,
0505         .uaddr      = MTD_UADDR_0x0555_0x02AA,
0506         .dev_size   = SIZE_512KiB,
0507         .cmd_set    = P_ID_AMD_STD,
0508         .nr_regions = 1,
0509         .regions    = {
0510             ERASEINFO(0x10000,8),
0511         }
0512     }, {
0513         .mfr_id     = CFI_MFR_AMD,
0514         .dev_id     = AM29LV040B,
0515         .name       = "AMD AM29LV040B",
0516         .devtypes   = CFI_DEVICETYPE_X8,
0517         .uaddr      = MTD_UADDR_0x0555_0x02AA,
0518         .dev_size   = SIZE_512KiB,
0519         .cmd_set    = P_ID_AMD_STD,
0520         .nr_regions = 1,
0521         .regions    = {
0522             ERASEINFO(0x10000,8),
0523         }
0524     }, {
0525         .mfr_id     = CFI_MFR_AMD,
0526         .dev_id     = AM29F002T,
0527         .name       = "AMD AM29F002T",
0528         .devtypes   = CFI_DEVICETYPE_X8,
0529         .uaddr      = MTD_UADDR_0x0555_0x02AA,
0530         .dev_size   = SIZE_256KiB,
0531         .cmd_set    = P_ID_AMD_STD,
0532         .nr_regions = 4,
0533         .regions    = {
0534             ERASEINFO(0x10000,3),
0535             ERASEINFO(0x08000,1),
0536             ERASEINFO(0x02000,2),
0537             ERASEINFO(0x04000,1),
0538         }
0539     }, {
0540         .mfr_id     = CFI_MFR_AMD,
0541         .dev_id     = AM29SL800DT,
0542         .name       = "AMD AM29SL800DT",
0543         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
0544         .uaddr      = MTD_UADDR_0x0AAA_0x0555,
0545         .dev_size   = SIZE_1MiB,
0546         .cmd_set    = P_ID_AMD_STD,
0547         .nr_regions = 4,
0548         .regions    = {
0549             ERASEINFO(0x10000,15),
0550             ERASEINFO(0x08000,1),
0551             ERASEINFO(0x02000,2),
0552             ERASEINFO(0x04000,1),
0553         }
0554     }, {
0555         .mfr_id     = CFI_MFR_AMD,
0556         .dev_id     = AM29SL800DB,
0557         .name       = "AMD AM29SL800DB",
0558         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
0559         .uaddr      = MTD_UADDR_0x0AAA_0x0555,
0560         .dev_size   = SIZE_1MiB,
0561         .cmd_set    = P_ID_AMD_STD,
0562         .nr_regions = 4,
0563         .regions    = {
0564             ERASEINFO(0x04000,1),
0565             ERASEINFO(0x02000,2),
0566             ERASEINFO(0x08000,1),
0567             ERASEINFO(0x10000,15),
0568         }
0569     }, {
0570         .mfr_id     = CFI_MFR_ATMEL,
0571         .dev_id     = AT49BV512,
0572         .name       = "Atmel AT49BV512",
0573         .devtypes   = CFI_DEVICETYPE_X8,
0574         .uaddr      = MTD_UADDR_0x5555_0x2AAA,
0575         .dev_size   = SIZE_64KiB,
0576         .cmd_set    = P_ID_AMD_STD,
0577         .nr_regions = 1,
0578         .regions    = {
0579             ERASEINFO(0x10000,1)
0580         }
0581     }, {
0582         .mfr_id     = CFI_MFR_ATMEL,
0583         .dev_id     = AT29LV512,
0584         .name       = "Atmel AT29LV512",
0585         .devtypes   = CFI_DEVICETYPE_X8,
0586         .uaddr      = MTD_UADDR_0x5555_0x2AAA,
0587         .dev_size   = SIZE_64KiB,
0588         .cmd_set    = P_ID_AMD_STD,
0589         .nr_regions = 1,
0590         .regions    = {
0591             ERASEINFO(0x80,256),
0592             ERASEINFO(0x80,256)
0593         }
0594     }, {
0595         .mfr_id     = CFI_MFR_ATMEL,
0596         .dev_id     = AT49BV16X,
0597         .name       = "Atmel AT49BV16X",
0598         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
0599         .uaddr      = MTD_UADDR_0x0555_0x0AAA,  /* ???? */
0600         .dev_size   = SIZE_2MiB,
0601         .cmd_set    = P_ID_AMD_STD,
0602         .nr_regions = 2,
0603         .regions    = {
0604             ERASEINFO(0x02000,8),
0605             ERASEINFO(0x10000,31)
0606         }
0607     }, {
0608         .mfr_id     = CFI_MFR_ATMEL,
0609         .dev_id     = AT49BV16XT,
0610         .name       = "Atmel AT49BV16XT",
0611         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
0612         .uaddr      = MTD_UADDR_0x0555_0x0AAA,  /* ???? */
0613         .dev_size   = SIZE_2MiB,
0614         .cmd_set    = P_ID_AMD_STD,
0615         .nr_regions = 2,
0616         .regions    = {
0617             ERASEINFO(0x10000,31),
0618             ERASEINFO(0x02000,8)
0619         }
0620     }, {
0621         .mfr_id     = CFI_MFR_ATMEL,
0622         .dev_id     = AT49BV32X,
0623         .name       = "Atmel AT49BV32X",
0624         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
0625         .uaddr      = MTD_UADDR_0x0555_0x0AAA,  /* ???? */
0626         .dev_size   = SIZE_4MiB,
0627         .cmd_set    = P_ID_AMD_STD,
0628         .nr_regions = 2,
0629         .regions    = {
0630             ERASEINFO(0x02000,8),
0631             ERASEINFO(0x10000,63)
0632         }
0633     }, {
0634         .mfr_id     = CFI_MFR_ATMEL,
0635         .dev_id     = AT49BV32XT,
0636         .name       = "Atmel AT49BV32XT",
0637         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
0638         .uaddr      = MTD_UADDR_0x0555_0x0AAA,  /* ???? */
0639         .dev_size   = SIZE_4MiB,
0640         .cmd_set    = P_ID_AMD_STD,
0641         .nr_regions = 2,
0642         .regions    = {
0643             ERASEINFO(0x10000,63),
0644             ERASEINFO(0x02000,8)
0645         }
0646     }, {
0647         .mfr_id     = CFI_MFR_EON,
0648         .dev_id     = EN29LV400AT,
0649         .name       = "Eon EN29LV400AT",
0650         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
0651         .uaddr      = MTD_UADDR_0x0AAA_0x0555,
0652         .dev_size   = SIZE_512KiB,
0653         .cmd_set    = P_ID_AMD_STD,
0654         .nr_regions = 4,
0655         .regions    = {
0656             ERASEINFO(0x10000,7),
0657             ERASEINFO(0x08000,1),
0658             ERASEINFO(0x02000,2),
0659             ERASEINFO(0x04000,1),
0660         }
0661     }, {
0662         .mfr_id     = CFI_MFR_EON,
0663         .dev_id     = EN29LV400AB,
0664         .name       = "Eon EN29LV400AB",
0665         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
0666         .uaddr      = MTD_UADDR_0x0AAA_0x0555,
0667         .dev_size   = SIZE_512KiB,
0668         .cmd_set    = P_ID_AMD_STD,
0669         .nr_regions = 4,
0670         .regions    = {
0671             ERASEINFO(0x04000,1),
0672             ERASEINFO(0x02000,2),
0673             ERASEINFO(0x08000,1),
0674             ERASEINFO(0x10000,7),
0675         }
0676     }, {
0677         .mfr_id     = CFI_MFR_EON,
0678         .dev_id     = EN29SL800BT,
0679         .name       = "Eon EN29SL800BT",
0680         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
0681         .uaddr      = MTD_UADDR_0x0AAA_0x0555,
0682         .dev_size   = SIZE_1MiB,
0683         .cmd_set    = P_ID_AMD_STD,
0684         .nr_regions = 4,
0685         .regions    = {
0686             ERASEINFO(0x10000,15),
0687             ERASEINFO(0x08000,1),
0688             ERASEINFO(0x02000,2),
0689             ERASEINFO(0x04000,1),
0690         }
0691     }, {
0692         .mfr_id     = CFI_MFR_EON,
0693         .dev_id     = EN29SL800BB,
0694         .name       = "Eon EN29SL800BB",
0695         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
0696         .uaddr      = MTD_UADDR_0x0AAA_0x0555,
0697         .dev_size   = SIZE_1MiB,
0698         .cmd_set    = P_ID_AMD_STD,
0699         .nr_regions = 4,
0700         .regions    = {
0701             ERASEINFO(0x04000,1),
0702             ERASEINFO(0x02000,2),
0703             ERASEINFO(0x08000,1),
0704             ERASEINFO(0x10000,15),
0705         }
0706     }, {
0707         .mfr_id     = CFI_MFR_FUJITSU,
0708         .dev_id     = MBM29F040C,
0709         .name       = "Fujitsu MBM29F040C",
0710         .devtypes   = CFI_DEVICETYPE_X8,
0711         .uaddr      = MTD_UADDR_0x0AAA_0x0555,
0712         .dev_size   = SIZE_512KiB,
0713         .cmd_set    = P_ID_AMD_STD,
0714         .nr_regions = 1,
0715         .regions    = {
0716             ERASEINFO(0x10000,8)
0717         }
0718     }, {
0719         .mfr_id     = CFI_MFR_FUJITSU,
0720         .dev_id     = MBM29F800BA,
0721         .name       = "Fujitsu MBM29F800BA",
0722         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
0723         .uaddr      = MTD_UADDR_0x0AAA_0x0555,
0724         .dev_size   = SIZE_1MiB,
0725         .cmd_set    = P_ID_AMD_STD,
0726         .nr_regions = 4,
0727         .regions    = {
0728             ERASEINFO(0x04000,1),
0729             ERASEINFO(0x02000,2),
0730             ERASEINFO(0x08000,1),
0731             ERASEINFO(0x10000,15),
0732         }
0733     }, {
0734         .mfr_id     = CFI_MFR_FUJITSU,
0735         .dev_id     = MBM29LV650UE,
0736         .name       = "Fujitsu MBM29LV650UE",
0737         .devtypes   = CFI_DEVICETYPE_X8,
0738         .uaddr      = MTD_UADDR_DONT_CARE,
0739         .dev_size   = SIZE_8MiB,
0740         .cmd_set    = P_ID_AMD_STD,
0741         .nr_regions = 1,
0742         .regions    = {
0743             ERASEINFO(0x10000,128)
0744         }
0745     }, {
0746         .mfr_id     = CFI_MFR_FUJITSU,
0747         .dev_id     = MBM29LV320TE,
0748         .name       = "Fujitsu MBM29LV320TE",
0749         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
0750         .uaddr      = MTD_UADDR_0x0AAA_0x0555,
0751         .dev_size   = SIZE_4MiB,
0752         .cmd_set    = P_ID_AMD_STD,
0753         .nr_regions = 2,
0754         .regions    = {
0755             ERASEINFO(0x10000,63),
0756             ERASEINFO(0x02000,8)
0757         }
0758     }, {
0759         .mfr_id     = CFI_MFR_FUJITSU,
0760         .dev_id     = MBM29LV320BE,
0761         .name       = "Fujitsu MBM29LV320BE",
0762         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
0763         .uaddr      = MTD_UADDR_0x0AAA_0x0555,
0764         .dev_size   = SIZE_4MiB,
0765         .cmd_set    = P_ID_AMD_STD,
0766         .nr_regions = 2,
0767         .regions    = {
0768             ERASEINFO(0x02000,8),
0769             ERASEINFO(0x10000,63)
0770         }
0771     }, {
0772         .mfr_id     = CFI_MFR_FUJITSU,
0773         .dev_id     = MBM29LV160TE,
0774         .name       = "Fujitsu MBM29LV160TE",
0775         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
0776         .uaddr      = MTD_UADDR_0x0AAA_0x0555,
0777         .dev_size   = SIZE_2MiB,
0778         .cmd_set    = P_ID_AMD_STD,
0779         .nr_regions = 4,
0780         .regions    = {
0781             ERASEINFO(0x10000,31),
0782             ERASEINFO(0x08000,1),
0783             ERASEINFO(0x02000,2),
0784             ERASEINFO(0x04000,1)
0785         }
0786     }, {
0787         .mfr_id     = CFI_MFR_FUJITSU,
0788         .dev_id     = MBM29LV160BE,
0789         .name       = "Fujitsu MBM29LV160BE",
0790         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
0791         .uaddr      = MTD_UADDR_0x0AAA_0x0555,
0792         .dev_size   = SIZE_2MiB,
0793         .cmd_set    = P_ID_AMD_STD,
0794         .nr_regions = 4,
0795         .regions    = {
0796             ERASEINFO(0x04000,1),
0797             ERASEINFO(0x02000,2),
0798             ERASEINFO(0x08000,1),
0799             ERASEINFO(0x10000,31)
0800         }
0801     }, {
0802         .mfr_id     = CFI_MFR_FUJITSU,
0803         .dev_id     = MBM29LV800BA,
0804         .name       = "Fujitsu MBM29LV800BA",
0805         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
0806         .uaddr      = MTD_UADDR_0x0AAA_0x0555,
0807         .dev_size   = SIZE_1MiB,
0808         .cmd_set    = P_ID_AMD_STD,
0809         .nr_regions = 4,
0810         .regions    = {
0811             ERASEINFO(0x04000,1),
0812             ERASEINFO(0x02000,2),
0813             ERASEINFO(0x08000,1),
0814             ERASEINFO(0x10000,15)
0815         }
0816     }, {
0817         .mfr_id     = CFI_MFR_FUJITSU,
0818         .dev_id     = MBM29LV800TA,
0819         .name       = "Fujitsu MBM29LV800TA",
0820         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
0821         .uaddr      = MTD_UADDR_0x0AAA_0x0555,
0822         .dev_size   = SIZE_1MiB,
0823         .cmd_set    = P_ID_AMD_STD,
0824         .nr_regions = 4,
0825         .regions    = {
0826             ERASEINFO(0x10000,15),
0827             ERASEINFO(0x08000,1),
0828             ERASEINFO(0x02000,2),
0829             ERASEINFO(0x04000,1)
0830         }
0831     }, {
0832         .mfr_id     = CFI_MFR_FUJITSU,
0833         .dev_id     = MBM29LV400BC,
0834         .name       = "Fujitsu MBM29LV400BC",
0835         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
0836         .uaddr      = MTD_UADDR_0x0AAA_0x0555,
0837         .dev_size   = SIZE_512KiB,
0838         .cmd_set    = P_ID_AMD_STD,
0839         .nr_regions = 4,
0840         .regions    = {
0841             ERASEINFO(0x04000,1),
0842             ERASEINFO(0x02000,2),
0843             ERASEINFO(0x08000,1),
0844             ERASEINFO(0x10000,7)
0845         }
0846     }, {
0847         .mfr_id     = CFI_MFR_FUJITSU,
0848         .dev_id     = MBM29LV400TC,
0849         .name       = "Fujitsu MBM29LV400TC",
0850         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
0851         .uaddr      = MTD_UADDR_0x0AAA_0x0555,
0852         .dev_size   = SIZE_512KiB,
0853         .cmd_set    = P_ID_AMD_STD,
0854         .nr_regions = 4,
0855         .regions    = {
0856             ERASEINFO(0x10000,7),
0857             ERASEINFO(0x08000,1),
0858             ERASEINFO(0x02000,2),
0859             ERASEINFO(0x04000,1)
0860         }
0861     }, {
0862         .mfr_id     = CFI_MFR_HYUNDAI,
0863         .dev_id     = HY29F002T,
0864         .name       = "Hyundai HY29F002T",
0865         .devtypes   = CFI_DEVICETYPE_X8,
0866         .uaddr      = MTD_UADDR_0x0555_0x02AA,
0867         .dev_size   = SIZE_256KiB,
0868         .cmd_set    = P_ID_AMD_STD,
0869         .nr_regions = 4,
0870         .regions    = {
0871             ERASEINFO(0x10000,3),
0872             ERASEINFO(0x08000,1),
0873             ERASEINFO(0x02000,2),
0874             ERASEINFO(0x04000,1),
0875         }
0876     }, {
0877         .mfr_id     = CFI_MFR_INTEL,
0878         .dev_id     = I28F004B3B,
0879         .name       = "Intel 28F004B3B",
0880         .devtypes   = CFI_DEVICETYPE_X8,
0881         .uaddr      = MTD_UADDR_UNNECESSARY,
0882         .dev_size   = SIZE_512KiB,
0883         .cmd_set    = P_ID_INTEL_STD,
0884         .nr_regions = 2,
0885         .regions    = {
0886             ERASEINFO(0x02000, 8),
0887             ERASEINFO(0x10000, 7),
0888         }
0889     }, {
0890         .mfr_id     = CFI_MFR_INTEL,
0891         .dev_id     = I28F004B3T,
0892         .name       = "Intel 28F004B3T",
0893         .devtypes   = CFI_DEVICETYPE_X8,
0894         .uaddr      = MTD_UADDR_UNNECESSARY,
0895         .dev_size   = SIZE_512KiB,
0896         .cmd_set    = P_ID_INTEL_STD,
0897         .nr_regions = 2,
0898         .regions    = {
0899             ERASEINFO(0x10000, 7),
0900             ERASEINFO(0x02000, 8),
0901         }
0902     }, {
0903         .mfr_id     = CFI_MFR_INTEL,
0904         .dev_id     = I28F400B3B,
0905         .name       = "Intel 28F400B3B",
0906         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
0907         .uaddr      = MTD_UADDR_UNNECESSARY,
0908         .dev_size   = SIZE_512KiB,
0909         .cmd_set    = P_ID_INTEL_STD,
0910         .nr_regions = 2,
0911         .regions    = {
0912             ERASEINFO(0x02000, 8),
0913             ERASEINFO(0x10000, 7),
0914         }
0915     }, {
0916         .mfr_id     = CFI_MFR_INTEL,
0917         .dev_id     = I28F400B3T,
0918         .name       = "Intel 28F400B3T",
0919         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
0920         .uaddr      = MTD_UADDR_UNNECESSARY,
0921         .dev_size   = SIZE_512KiB,
0922         .cmd_set    = P_ID_INTEL_STD,
0923         .nr_regions = 2,
0924         .regions    = {
0925             ERASEINFO(0x10000, 7),
0926             ERASEINFO(0x02000, 8),
0927         }
0928     }, {
0929         .mfr_id     = CFI_MFR_INTEL,
0930         .dev_id     = I28F008B3B,
0931         .name       = "Intel 28F008B3B",
0932         .devtypes   = CFI_DEVICETYPE_X8,
0933         .uaddr      = MTD_UADDR_UNNECESSARY,
0934         .dev_size   = SIZE_1MiB,
0935         .cmd_set    = P_ID_INTEL_STD,
0936         .nr_regions = 2,
0937         .regions    = {
0938             ERASEINFO(0x02000, 8),
0939             ERASEINFO(0x10000, 15),
0940         }
0941     }, {
0942         .mfr_id     = CFI_MFR_INTEL,
0943         .dev_id     = I28F008B3T,
0944         .name       = "Intel 28F008B3T",
0945         .devtypes   = CFI_DEVICETYPE_X8,
0946         .uaddr      = MTD_UADDR_UNNECESSARY,
0947         .dev_size   = SIZE_1MiB,
0948         .cmd_set    = P_ID_INTEL_STD,
0949         .nr_regions = 2,
0950         .regions    = {
0951             ERASEINFO(0x10000, 15),
0952             ERASEINFO(0x02000, 8),
0953         }
0954     }, {
0955         .mfr_id     = CFI_MFR_INTEL,
0956         .dev_id     = I28F008S5,
0957         .name       = "Intel 28F008S5",
0958         .devtypes   = CFI_DEVICETYPE_X8,
0959         .uaddr      = MTD_UADDR_UNNECESSARY,
0960         .dev_size   = SIZE_1MiB,
0961         .cmd_set    = P_ID_INTEL_EXT,
0962         .nr_regions = 1,
0963         .regions    = {
0964             ERASEINFO(0x10000,16),
0965         }
0966     }, {
0967         .mfr_id     = CFI_MFR_INTEL,
0968         .dev_id     = I28F016S5,
0969         .name       = "Intel 28F016S5",
0970         .devtypes   = CFI_DEVICETYPE_X8,
0971         .uaddr      = MTD_UADDR_UNNECESSARY,
0972         .dev_size   = SIZE_2MiB,
0973         .cmd_set    = P_ID_INTEL_EXT,
0974         .nr_regions = 1,
0975         .regions    = {
0976             ERASEINFO(0x10000,32),
0977         }
0978     }, {
0979         .mfr_id     = CFI_MFR_INTEL,
0980         .dev_id     = I28F008SA,
0981         .name       = "Intel 28F008SA",
0982         .devtypes   = CFI_DEVICETYPE_X8,
0983         .uaddr      = MTD_UADDR_UNNECESSARY,
0984         .dev_size   = SIZE_1MiB,
0985         .cmd_set    = P_ID_INTEL_STD,
0986         .nr_regions = 1,
0987         .regions    = {
0988             ERASEINFO(0x10000, 16),
0989         }
0990     }, {
0991         .mfr_id     = CFI_MFR_INTEL,
0992         .dev_id     = I28F800B3B,
0993         .name       = "Intel 28F800B3B",
0994         .devtypes   = CFI_DEVICETYPE_X16,
0995         .uaddr      = MTD_UADDR_UNNECESSARY,
0996         .dev_size   = SIZE_1MiB,
0997         .cmd_set    = P_ID_INTEL_STD,
0998         .nr_regions = 2,
0999         .regions    = {
1000             ERASEINFO(0x02000, 8),
1001             ERASEINFO(0x10000, 15),
1002         }
1003     }, {
1004         .mfr_id     = CFI_MFR_INTEL,
1005         .dev_id     = I28F800B3T,
1006         .name       = "Intel 28F800B3T",
1007         .devtypes   = CFI_DEVICETYPE_X16,
1008         .uaddr      = MTD_UADDR_UNNECESSARY,
1009         .dev_size   = SIZE_1MiB,
1010         .cmd_set    = P_ID_INTEL_STD,
1011         .nr_regions = 2,
1012         .regions    = {
1013             ERASEINFO(0x10000, 15),
1014             ERASEINFO(0x02000, 8),
1015         }
1016     }, {
1017         .mfr_id     = CFI_MFR_INTEL,
1018         .dev_id     = I28F016B3B,
1019         .name       = "Intel 28F016B3B",
1020         .devtypes   = CFI_DEVICETYPE_X8,
1021         .uaddr      = MTD_UADDR_UNNECESSARY,
1022         .dev_size   = SIZE_2MiB,
1023         .cmd_set    = P_ID_INTEL_STD,
1024         .nr_regions = 2,
1025         .regions    = {
1026             ERASEINFO(0x02000, 8),
1027             ERASEINFO(0x10000, 31),
1028         }
1029     }, {
1030         .mfr_id     = CFI_MFR_INTEL,
1031         .dev_id     = I28F016S3,
1032         .name       = "Intel I28F016S3",
1033         .devtypes   = CFI_DEVICETYPE_X8,
1034         .uaddr      = MTD_UADDR_UNNECESSARY,
1035         .dev_size   = SIZE_2MiB,
1036         .cmd_set    = P_ID_INTEL_STD,
1037         .nr_regions = 1,
1038         .regions    = {
1039             ERASEINFO(0x10000, 32),
1040         }
1041     }, {
1042         .mfr_id     = CFI_MFR_INTEL,
1043         .dev_id     = I28F016B3T,
1044         .name       = "Intel 28F016B3T",
1045         .devtypes   = CFI_DEVICETYPE_X8,
1046         .uaddr      = MTD_UADDR_UNNECESSARY,
1047         .dev_size   = SIZE_2MiB,
1048         .cmd_set    = P_ID_INTEL_STD,
1049         .nr_regions = 2,
1050         .regions    = {
1051             ERASEINFO(0x10000, 31),
1052             ERASEINFO(0x02000, 8),
1053         }
1054     }, {
1055         .mfr_id     = CFI_MFR_INTEL,
1056         .dev_id     = I28F160B3B,
1057         .name       = "Intel 28F160B3B",
1058         .devtypes   = CFI_DEVICETYPE_X16,
1059         .uaddr      = MTD_UADDR_UNNECESSARY,
1060         .dev_size   = SIZE_2MiB,
1061         .cmd_set    = P_ID_INTEL_STD,
1062         .nr_regions = 2,
1063         .regions    = {
1064             ERASEINFO(0x02000, 8),
1065             ERASEINFO(0x10000, 31),
1066         }
1067     }, {
1068         .mfr_id     = CFI_MFR_INTEL,
1069         .dev_id     = I28F160B3T,
1070         .name       = "Intel 28F160B3T",
1071         .devtypes   = CFI_DEVICETYPE_X16,
1072         .uaddr      = MTD_UADDR_UNNECESSARY,
1073         .dev_size   = SIZE_2MiB,
1074         .cmd_set    = P_ID_INTEL_STD,
1075         .nr_regions = 2,
1076         .regions    = {
1077             ERASEINFO(0x10000, 31),
1078             ERASEINFO(0x02000, 8),
1079         }
1080     }, {
1081         .mfr_id     = CFI_MFR_INTEL,
1082         .dev_id     = I28F320B3B,
1083         .name       = "Intel 28F320B3B",
1084         .devtypes   = CFI_DEVICETYPE_X16,
1085         .uaddr      = MTD_UADDR_UNNECESSARY,
1086         .dev_size   = SIZE_4MiB,
1087         .cmd_set    = P_ID_INTEL_STD,
1088         .nr_regions = 2,
1089         .regions    = {
1090             ERASEINFO(0x02000, 8),
1091             ERASEINFO(0x10000, 63),
1092         }
1093     }, {
1094         .mfr_id     = CFI_MFR_INTEL,
1095         .dev_id     = I28F320B3T,
1096         .name       = "Intel 28F320B3T",
1097         .devtypes   = CFI_DEVICETYPE_X16,
1098         .uaddr      = MTD_UADDR_UNNECESSARY,
1099         .dev_size   = SIZE_4MiB,
1100         .cmd_set    = P_ID_INTEL_STD,
1101         .nr_regions = 2,
1102         .regions    = {
1103             ERASEINFO(0x10000, 63),
1104             ERASEINFO(0x02000, 8),
1105         }
1106     }, {
1107         .mfr_id     = CFI_MFR_INTEL,
1108         .dev_id     = I28F640B3B,
1109         .name       = "Intel 28F640B3B",
1110         .devtypes   = CFI_DEVICETYPE_X16,
1111         .uaddr      = MTD_UADDR_UNNECESSARY,
1112         .dev_size   = SIZE_8MiB,
1113         .cmd_set    = P_ID_INTEL_STD,
1114         .nr_regions = 2,
1115         .regions    = {
1116             ERASEINFO(0x02000, 8),
1117             ERASEINFO(0x10000, 127),
1118         }
1119     }, {
1120         .mfr_id     = CFI_MFR_INTEL,
1121         .dev_id     = I28F640B3T,
1122         .name       = "Intel 28F640B3T",
1123         .devtypes   = CFI_DEVICETYPE_X16,
1124         .uaddr      = MTD_UADDR_UNNECESSARY,
1125         .dev_size   = SIZE_8MiB,
1126         .cmd_set    = P_ID_INTEL_STD,
1127         .nr_regions = 2,
1128         .regions    = {
1129             ERASEINFO(0x10000, 127),
1130             ERASEINFO(0x02000, 8),
1131         }
1132     }, {
1133         .mfr_id     = CFI_MFR_INTEL,
1134         .dev_id     = I28F640C3B,
1135         .name       = "Intel 28F640C3B",
1136         .devtypes   = CFI_DEVICETYPE_X16,
1137         .uaddr      = MTD_UADDR_UNNECESSARY,
1138         .dev_size   = SIZE_8MiB,
1139         .cmd_set    = P_ID_INTEL_STD,
1140         .nr_regions = 2,
1141         .regions    = {
1142             ERASEINFO(0x02000, 8),
1143             ERASEINFO(0x10000, 127),
1144         }
1145     }, {
1146         .mfr_id     = CFI_MFR_INTEL,
1147         .dev_id     = I82802AB,
1148         .name       = "Intel 82802AB",
1149         .devtypes   = CFI_DEVICETYPE_X8,
1150         .uaddr      = MTD_UADDR_UNNECESSARY,
1151         .dev_size   = SIZE_512KiB,
1152         .cmd_set    = P_ID_INTEL_EXT,
1153         .nr_regions = 1,
1154         .regions    = {
1155             ERASEINFO(0x10000,8),
1156         }
1157     }, {
1158         .mfr_id     = CFI_MFR_INTEL,
1159         .dev_id     = I82802AC,
1160         .name       = "Intel 82802AC",
1161         .devtypes   = CFI_DEVICETYPE_X8,
1162         .uaddr      = MTD_UADDR_UNNECESSARY,
1163         .dev_size   = SIZE_1MiB,
1164         .cmd_set    = P_ID_INTEL_EXT,
1165         .nr_regions = 1,
1166         .regions    = {
1167             ERASEINFO(0x10000,16),
1168         }
1169     }, {
1170         .mfr_id     = CFI_MFR_MACRONIX,
1171         .dev_id     = MX29LV040C,
1172         .name       = "Macronix MX29LV040C",
1173         .devtypes   = CFI_DEVICETYPE_X8,
1174         .uaddr      = MTD_UADDR_0x0555_0x02AA,
1175         .dev_size   = SIZE_512KiB,
1176         .cmd_set    = P_ID_AMD_STD,
1177         .nr_regions = 1,
1178         .regions    = {
1179             ERASEINFO(0x10000,8),
1180         }
1181     }, {
1182         .mfr_id     = CFI_MFR_MACRONIX,
1183         .dev_id     = MX29LV160T,
1184         .name       = "MXIC MX29LV160T",
1185         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1186         .uaddr      = MTD_UADDR_0x0AAA_0x0555,
1187         .dev_size   = SIZE_2MiB,
1188         .cmd_set    = P_ID_AMD_STD,
1189         .nr_regions = 4,
1190         .regions    = {
1191             ERASEINFO(0x10000,31),
1192             ERASEINFO(0x08000,1),
1193             ERASEINFO(0x02000,2),
1194             ERASEINFO(0x04000,1)
1195         }
1196     }, {
1197         .mfr_id     = CFI_MFR_NEC,
1198         .dev_id     = UPD29F064115,
1199         .name       = "NEC uPD29F064115",
1200         .devtypes   = CFI_DEVICETYPE_X16,
1201         .uaddr      = MTD_UADDR_0xAAAA_0x5555,
1202         .dev_size   = SIZE_8MiB,
1203         .cmd_set    = P_ID_AMD_STD,
1204         .nr_regions = 3,
1205         .regions    = {
1206             ERASEINFO(0x2000,8),
1207             ERASEINFO(0x10000,126),
1208             ERASEINFO(0x2000,8),
1209         }
1210     }, {
1211         .mfr_id     = CFI_MFR_MACRONIX,
1212         .dev_id     = MX29LV160B,
1213         .name       = "MXIC MX29LV160B",
1214         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1215         .uaddr      = MTD_UADDR_0x0AAA_0x0555,
1216         .dev_size   = SIZE_2MiB,
1217         .cmd_set    = P_ID_AMD_STD,
1218         .nr_regions = 4,
1219         .regions    = {
1220             ERASEINFO(0x04000,1),
1221             ERASEINFO(0x02000,2),
1222             ERASEINFO(0x08000,1),
1223             ERASEINFO(0x10000,31)
1224         }
1225     }, {
1226         .mfr_id     = CFI_MFR_MACRONIX,
1227         .dev_id     = MX29F040,
1228         .name       = "Macronix MX29F040",
1229         .devtypes   = CFI_DEVICETYPE_X8,
1230         .uaddr      = MTD_UADDR_0x0555_0x02AA,
1231         .dev_size   = SIZE_512KiB,
1232         .cmd_set    = P_ID_AMD_STD,
1233         .nr_regions = 1,
1234         .regions    = {
1235             ERASEINFO(0x10000,8),
1236         }
1237     }, {
1238         .mfr_id     = CFI_MFR_MACRONIX,
1239         .dev_id     = MX29F016,
1240         .name       = "Macronix MX29F016",
1241         .devtypes   = CFI_DEVICETYPE_X8,
1242         .uaddr      = MTD_UADDR_0x0555_0x02AA,
1243         .dev_size   = SIZE_2MiB,
1244         .cmd_set    = P_ID_AMD_STD,
1245         .nr_regions = 1,
1246         .regions    = {
1247             ERASEINFO(0x10000,32),
1248         }
1249     }, {
1250         .mfr_id     = CFI_MFR_MACRONIX,
1251         .dev_id     = MX29F004T,
1252         .name       = "Macronix MX29F004T",
1253         .devtypes   = CFI_DEVICETYPE_X8,
1254         .uaddr      = MTD_UADDR_0x0555_0x02AA,
1255         .dev_size   = SIZE_512KiB,
1256         .cmd_set    = P_ID_AMD_STD,
1257         .nr_regions = 4,
1258         .regions    = {
1259             ERASEINFO(0x10000,7),
1260             ERASEINFO(0x08000,1),
1261             ERASEINFO(0x02000,2),
1262             ERASEINFO(0x04000,1),
1263         }
1264     }, {
1265         .mfr_id     = CFI_MFR_MACRONIX,
1266         .dev_id     = MX29F004B,
1267         .name       = "Macronix MX29F004B",
1268         .devtypes   = CFI_DEVICETYPE_X8,
1269         .uaddr      = MTD_UADDR_0x0555_0x02AA,
1270         .dev_size   = SIZE_512KiB,
1271         .cmd_set    = P_ID_AMD_STD,
1272         .nr_regions = 4,
1273         .regions    = {
1274             ERASEINFO(0x04000,1),
1275             ERASEINFO(0x02000,2),
1276             ERASEINFO(0x08000,1),
1277             ERASEINFO(0x10000,7),
1278         }
1279     }, {
1280         .mfr_id     = CFI_MFR_MACRONIX,
1281         .dev_id     = MX29F002T,
1282         .name       = "Macronix MX29F002T",
1283         .devtypes   = CFI_DEVICETYPE_X8,
1284         .uaddr      = MTD_UADDR_0x0555_0x02AA,
1285         .dev_size   = SIZE_256KiB,
1286         .cmd_set    = P_ID_AMD_STD,
1287         .nr_regions = 4,
1288         .regions    = {
1289             ERASEINFO(0x10000,3),
1290             ERASEINFO(0x08000,1),
1291             ERASEINFO(0x02000,2),
1292             ERASEINFO(0x04000,1),
1293         }
1294     }, {
1295         .mfr_id     = CFI_MFR_PMC,
1296         .dev_id     = PM49FL002,
1297         .name       = "PMC Pm49FL002",
1298         .devtypes   = CFI_DEVICETYPE_X8,
1299         .uaddr      = MTD_UADDR_0x5555_0x2AAA,
1300         .dev_size   = SIZE_256KiB,
1301         .cmd_set    = P_ID_AMD_STD,
1302         .nr_regions = 1,
1303         .regions    = {
1304             ERASEINFO( 0x01000, 64 )
1305         }
1306     }, {
1307         .mfr_id     = CFI_MFR_PMC,
1308         .dev_id     = PM49FL004,
1309         .name       = "PMC Pm49FL004",
1310         .devtypes   = CFI_DEVICETYPE_X8,
1311         .uaddr      = MTD_UADDR_0x5555_0x2AAA,
1312         .dev_size   = SIZE_512KiB,
1313         .cmd_set    = P_ID_AMD_STD,
1314         .nr_regions = 1,
1315         .regions    = {
1316             ERASEINFO( 0x01000, 128 )
1317         }
1318     }, {
1319         .mfr_id     = CFI_MFR_PMC,
1320         .dev_id     = PM49FL008,
1321         .name       = "PMC Pm49FL008",
1322         .devtypes   = CFI_DEVICETYPE_X8,
1323         .uaddr      = MTD_UADDR_0x5555_0x2AAA,
1324         .dev_size   = SIZE_1MiB,
1325         .cmd_set    = P_ID_AMD_STD,
1326         .nr_regions = 1,
1327         .regions    = {
1328             ERASEINFO( 0x01000, 256 )
1329         }
1330     }, {
1331         .mfr_id     = CFI_MFR_SHARP,
1332         .dev_id     = LH28F640BF,
1333         .name       = "LH28F640BF",
1334         .devtypes   = CFI_DEVICETYPE_X16,
1335         .uaddr      = MTD_UADDR_UNNECESSARY,
1336         .dev_size   = SIZE_8MiB,
1337         .cmd_set    = P_ID_INTEL_EXT,
1338         .nr_regions = 2,
1339         .regions    = {
1340             ERASEINFO(0x10000, 127),
1341             ERASEINFO(0x02000, 8),
1342         }
1343     }, {
1344         .mfr_id     = CFI_MFR_SST,
1345         .dev_id     = SST39LF512,
1346         .name       = "SST 39LF512",
1347         .devtypes   = CFI_DEVICETYPE_X8,
1348         .uaddr      = MTD_UADDR_0x5555_0x2AAA,
1349         .dev_size   = SIZE_64KiB,
1350         .cmd_set    = P_ID_AMD_STD,
1351         .nr_regions = 1,
1352         .regions    = {
1353             ERASEINFO(0x01000,16),
1354         }
1355     }, {
1356         .mfr_id     = CFI_MFR_SST,
1357         .dev_id     = SST39LF010,
1358         .name       = "SST 39LF010",
1359         .devtypes   = CFI_DEVICETYPE_X8,
1360         .uaddr      = MTD_UADDR_0x5555_0x2AAA,
1361         .dev_size   = SIZE_128KiB,
1362         .cmd_set    = P_ID_AMD_STD,
1363         .nr_regions = 1,
1364         .regions    = {
1365             ERASEINFO(0x01000,32),
1366         }
1367     }, {
1368         .mfr_id     = CFI_MFR_SST,
1369         .dev_id     = SST29EE020,
1370         .name       = "SST 29EE020",
1371         .devtypes   = CFI_DEVICETYPE_X8,
1372         .uaddr      = MTD_UADDR_0x5555_0x2AAA,
1373         .dev_size   = SIZE_256KiB,
1374         .cmd_set    = P_ID_SST_PAGE,
1375         .nr_regions = 1,
1376         .regions = {ERASEINFO(0x01000,64),
1377         }
1378     }, {
1379         .mfr_id     = CFI_MFR_SST,
1380         .dev_id     = SST29LE020,
1381         .name       = "SST 29LE020",
1382         .devtypes   = CFI_DEVICETYPE_X8,
1383         .uaddr      = MTD_UADDR_0x5555_0x2AAA,
1384         .dev_size   = SIZE_256KiB,
1385         .cmd_set    = P_ID_SST_PAGE,
1386         .nr_regions = 1,
1387         .regions = {ERASEINFO(0x01000,64),
1388         }
1389     }, {
1390         .mfr_id     = CFI_MFR_SST,
1391         .dev_id     = SST39LF020,
1392         .name       = "SST 39LF020",
1393         .devtypes   = CFI_DEVICETYPE_X8,
1394         .uaddr      = MTD_UADDR_0x5555_0x2AAA,
1395         .dev_size   = SIZE_256KiB,
1396         .cmd_set    = P_ID_AMD_STD,
1397         .nr_regions = 1,
1398         .regions    = {
1399             ERASEINFO(0x01000,64),
1400         }
1401     }, {
1402         .mfr_id     = CFI_MFR_SST,
1403         .dev_id     = SST39LF040,
1404         .name       = "SST 39LF040",
1405         .devtypes   = CFI_DEVICETYPE_X8,
1406         .uaddr      = MTD_UADDR_0x5555_0x2AAA,
1407         .dev_size   = SIZE_512KiB,
1408         .cmd_set    = P_ID_AMD_STD,
1409         .nr_regions = 1,
1410         .regions    = {
1411             ERASEINFO(0x01000,128),
1412         }
1413     }, {
1414         .mfr_id     = CFI_MFR_SST,
1415         .dev_id     = SST39SF010A,
1416         .name       = "SST 39SF010A",
1417         .devtypes   = CFI_DEVICETYPE_X8,
1418         .uaddr      = MTD_UADDR_0x5555_0x2AAA,
1419         .dev_size   = SIZE_128KiB,
1420         .cmd_set    = P_ID_AMD_STD,
1421         .nr_regions = 1,
1422         .regions    = {
1423             ERASEINFO(0x01000,32),
1424         }
1425     }, {
1426         .mfr_id     = CFI_MFR_SST,
1427         .dev_id     = SST39SF020A,
1428         .name       = "SST 39SF020A",
1429         .devtypes   = CFI_DEVICETYPE_X8,
1430         .uaddr      = MTD_UADDR_0x5555_0x2AAA,
1431         .dev_size   = SIZE_256KiB,
1432         .cmd_set    = P_ID_AMD_STD,
1433         .nr_regions = 1,
1434         .regions    = {
1435             ERASEINFO(0x01000,64),
1436         }
1437     }, {
1438         .mfr_id     = CFI_MFR_SST,
1439         .dev_id     = SST39SF040,
1440         .name       = "SST 39SF040",
1441         .devtypes   = CFI_DEVICETYPE_X8,
1442         .uaddr      = MTD_UADDR_0x5555_0x2AAA,
1443         .dev_size   = SIZE_512KiB,
1444         .cmd_set    = P_ID_AMD_STD,
1445         .nr_regions = 1,
1446         .regions    = {
1447             ERASEINFO(0x01000,128),
1448         }
1449     }, {
1450         .mfr_id     = CFI_MFR_SST,
1451         .dev_id     = SST49LF040B,
1452         .name       = "SST 49LF040B",
1453         .devtypes   = CFI_DEVICETYPE_X8,
1454         .uaddr      = MTD_UADDR_0x5555_0x2AAA,
1455         .dev_size   = SIZE_512KiB,
1456         .cmd_set    = P_ID_AMD_STD,
1457         .nr_regions = 1,
1458         .regions    = {
1459             ERASEINFO(0x01000,128),
1460         }
1461     }, {
1462 
1463         .mfr_id     = CFI_MFR_SST,
1464         .dev_id     = SST49LF004B,
1465         .name       = "SST 49LF004B",
1466         .devtypes   = CFI_DEVICETYPE_X8,
1467         .uaddr      = MTD_UADDR_0x5555_0x2AAA,
1468         .dev_size   = SIZE_512KiB,
1469         .cmd_set    = P_ID_AMD_STD,
1470         .nr_regions = 1,
1471         .regions    = {
1472             ERASEINFO(0x01000,128),
1473         }
1474     }, {
1475         .mfr_id     = CFI_MFR_SST,
1476         .dev_id     = SST49LF008A,
1477         .name       = "SST 49LF008A",
1478         .devtypes   = CFI_DEVICETYPE_X8,
1479         .uaddr      = MTD_UADDR_0x5555_0x2AAA,
1480         .dev_size   = SIZE_1MiB,
1481         .cmd_set    = P_ID_AMD_STD,
1482         .nr_regions = 1,
1483         .regions    = {
1484             ERASEINFO(0x01000,256),
1485         }
1486     }, {
1487         .mfr_id     = CFI_MFR_SST,
1488         .dev_id     = SST49LF030A,
1489         .name       = "SST 49LF030A",
1490         .devtypes   = CFI_DEVICETYPE_X8,
1491         .uaddr      = MTD_UADDR_0x5555_0x2AAA,
1492         .dev_size   = SIZE_512KiB,
1493         .cmd_set    = P_ID_AMD_STD,
1494         .nr_regions = 1,
1495         .regions    = {
1496             ERASEINFO(0x01000,96),
1497         }
1498     }, {
1499         .mfr_id     = CFI_MFR_SST,
1500         .dev_id     = SST49LF040A,
1501         .name       = "SST 49LF040A",
1502         .devtypes   = CFI_DEVICETYPE_X8,
1503         .uaddr      = MTD_UADDR_0x5555_0x2AAA,
1504         .dev_size   = SIZE_512KiB,
1505         .cmd_set    = P_ID_AMD_STD,
1506         .nr_regions = 1,
1507         .regions    = {
1508             ERASEINFO(0x01000,128),
1509         }
1510     }, {
1511         .mfr_id     = CFI_MFR_SST,
1512         .dev_id     = SST49LF080A,
1513         .name       = "SST 49LF080A",
1514         .devtypes   = CFI_DEVICETYPE_X8,
1515         .uaddr      = MTD_UADDR_0x5555_0x2AAA,
1516         .dev_size   = SIZE_1MiB,
1517         .cmd_set    = P_ID_AMD_STD,
1518         .nr_regions = 1,
1519         .regions    = {
1520             ERASEINFO(0x01000,256),
1521         }
1522     }, {
1523         .mfr_id     = CFI_MFR_SST,     /* should be CFI */
1524         .dev_id     = SST39LF160,
1525         .name       = "SST 39LF160",
1526         .devtypes   = CFI_DEVICETYPE_X16,
1527         .uaddr      = MTD_UADDR_0xAAAA_0x5555,
1528         .dev_size   = SIZE_2MiB,
1529         .cmd_set    = P_ID_AMD_STD,
1530         .nr_regions = 2,
1531         .regions    = {
1532             ERASEINFO(0x1000,256),
1533             ERASEINFO(0x1000,256)
1534         }
1535     }, {
1536         .mfr_id     = CFI_MFR_SST,     /* should be CFI */
1537         .dev_id     = SST39VF1601,
1538         .name       = "SST 39VF1601",
1539         .devtypes   = CFI_DEVICETYPE_X16,
1540         .uaddr      = MTD_UADDR_0xAAAA_0x5555,
1541         .dev_size   = SIZE_2MiB,
1542         .cmd_set    = P_ID_AMD_STD,
1543         .nr_regions = 2,
1544         .regions    = {
1545             ERASEINFO(0x1000,256),
1546             ERASEINFO(0x1000,256)
1547         }
1548     }, {
1549         /* CFI is broken: reports AMD_STD, but needs custom uaddr */
1550         .mfr_id     = CFI_MFR_SST,
1551         .dev_id     = SST39WF1601,
1552         .name       = "SST 39WF1601",
1553         .devtypes   = CFI_DEVICETYPE_X16,
1554         .uaddr      = MTD_UADDR_0xAAAA_0x5555,
1555         .dev_size   = SIZE_2MiB,
1556         .cmd_set    = P_ID_AMD_STD,
1557         .nr_regions = 2,
1558         .regions    = {
1559             ERASEINFO(0x1000,256),
1560             ERASEINFO(0x1000,256)
1561         }
1562     }, {
1563         /* CFI is broken: reports AMD_STD, but needs custom uaddr */
1564         .mfr_id     = CFI_MFR_SST,
1565         .dev_id     = SST39WF1602,
1566         .name       = "SST 39WF1602",
1567         .devtypes   = CFI_DEVICETYPE_X16,
1568         .uaddr      = MTD_UADDR_0xAAAA_0x5555,
1569         .dev_size   = SIZE_2MiB,
1570         .cmd_set    = P_ID_AMD_STD,
1571         .nr_regions = 2,
1572         .regions    = {
1573             ERASEINFO(0x1000,256),
1574             ERASEINFO(0x1000,256)
1575         }
1576     }, {
1577         .mfr_id     = CFI_MFR_SST,     /* should be CFI */
1578         .dev_id     = SST39VF3201,
1579         .name       = "SST 39VF3201",
1580         .devtypes   = CFI_DEVICETYPE_X16,
1581         .uaddr      = MTD_UADDR_0xAAAA_0x5555,
1582         .dev_size   = SIZE_4MiB,
1583         .cmd_set    = P_ID_AMD_STD,
1584         .nr_regions = 4,
1585         .regions    = {
1586             ERASEINFO(0x1000,256),
1587             ERASEINFO(0x1000,256),
1588             ERASEINFO(0x1000,256),
1589             ERASEINFO(0x1000,256)
1590         }
1591     }, {
1592         .mfr_id     = CFI_MFR_SST,
1593         .dev_id     = SST36VF3203,
1594         .name       = "SST 36VF3203",
1595         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1596         .uaddr      = MTD_UADDR_0x0AAA_0x0555,
1597         .dev_size   = SIZE_4MiB,
1598         .cmd_set    = P_ID_AMD_STD,
1599         .nr_regions = 1,
1600         .regions    = {
1601             ERASEINFO(0x10000,64),
1602         }
1603     }, {
1604         .mfr_id     = CFI_MFR_ST,
1605         .dev_id     = M29F800AB,
1606         .name       = "ST M29F800AB",
1607         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1608         .uaddr      = MTD_UADDR_0x0AAA_0x0555,
1609         .dev_size   = SIZE_1MiB,
1610         .cmd_set    = P_ID_AMD_STD,
1611         .nr_regions = 4,
1612         .regions    = {
1613             ERASEINFO(0x04000,1),
1614             ERASEINFO(0x02000,2),
1615             ERASEINFO(0x08000,1),
1616             ERASEINFO(0x10000,15),
1617         }
1618     }, {
1619         .mfr_id     = CFI_MFR_ST,   /* FIXME - CFI device? */
1620         .dev_id     = M29W800DT,
1621         .name       = "ST M29W800DT",
1622         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1623         .uaddr      = MTD_UADDR_0x0AAA_0x0555,
1624         .dev_size   = SIZE_1MiB,
1625         .cmd_set    = P_ID_AMD_STD,
1626         .nr_regions = 4,
1627         .regions    = {
1628             ERASEINFO(0x10000,15),
1629             ERASEINFO(0x08000,1),
1630             ERASEINFO(0x02000,2),
1631             ERASEINFO(0x04000,1)
1632         }
1633     }, {
1634         .mfr_id     = CFI_MFR_ST,   /* FIXME - CFI device? */
1635         .dev_id     = M29W800DB,
1636         .name       = "ST M29W800DB",
1637         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1638         .uaddr      = MTD_UADDR_0x0AAA_0x0555,
1639         .dev_size   = SIZE_1MiB,
1640         .cmd_set    = P_ID_AMD_STD,
1641         .nr_regions = 4,
1642         .regions    = {
1643             ERASEINFO(0x04000,1),
1644             ERASEINFO(0x02000,2),
1645             ERASEINFO(0x08000,1),
1646             ERASEINFO(0x10000,15)
1647         }
1648     },  {
1649         .mfr_id         = CFI_MFR_ST,
1650         .dev_id         = M29W400DT,
1651         .name           = "ST M29W400DT",
1652         .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1653         .uaddr          = MTD_UADDR_0x0AAA_0x0555,
1654         .dev_size       = SIZE_512KiB,
1655         .cmd_set        = P_ID_AMD_STD,
1656         .nr_regions     = 4,
1657         .regions        = {
1658             ERASEINFO(0x04000,7),
1659             ERASEINFO(0x02000,1),
1660             ERASEINFO(0x08000,2),
1661             ERASEINFO(0x10000,1)
1662         }
1663     }, {
1664         .mfr_id         = CFI_MFR_ST,
1665         .dev_id         = M29W400DB,
1666         .name           = "ST M29W400DB",
1667         .devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1668         .uaddr          = MTD_UADDR_0x0AAA_0x0555,
1669         .dev_size       = SIZE_512KiB,
1670         .cmd_set        = P_ID_AMD_STD,
1671         .nr_regions     = 4,
1672         .regions        = {
1673             ERASEINFO(0x04000,1),
1674             ERASEINFO(0x02000,2),
1675             ERASEINFO(0x08000,1),
1676             ERASEINFO(0x10000,7)
1677         }
1678     }, {
1679         .mfr_id     = CFI_MFR_ST,   /* FIXME - CFI device? */
1680         .dev_id     = M29W160DT,
1681         .name       = "ST M29W160DT",
1682         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1683         .uaddr      = MTD_UADDR_0x0555_0x02AA,  /* ???? */
1684         .dev_size   = SIZE_2MiB,
1685         .cmd_set    = P_ID_AMD_STD,
1686         .nr_regions = 4,
1687         .regions    = {
1688             ERASEINFO(0x10000,31),
1689             ERASEINFO(0x08000,1),
1690             ERASEINFO(0x02000,2),
1691             ERASEINFO(0x04000,1)
1692         }
1693     }, {
1694         .mfr_id     = CFI_MFR_ST,   /* FIXME - CFI device? */
1695         .dev_id     = M29W160DB,
1696         .name       = "ST M29W160DB",
1697         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1698         .uaddr      = MTD_UADDR_0x0555_0x02AA,  /* ???? */
1699         .dev_size   = SIZE_2MiB,
1700         .cmd_set    = P_ID_AMD_STD,
1701         .nr_regions = 4,
1702         .regions    = {
1703             ERASEINFO(0x04000,1),
1704             ERASEINFO(0x02000,2),
1705             ERASEINFO(0x08000,1),
1706             ERASEINFO(0x10000,31)
1707         }
1708     }, {
1709         .mfr_id     = CFI_MFR_ST,
1710         .dev_id     = M29W040B,
1711         .name       = "ST M29W040B",
1712         .devtypes   = CFI_DEVICETYPE_X8,
1713         .uaddr      = MTD_UADDR_0x0555_0x02AA,
1714         .dev_size   = SIZE_512KiB,
1715         .cmd_set    = P_ID_AMD_STD,
1716         .nr_regions = 1,
1717         .regions    = {
1718             ERASEINFO(0x10000,8),
1719         }
1720     }, {
1721         .mfr_id     = CFI_MFR_ST,
1722         .dev_id     = M50FW040,
1723         .name       = "ST M50FW040",
1724         .devtypes   = CFI_DEVICETYPE_X8,
1725         .uaddr      = MTD_UADDR_UNNECESSARY,
1726         .dev_size   = SIZE_512KiB,
1727         .cmd_set    = P_ID_INTEL_EXT,
1728         .nr_regions = 1,
1729         .regions    = {
1730             ERASEINFO(0x10000,8),
1731         }
1732     }, {
1733         .mfr_id     = CFI_MFR_ST,
1734         .dev_id     = M50FW080,
1735         .name       = "ST M50FW080",
1736         .devtypes   = CFI_DEVICETYPE_X8,
1737         .uaddr      = MTD_UADDR_UNNECESSARY,
1738         .dev_size   = SIZE_1MiB,
1739         .cmd_set    = P_ID_INTEL_EXT,
1740         .nr_regions = 1,
1741         .regions    = {
1742             ERASEINFO(0x10000,16),
1743         }
1744     }, {
1745         .mfr_id     = CFI_MFR_ST,
1746         .dev_id     = M50FW016,
1747         .name       = "ST M50FW016",
1748         .devtypes   = CFI_DEVICETYPE_X8,
1749         .uaddr      = MTD_UADDR_UNNECESSARY,
1750         .dev_size   = SIZE_2MiB,
1751         .cmd_set    = P_ID_INTEL_EXT,
1752         .nr_regions = 1,
1753         .regions    = {
1754             ERASEINFO(0x10000,32),
1755         }
1756     }, {
1757         .mfr_id     = CFI_MFR_ST,
1758         .dev_id     = M50LPW080,
1759         .name       = "ST M50LPW080",
1760         .devtypes   = CFI_DEVICETYPE_X8,
1761         .uaddr      = MTD_UADDR_UNNECESSARY,
1762         .dev_size   = SIZE_1MiB,
1763         .cmd_set    = P_ID_INTEL_EXT,
1764         .nr_regions = 1,
1765         .regions    = {
1766             ERASEINFO(0x10000,16),
1767         },
1768     }, {
1769         .mfr_id     = CFI_MFR_ST,
1770         .dev_id     = M50FLW080A,
1771         .name       = "ST M50FLW080A",
1772         .devtypes   = CFI_DEVICETYPE_X8,
1773         .uaddr      = MTD_UADDR_UNNECESSARY,
1774         .dev_size   = SIZE_1MiB,
1775         .cmd_set    = P_ID_INTEL_EXT,
1776         .nr_regions = 4,
1777         .regions    = {
1778             ERASEINFO(0x1000,16),
1779             ERASEINFO(0x10000,13),
1780             ERASEINFO(0x1000,16),
1781             ERASEINFO(0x1000,16),
1782         }
1783     }, {
1784         .mfr_id     = CFI_MFR_ST,
1785         .dev_id     = M50FLW080B,
1786         .name       = "ST M50FLW080B",
1787         .devtypes   = CFI_DEVICETYPE_X8,
1788         .uaddr      = MTD_UADDR_UNNECESSARY,
1789         .dev_size   = SIZE_1MiB,
1790         .cmd_set    = P_ID_INTEL_EXT,
1791         .nr_regions = 4,
1792         .regions    = {
1793             ERASEINFO(0x1000,16),
1794             ERASEINFO(0x1000,16),
1795             ERASEINFO(0x10000,13),
1796             ERASEINFO(0x1000,16),
1797         }
1798     }, {
1799         .mfr_id     = 0xff00 | CFI_MFR_ST,
1800         .dev_id     = 0xff00 | PSD4256G6V,
1801         .name       = "ST PSD4256G6V",
1802         .devtypes   = CFI_DEVICETYPE_X16,
1803         .uaddr      = MTD_UADDR_0x0AAA_0x0554,
1804         .dev_size   = SIZE_1MiB,
1805         .cmd_set    = P_ID_AMD_STD,
1806         .nr_regions = 1,
1807         .regions    = {
1808             ERASEINFO(0x10000,16),
1809         }
1810     }, {
1811         .mfr_id     = CFI_MFR_TOSHIBA,
1812         .dev_id     = TC58FVT160,
1813         .name       = "Toshiba TC58FVT160",
1814         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1815         .uaddr      = MTD_UADDR_0x0AAA_0x0555,
1816         .dev_size   = SIZE_2MiB,
1817         .cmd_set    = P_ID_AMD_STD,
1818         .nr_regions = 4,
1819         .regions    = {
1820             ERASEINFO(0x10000,31),
1821             ERASEINFO(0x08000,1),
1822             ERASEINFO(0x02000,2),
1823             ERASEINFO(0x04000,1)
1824         }
1825     }, {
1826         .mfr_id     = CFI_MFR_TOSHIBA,
1827         .dev_id     = TC58FVB160,
1828         .name       = "Toshiba TC58FVB160",
1829         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1830         .uaddr      = MTD_UADDR_0x0AAA_0x0555,
1831         .dev_size   = SIZE_2MiB,
1832         .cmd_set    = P_ID_AMD_STD,
1833         .nr_regions = 4,
1834         .regions    = {
1835             ERASEINFO(0x04000,1),
1836             ERASEINFO(0x02000,2),
1837             ERASEINFO(0x08000,1),
1838             ERASEINFO(0x10000,31)
1839         }
1840     }, {
1841         .mfr_id     = CFI_MFR_TOSHIBA,
1842         .dev_id     = TC58FVB321,
1843         .name       = "Toshiba TC58FVB321",
1844         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1845         .uaddr      = MTD_UADDR_0x0AAA_0x0555,
1846         .dev_size   = SIZE_4MiB,
1847         .cmd_set    = P_ID_AMD_STD,
1848         .nr_regions = 2,
1849         .regions    = {
1850             ERASEINFO(0x02000,8),
1851             ERASEINFO(0x10000,63)
1852         }
1853     }, {
1854         .mfr_id     = CFI_MFR_TOSHIBA,
1855         .dev_id     = TC58FVT321,
1856         .name       = "Toshiba TC58FVT321",
1857         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1858         .uaddr      = MTD_UADDR_0x0AAA_0x0555,
1859         .dev_size   = SIZE_4MiB,
1860         .cmd_set    = P_ID_AMD_STD,
1861         .nr_regions = 2,
1862         .regions    = {
1863             ERASEINFO(0x10000,63),
1864             ERASEINFO(0x02000,8)
1865         }
1866     }, {
1867         .mfr_id     = CFI_MFR_TOSHIBA,
1868         .dev_id     = TC58FVB641,
1869         .name       = "Toshiba TC58FVB641",
1870         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1871         .uaddr      = MTD_UADDR_0x0AAA_0x0555,
1872         .dev_size   = SIZE_8MiB,
1873         .cmd_set    = P_ID_AMD_STD,
1874         .nr_regions = 2,
1875         .regions    = {
1876             ERASEINFO(0x02000,8),
1877             ERASEINFO(0x10000,127)
1878         }
1879     }, {
1880         .mfr_id     = CFI_MFR_TOSHIBA,
1881         .dev_id     = TC58FVT641,
1882         .name       = "Toshiba TC58FVT641",
1883         .devtypes   = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
1884         .uaddr      = MTD_UADDR_0x0AAA_0x0555,
1885         .dev_size   = SIZE_8MiB,
1886         .cmd_set    = P_ID_AMD_STD,
1887         .nr_regions = 2,
1888         .regions    = {
1889             ERASEINFO(0x10000,127),
1890             ERASEINFO(0x02000,8)
1891         }
1892     }, {
1893         .mfr_id     = CFI_MFR_WINBOND,
1894         .dev_id     = W49V002A,
1895         .name       = "Winbond W49V002A",
1896         .devtypes   = CFI_DEVICETYPE_X8,
1897         .uaddr      = MTD_UADDR_0x5555_0x2AAA,
1898         .dev_size   = SIZE_256KiB,
1899         .cmd_set    = P_ID_AMD_STD,
1900         .nr_regions = 4,
1901         .regions    = {
1902             ERASEINFO(0x10000, 3),
1903             ERASEINFO(0x08000, 1),
1904             ERASEINFO(0x02000, 2),
1905             ERASEINFO(0x04000, 1),
1906         }
1907     }
1908 };
1909 
1910 static inline u32 jedec_read_mfr(struct map_info *map, uint32_t base,
1911     struct cfi_private *cfi)
1912 {
1913     map_word result;
1914     unsigned long mask;
1915     int bank = 0;
1916 
1917     /* According to JEDEC "Standard Manufacturer's Identification Code"
1918      * (http://www.jedec.org/download/search/jep106W.pdf)
1919      * several first banks can contain 0x7f instead of actual ID
1920      */
1921     do {
1922         uint32_t ofs = cfi_build_cmd_addr(0 + (bank << 8), map, cfi);
1923         mask = (1 << (cfi->device_type * 8)) - 1;
1924         if (ofs >= map->size)
1925             return 0;
1926         result = map_read(map, base + ofs);
1927         bank++;
1928     } while ((result.x[0] & mask) == CFI_MFR_CONTINUATION);
1929 
1930     return result.x[0] & mask;
1931 }
1932 
1933 static inline u32 jedec_read_id(struct map_info *map, uint32_t base,
1934     struct cfi_private *cfi)
1935 {
1936     map_word result;
1937     unsigned long mask;
1938     u32 ofs = cfi_build_cmd_addr(1, map, cfi);
1939     mask = (1 << (cfi->device_type * 8)) -1;
1940     result = map_read(map, base + ofs);
1941     return result.x[0] & mask;
1942 }
1943 
1944 static void jedec_reset(u32 base, struct map_info *map, struct cfi_private *cfi)
1945 {
1946     /* Reset */
1947 
1948     /* after checking the datasheets for SST, MACRONIX and ATMEL
1949      * (oh and incidentaly the jedec spec - 3.5.3.3) the reset
1950      * sequence is *supposed* to be 0xaa at 0x5555, 0x55 at
1951      * 0x2aaa, 0xF0 at 0x5555 this will not affect the AMD chips
1952      * as they will ignore the writes and don't care what address
1953      * the F0 is written to */
1954     if (cfi->addr_unlock1) {
1955         pr_debug( "reset unlock called %x %x \n",
1956                cfi->addr_unlock1,cfi->addr_unlock2);
1957         cfi_send_gen_cmd(0xaa, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL);
1958         cfi_send_gen_cmd(0x55, cfi->addr_unlock2, base, map, cfi, cfi->device_type, NULL);
1959     }
1960 
1961     cfi_send_gen_cmd(0xF0, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL);
1962     /* Some misdesigned Intel chips do not respond for 0xF0 for a reset,
1963      * so ensure we're in read mode.  Send both the Intel and the AMD command
1964      * for this.  Intel uses 0xff for this, AMD uses 0xff for NOP, so
1965      * this should be safe.
1966      */
1967     cfi_send_gen_cmd(0xFF, 0, base, map, cfi, cfi->device_type, NULL);
1968     /* FIXME - should have reset delay before continuing */
1969 }
1970 
1971 
1972 static int cfi_jedec_setup(struct map_info *map, struct cfi_private *cfi, int index)
1973 {
1974     int i,num_erase_regions;
1975     uint8_t uaddr;
1976 
1977     if (!(jedec_table[index].devtypes & cfi->device_type)) {
1978         pr_debug("Rejecting potential %s with incompatible %d-bit device type\n",
1979               jedec_table[index].name, 4 * (1<<cfi->device_type));
1980         return 0;
1981     }
1982 
1983     printk(KERN_INFO "Found: %s\n",jedec_table[index].name);
1984 
1985     num_erase_regions = jedec_table[index].nr_regions;
1986 
1987     cfi->cfiq = kmalloc(sizeof(struct cfi_ident) + num_erase_regions * 4, GFP_KERNEL);
1988     if (!cfi->cfiq) {
1989         //xx printk(KERN_WARNING "%s: kmalloc failed for CFI ident structure\n", map->name);
1990         return 0;
1991     }
1992 
1993     memset(cfi->cfiq, 0, sizeof(struct cfi_ident));
1994 
1995     cfi->cfiq->P_ID = jedec_table[index].cmd_set;
1996     cfi->cfiq->NumEraseRegions = jedec_table[index].nr_regions;
1997     cfi->cfiq->DevSize = jedec_table[index].dev_size;
1998     cfi->cfi_mode = CFI_MODE_JEDEC;
1999     cfi->sector_erase_cmd = CMD(0x30);
2000 
2001     for (i=0; i<num_erase_regions; i++){
2002         cfi->cfiq->EraseRegionInfo[i] = jedec_table[index].regions[i];
2003     }
2004     cfi->cmdset_priv = NULL;
2005 
2006     /* This may be redundant for some cases, but it doesn't hurt */
2007     cfi->mfr = jedec_table[index].mfr_id;
2008     cfi->id = jedec_table[index].dev_id;
2009 
2010     uaddr = jedec_table[index].uaddr;
2011 
2012     /* The table has unlock addresses in _bytes_, and we try not to let
2013        our brains explode when we see the datasheets talking about address
2014        lines numbered from A-1 to A18. The CFI table has unlock addresses
2015        in device-words according to the mode the device is connected in */
2016     cfi->addr_unlock1 = unlock_addrs[uaddr].addr1 / cfi->device_type;
2017     cfi->addr_unlock2 = unlock_addrs[uaddr].addr2 / cfi->device_type;
2018 
2019     return 1;   /* ok */
2020 }
2021 
2022 
2023 /*
2024  * There is a BIG problem properly ID'ing the JEDEC device and guaranteeing
2025  * the mapped address, unlock addresses, and proper chip ID.  This function
2026  * attempts to minimize errors.  It is doubtfull that this probe will ever
2027  * be perfect - consequently there should be some module parameters that
2028  * could be manually specified to force the chip info.
2029  */
2030 static inline int jedec_match( uint32_t base,
2031                    struct map_info *map,
2032                    struct cfi_private *cfi,
2033                    const struct amd_flash_info *finfo )
2034 {
2035     int rc = 0;           /* failure until all tests pass */
2036     u32 mfr, id;
2037     uint8_t uaddr;
2038 
2039     /*
2040      * The IDs must match.  For X16 and X32 devices operating in
2041      * a lower width ( X8 or X16 ), the device ID's are usually just
2042      * the lower byte(s) of the larger device ID for wider mode.  If
2043      * a part is found that doesn't fit this assumption (device id for
2044      * smaller width mode is completely unrealated to full-width mode)
2045      * then the jedec_table[] will have to be augmented with the IDs
2046      * for different widths.
2047      */
2048     switch (cfi->device_type) {
2049     case CFI_DEVICETYPE_X8:
2050         mfr = (uint8_t)finfo->mfr_id;
2051         id = (uint8_t)finfo->dev_id;
2052 
2053         /* bjd: it seems that if we do this, we can end up
2054          * detecting 16bit flashes as an 8bit device, even though
2055          * there aren't.
2056          */
2057         if (finfo->dev_id > 0xff) {
2058             pr_debug("%s(): ID is not 8bit\n",
2059                    __func__);
2060             goto match_done;
2061         }
2062         break;
2063     case CFI_DEVICETYPE_X16:
2064         mfr = (uint16_t)finfo->mfr_id;
2065         id = (uint16_t)finfo->dev_id;
2066         break;
2067     case CFI_DEVICETYPE_X32:
2068         mfr = (uint16_t)finfo->mfr_id;
2069         id = (uint32_t)finfo->dev_id;
2070         break;
2071     default:
2072         printk(KERN_WARNING
2073                "MTD %s(): Unsupported device type %d\n",
2074                __func__, cfi->device_type);
2075         goto match_done;
2076     }
2077     if ( cfi->mfr != mfr || cfi->id != id ) {
2078         goto match_done;
2079     }
2080 
2081     /* the part size must fit in the memory window */
2082     pr_debug("MTD %s(): Check fit 0x%.8x + 0x%.8x = 0x%.8x\n",
2083            __func__, base, 1 << finfo->dev_size, base + (1 << finfo->dev_size) );
2084     if ( base + cfi_interleave(cfi) * ( 1 << finfo->dev_size ) > map->size ) {
2085         pr_debug("MTD %s(): 0x%.4x 0x%.4x %dKiB doesn't fit\n",
2086                __func__, finfo->mfr_id, finfo->dev_id,
2087                1 << finfo->dev_size );
2088         goto match_done;
2089     }
2090 
2091     if (! (finfo->devtypes & cfi->device_type))
2092         goto match_done;
2093 
2094     uaddr = finfo->uaddr;
2095 
2096     pr_debug("MTD %s(): check unlock addrs 0x%.4x 0x%.4x\n",
2097            __func__, cfi->addr_unlock1, cfi->addr_unlock2 );
2098     if ( MTD_UADDR_UNNECESSARY != uaddr && MTD_UADDR_DONT_CARE != uaddr
2099          && ( unlock_addrs[uaddr].addr1 / cfi->device_type != cfi->addr_unlock1 ||
2100           unlock_addrs[uaddr].addr2 / cfi->device_type != cfi->addr_unlock2 ) ) {
2101         pr_debug("MTD %s(): 0x%.4x 0x%.4x did not match\n",
2102             __func__,
2103             unlock_addrs[uaddr].addr1,
2104             unlock_addrs[uaddr].addr2);
2105         goto match_done;
2106     }
2107 
2108     /*
2109      * Make sure the ID's disappear when the device is taken out of
2110      * ID mode.  The only time this should fail when it should succeed
2111      * is when the ID's are written as data to the same
2112      * addresses.  For this rare and unfortunate case the chip
2113      * cannot be probed correctly.
2114      * FIXME - write a driver that takes all of the chip info as
2115      * module parameters, doesn't probe but forces a load.
2116      */
2117     pr_debug("MTD %s(): check ID's disappear when not in ID mode\n",
2118            __func__ );
2119     jedec_reset( base, map, cfi );
2120     mfr = jedec_read_mfr( map, base, cfi );
2121     id = jedec_read_id( map, base, cfi );
2122     if ( mfr == cfi->mfr && id == cfi->id ) {
2123         pr_debug("MTD %s(): ID 0x%.2x:0x%.2x did not change after reset:\n"
2124                "You might need to manually specify JEDEC parameters.\n",
2125             __func__, cfi->mfr, cfi->id );
2126         goto match_done;
2127     }
2128 
2129     /* all tests passed - mark  as success */
2130     rc = 1;
2131 
2132     /*
2133      * Put the device back in ID mode - only need to do this if we
2134      * were truly frobbing a real device.
2135      */
2136     pr_debug("MTD %s(): return to ID mode\n", __func__ );
2137     if (cfi->addr_unlock1) {
2138         cfi_send_gen_cmd(0xaa, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL);
2139         cfi_send_gen_cmd(0x55, cfi->addr_unlock2, base, map, cfi, cfi->device_type, NULL);
2140     }
2141     cfi_send_gen_cmd(0x90, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL);
2142     /* FIXME - should have a delay before continuing */
2143 
2144  match_done:
2145     return rc;
2146 }
2147 
2148 
2149 static int jedec_probe_chip(struct map_info *map, __u32 base,
2150                 unsigned long *chip_map, struct cfi_private *cfi)
2151 {
2152     int i;
2153     enum uaddr uaddr_idx = MTD_UADDR_NOT_SUPPORTED;
2154     u32 probe_offset1, probe_offset2;
2155 
2156  retry:
2157     if (!cfi->numchips) {
2158         uaddr_idx++;
2159 
2160         if (MTD_UADDR_UNNECESSARY == uaddr_idx)
2161             return 0;
2162 
2163         cfi->addr_unlock1 = unlock_addrs[uaddr_idx].addr1 / cfi->device_type;
2164         cfi->addr_unlock2 = unlock_addrs[uaddr_idx].addr2 / cfi->device_type;
2165     }
2166 
2167     /* Make certain we aren't probing past the end of map */
2168     if (base >= map->size) {
2169         printk(KERN_NOTICE
2170             "Probe at base(0x%08x) past the end of the map(0x%08lx)\n",
2171             base, map->size -1);
2172         return 0;
2173 
2174     }
2175     /* Ensure the unlock addresses we try stay inside the map */
2176     probe_offset1 = cfi_build_cmd_addr(cfi->addr_unlock1, map, cfi);
2177     probe_offset2 = cfi_build_cmd_addr(cfi->addr_unlock2, map, cfi);
2178     if (    ((base + probe_offset1 + map_bankwidth(map)) >= map->size) ||
2179         ((base + probe_offset2 + map_bankwidth(map)) >= map->size))
2180         goto retry;
2181 
2182     /* Reset */
2183     jedec_reset(base, map, cfi);
2184 
2185     /* Autoselect Mode */
2186     if(cfi->addr_unlock1) {
2187         cfi_send_gen_cmd(0xaa, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL);
2188         cfi_send_gen_cmd(0x55, cfi->addr_unlock2, base, map, cfi, cfi->device_type, NULL);
2189     }
2190     cfi_send_gen_cmd(0x90, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL);
2191     /* FIXME - should have a delay before continuing */
2192 
2193     if (!cfi->numchips) {
2194         /* This is the first time we're called. Set up the CFI
2195            stuff accordingly and return */
2196 
2197         cfi->mfr = jedec_read_mfr(map, base, cfi);
2198         cfi->id = jedec_read_id(map, base, cfi);
2199         pr_debug("Search for id:(%02x %02x) interleave(%d) type(%d)\n",
2200             cfi->mfr, cfi->id, cfi_interleave(cfi), cfi->device_type);
2201         for (i = 0; i < ARRAY_SIZE(jedec_table); i++) {
2202             if ( jedec_match( base, map, cfi, &jedec_table[i] ) ) {
2203                 pr_debug("MTD %s(): matched device 0x%x,0x%x unlock_addrs: 0x%.4x 0x%.4x\n",
2204                        __func__, cfi->mfr, cfi->id,
2205                        cfi->addr_unlock1, cfi->addr_unlock2 );
2206                 if (!cfi_jedec_setup(map, cfi, i))
2207                     return 0;
2208                 goto ok_out;
2209             }
2210         }
2211         goto retry;
2212     } else {
2213         uint16_t mfr;
2214         uint16_t id;
2215 
2216         /* Make sure it is a chip of the same manufacturer and id */
2217         mfr = jedec_read_mfr(map, base, cfi);
2218         id = jedec_read_id(map, base, cfi);
2219 
2220         if ((mfr != cfi->mfr) || (id != cfi->id)) {
2221             printk(KERN_DEBUG "%s: Found different chip or no chip at all (mfr 0x%x, id 0x%x) at 0x%x\n",
2222                    map->name, mfr, id, base);
2223             jedec_reset(base, map, cfi);
2224             return 0;
2225         }
2226     }
2227 
2228     /* Check each previous chip locations to see if it's an alias */
2229     for (i=0; i < (base >> cfi->chipshift); i++) {
2230         unsigned long start;
2231         if(!test_bit(i, chip_map)) {
2232             continue; /* Skip location; no valid chip at this address */
2233         }
2234         start = i << cfi->chipshift;
2235         if (jedec_read_mfr(map, start, cfi) == cfi->mfr &&
2236             jedec_read_id(map, start, cfi) == cfi->id) {
2237             /* Eep. This chip also looks like it's in autoselect mode.
2238                Is it an alias for the new one? */
2239             jedec_reset(start, map, cfi);
2240 
2241             /* If the device IDs go away, it's an alias */
2242             if (jedec_read_mfr(map, base, cfi) != cfi->mfr ||
2243                 jedec_read_id(map, base, cfi) != cfi->id) {
2244                 printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n",
2245                        map->name, base, start);
2246                 return 0;
2247             }
2248 
2249             /* Yes, it's actually got the device IDs as data. Most
2250              * unfortunate. Stick the new chip in read mode
2251              * too and if it's the same, assume it's an alias. */
2252             /* FIXME: Use other modes to do a proper check */
2253             jedec_reset(base, map, cfi);
2254             if (jedec_read_mfr(map, base, cfi) == cfi->mfr &&
2255                 jedec_read_id(map, base, cfi) == cfi->id) {
2256                 printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n",
2257                        map->name, base, start);
2258                 return 0;
2259             }
2260         }
2261     }
2262 
2263     /* OK, if we got to here, then none of the previous chips appear to
2264        be aliases for the current one. */
2265     set_bit((base >> cfi->chipshift), chip_map); /* Update chip map */
2266     cfi->numchips++;
2267 
2268 ok_out:
2269     /* Put it back into Read Mode */
2270     jedec_reset(base, map, cfi);
2271 
2272     printk(KERN_INFO "%s: Found %d x%d devices at 0x%x in %d-bit bank\n",
2273            map->name, cfi_interleave(cfi), cfi->device_type*8, base,
2274            map->bankwidth*8);
2275 
2276     return 1;
2277 }
2278 
2279 static struct chip_probe jedec_chip_probe = {
2280     .name = "JEDEC",
2281     .probe_chip = jedec_probe_chip
2282 };
2283 
2284 static struct mtd_info *jedec_probe(struct map_info *map)
2285 {
2286     /*
2287      * Just use the generic probe stuff to call our CFI-specific
2288      * chip_probe routine in all the possible permutations, etc.
2289      */
2290     return mtd_do_chip_probe(map, &jedec_chip_probe);
2291 }
2292 
2293 static struct mtd_chip_driver jedec_chipdrv = {
2294     .probe  = jedec_probe,
2295     .name   = "jedec_probe",
2296     .module = THIS_MODULE
2297 };
2298 
2299 static int __init jedec_probe_init(void)
2300 {
2301     register_mtd_chip_driver(&jedec_chipdrv);
2302     return 0;
2303 }
2304 
2305 static void __exit jedec_probe_exit(void)
2306 {
2307     unregister_mtd_chip_driver(&jedec_chipdrv);
2308 }
2309 
2310 module_init(jedec_probe_init);
2311 module_exit(jedec_probe_exit);
2312 
2313 MODULE_LICENSE("GPL");
2314 MODULE_AUTHOR("Erwin Authried <eauth@softsys.co.at> et al.");
2315 MODULE_DESCRIPTION("Probe code for JEDEC-compliant flash chips");
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