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0001 /*
0002    Common Flash Interface probe code.
0003    (C) 2000 Red Hat. GPL'd.
0004 */
0005 
0006 #include <linux/module.h>
0007 #include <linux/types.h>
0008 #include <linux/kernel.h>
0009 #include <linux/init.h>
0010 #include <asm/io.h>
0011 #include <asm/byteorder.h>
0012 #include <linux/errno.h>
0013 #include <linux/slab.h>
0014 #include <linux/interrupt.h>
0015 
0016 #include <linux/mtd/xip.h>
0017 #include <linux/mtd/map.h>
0018 #include <linux/mtd/cfi.h>
0019 #include <linux/mtd/gen_probe.h>
0020 
0021 //#define DEBUG_CFI
0022 
0023 #ifdef DEBUG_CFI
0024 static void print_cfi_ident(struct cfi_ident *);
0025 #endif
0026 
0027 static int cfi_probe_chip(struct map_info *map, __u32 base,
0028               unsigned long *chip_map, struct cfi_private *cfi);
0029 static int cfi_chip_setup(struct map_info *map, struct cfi_private *cfi);
0030 
0031 struct mtd_info *cfi_probe(struct map_info *map);
0032 
0033 #ifdef CONFIG_MTD_XIP
0034 
0035 /* only needed for short periods, so this is rather simple */
0036 #define xip_disable()   local_irq_disable()
0037 
0038 #define xip_allowed(base, map) \
0039 do { \
0040     (void) map_read(map, base); \
0041     xip_iprefetch(); \
0042     local_irq_enable(); \
0043 } while (0)
0044 
0045 #define xip_enable(base, map, cfi) \
0046 do { \
0047     cfi_qry_mode_off(base, map, cfi);       \
0048     xip_allowed(base, map); \
0049 } while (0)
0050 
0051 #define xip_disable_qry(base, map, cfi) \
0052 do { \
0053     xip_disable(); \
0054     cfi_qry_mode_on(base, map, cfi); \
0055 } while (0)
0056 
0057 #else
0058 
0059 #define xip_disable()           do { } while (0)
0060 #define xip_allowed(base, map)      do { } while (0)
0061 #define xip_enable(base, map, cfi)  do { } while (0)
0062 #define xip_disable_qry(base, map, cfi) do { } while (0)
0063 
0064 #endif
0065 
0066 /*
0067  * This fixup occurs immediately after reading the CFI structure and can affect
0068  * the number of chips detected, unlike cfi_fixup, which occurs after an
0069  * mtd_info structure has been created for the chip.
0070  */
0071 struct cfi_early_fixup {
0072     uint16_t mfr;
0073     uint16_t id;
0074     void (*fixup)(struct cfi_private *cfi);
0075 };
0076 
0077 static void cfi_early_fixup(struct cfi_private *cfi,
0078                 const struct cfi_early_fixup *fixups)
0079 {
0080     const struct cfi_early_fixup *f;
0081 
0082     for (f = fixups; f->fixup; f++) {
0083         if (((f->mfr == CFI_MFR_ANY) || (f->mfr == cfi->mfr)) &&
0084             ((f->id == CFI_ID_ANY) || (f->id == cfi->id))) {
0085             f->fixup(cfi);
0086         }
0087     }
0088 }
0089 
0090 /* check for QRY.
0091    in: interleave,type,mode
0092    ret: table index, <0 for error
0093  */
0094 
0095 static int __xipram cfi_probe_chip(struct map_info *map, __u32 base,
0096                    unsigned long *chip_map, struct cfi_private *cfi)
0097 {
0098     int i;
0099 
0100     if ((base + 0) >= map->size) {
0101         printk(KERN_NOTICE
0102             "Probe at base[0x00](0x%08lx) past the end of the map(0x%08lx)\n",
0103             (unsigned long)base, map->size -1);
0104         return 0;
0105     }
0106     if ((base + 0xff) >= map->size) {
0107         printk(KERN_NOTICE
0108             "Probe at base[0x55](0x%08lx) past the end of the map(0x%08lx)\n",
0109             (unsigned long)base + 0x55, map->size -1);
0110         return 0;
0111     }
0112 
0113     xip_disable();
0114     if (!cfi_qry_mode_on(base, map, cfi)) {
0115         xip_enable(base, map, cfi);
0116         return 0;
0117     }
0118 
0119     if (!cfi->numchips) {
0120         /* This is the first time we're called. Set up the CFI
0121            stuff accordingly and return */
0122         return cfi_chip_setup(map, cfi);
0123     }
0124 
0125     /* Check each previous chip to see if it's an alias */
0126     for (i=0; i < (base >> cfi->chipshift); i++) {
0127         unsigned long start;
0128         if(!test_bit(i, chip_map)) {
0129             /* Skip location; no valid chip at this address */
0130             continue;
0131         }
0132         start = i << cfi->chipshift;
0133         /* This chip should be in read mode if it's one
0134            we've already touched. */
0135         if (cfi_qry_present(map, start, cfi)) {
0136             /* Eep. This chip also had the QRY marker.
0137              * Is it an alias for the new one? */
0138             cfi_qry_mode_off(start, map, cfi);
0139 
0140             /* If the QRY marker goes away, it's an alias */
0141             if (!cfi_qry_present(map, start, cfi)) {
0142                 xip_allowed(base, map);
0143                 printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n",
0144                        map->name, base, start);
0145                 return 0;
0146             }
0147             /* Yes, it's actually got QRY for data. Most
0148              * unfortunate. Stick the new chip in read mode
0149              * too and if it's the same, assume it's an alias. */
0150             /* FIXME: Use other modes to do a proper check */
0151             cfi_qry_mode_off(base, map, cfi);
0152 
0153             if (cfi_qry_present(map, base, cfi)) {
0154                 xip_allowed(base, map);
0155                 printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n",
0156                        map->name, base, start);
0157                 return 0;
0158             }
0159         }
0160     }
0161 
0162     /* OK, if we got to here, then none of the previous chips appear to
0163        be aliases for the current one. */
0164     set_bit((base >> cfi->chipshift), chip_map); /* Update chip map */
0165     cfi->numchips++;
0166 
0167     /* Put it back into Read Mode */
0168     cfi_qry_mode_off(base, map, cfi);
0169     xip_allowed(base, map);
0170 
0171     printk(KERN_INFO "%s: Found %d x%d devices at 0x%x in %d-bit bank\n",
0172            map->name, cfi->interleave, cfi->device_type*8, base,
0173            map->bankwidth*8);
0174 
0175     return 1;
0176 }
0177 
0178 static void fixup_s70gl02gs_chips(struct cfi_private *cfi)
0179 {
0180     /*
0181      * S70GL02GS flash reports a single 256 MiB chip, but is really made up
0182      * of two 128 MiB chips with 1024 sectors each.
0183      */
0184     cfi->cfiq->DevSize = 27;
0185     cfi->cfiq->EraseRegionInfo[0] = 0x20003ff;
0186     pr_warn("Bad S70GL02GS CFI data; adjust to detect 2 chips\n");
0187 }
0188 
0189 static const struct cfi_early_fixup cfi_early_fixup_table[] = {
0190     { CFI_MFR_AMD, 0x4801, fixup_s70gl02gs_chips },
0191     { },
0192 };
0193 
0194 static int __xipram cfi_chip_setup(struct map_info *map,
0195                    struct cfi_private *cfi)
0196 {
0197     int ofs_factor = cfi->interleave*cfi->device_type;
0198     __u32 base = 0;
0199     int num_erase_regions = cfi_read_query(map, base + (0x10 + 28)*ofs_factor);
0200     int i;
0201     int addr_unlock1 = 0x555, addr_unlock2 = 0x2AA;
0202 
0203     xip_enable(base, map, cfi);
0204 #ifdef DEBUG_CFI
0205     printk("Number of erase regions: %d\n", num_erase_regions);
0206 #endif
0207     if (!num_erase_regions)
0208         return 0;
0209 
0210     cfi->cfiq = kmalloc(sizeof(struct cfi_ident) + num_erase_regions * 4, GFP_KERNEL);
0211     if (!cfi->cfiq)
0212         return 0;
0213 
0214     memset(cfi->cfiq,0,sizeof(struct cfi_ident));
0215 
0216     cfi->cfi_mode = CFI_MODE_CFI;
0217 
0218     cfi->sector_erase_cmd = CMD(0x30);
0219 
0220     /* Read the CFI info structure */
0221     xip_disable_qry(base, map, cfi);
0222     for (i=0; i<(sizeof(struct cfi_ident) + num_erase_regions * 4); i++)
0223         ((unsigned char *)cfi->cfiq)[i] = cfi_read_query(map,base + (0x10 + i)*ofs_factor);
0224 
0225     /* Do any necessary byteswapping */
0226     cfi->cfiq->P_ID = le16_to_cpu(cfi->cfiq->P_ID);
0227 
0228     cfi->cfiq->P_ADR = le16_to_cpu(cfi->cfiq->P_ADR);
0229     cfi->cfiq->A_ID = le16_to_cpu(cfi->cfiq->A_ID);
0230     cfi->cfiq->A_ADR = le16_to_cpu(cfi->cfiq->A_ADR);
0231     cfi->cfiq->InterfaceDesc = le16_to_cpu(cfi->cfiq->InterfaceDesc);
0232     cfi->cfiq->MaxBufWriteSize = le16_to_cpu(cfi->cfiq->MaxBufWriteSize);
0233 
0234 #ifdef DEBUG_CFI
0235     /* Dump the information therein */
0236     print_cfi_ident(cfi->cfiq);
0237 #endif
0238 
0239     for (i=0; i<cfi->cfiq->NumEraseRegions; i++) {
0240         cfi->cfiq->EraseRegionInfo[i] = le32_to_cpu(cfi->cfiq->EraseRegionInfo[i]);
0241 
0242 #ifdef DEBUG_CFI
0243         printk("  Erase Region #%d: BlockSize 0x%4.4X bytes, %d blocks\n",
0244                i, (cfi->cfiq->EraseRegionInfo[i] >> 8) & ~0xff,
0245                (cfi->cfiq->EraseRegionInfo[i] & 0xffff) + 1);
0246 #endif
0247     }
0248 
0249     if (cfi->cfiq->P_ID == P_ID_SST_OLD) {
0250         addr_unlock1 = 0x5555;
0251         addr_unlock2 = 0x2AAA;
0252     }
0253 
0254     /*
0255      * Note we put the device back into Read Mode BEFORE going into Auto
0256      * Select Mode, as some devices support nesting of modes, others
0257      * don't. This way should always work.
0258      * On cmdset 0001 the writes of 0xaa and 0x55 are not needed, and
0259      * so should be treated as nops or illegal (and so put the device
0260      * back into Read Mode, which is a nop in this case).
0261      */
0262     cfi_send_gen_cmd(0xf0,     0, base, map, cfi, cfi->device_type, NULL);
0263     cfi_send_gen_cmd(0xaa, addr_unlock1, base, map, cfi, cfi->device_type, NULL);
0264     cfi_send_gen_cmd(0x55, addr_unlock2, base, map, cfi, cfi->device_type, NULL);
0265     cfi_send_gen_cmd(0x90, addr_unlock1, base, map, cfi, cfi->device_type, NULL);
0266     cfi->mfr = cfi_read_query16(map, base);
0267     cfi->id = cfi_read_query16(map, base + ofs_factor);
0268 
0269     /* Get AMD/Spansion extended JEDEC ID */
0270     if (cfi->mfr == CFI_MFR_AMD && (cfi->id & 0xff) == 0x7e)
0271         cfi->id = cfi_read_query(map, base + 0xe * ofs_factor) << 8 |
0272               cfi_read_query(map, base + 0xf * ofs_factor);
0273 
0274     /* Put it back into Read Mode */
0275     cfi_qry_mode_off(base, map, cfi);
0276     xip_allowed(base, map);
0277 
0278     cfi_early_fixup(cfi, cfi_early_fixup_table);
0279 
0280     printk(KERN_INFO "%s: Found %d x%d devices at 0x%x in %d-bit bank. Manufacturer ID %#08x Chip ID %#08x\n",
0281            map->name, cfi->interleave, cfi->device_type*8, base,
0282            map->bankwidth*8, cfi->mfr, cfi->id);
0283 
0284     return 1;
0285 }
0286 
0287 #ifdef DEBUG_CFI
0288 static char *vendorname(__u16 vendor)
0289 {
0290     switch (vendor) {
0291     case P_ID_NONE:
0292         return "None";
0293 
0294     case P_ID_INTEL_EXT:
0295         return "Intel/Sharp Extended";
0296 
0297     case P_ID_AMD_STD:
0298         return "AMD/Fujitsu Standard";
0299 
0300     case P_ID_INTEL_STD:
0301         return "Intel/Sharp Standard";
0302 
0303     case P_ID_AMD_EXT:
0304         return "AMD/Fujitsu Extended";
0305 
0306     case P_ID_WINBOND:
0307         return "Winbond Standard";
0308 
0309     case P_ID_ST_ADV:
0310         return "ST Advanced";
0311 
0312     case P_ID_MITSUBISHI_STD:
0313         return "Mitsubishi Standard";
0314 
0315     case P_ID_MITSUBISHI_EXT:
0316         return "Mitsubishi Extended";
0317 
0318     case P_ID_SST_PAGE:
0319         return "SST Page Write";
0320 
0321     case P_ID_SST_OLD:
0322         return "SST 39VF160x/39VF320x";
0323 
0324     case P_ID_INTEL_PERFORMANCE:
0325         return "Intel Performance Code";
0326 
0327     case P_ID_INTEL_DATA:
0328         return "Intel Data";
0329 
0330     case P_ID_RESERVED:
0331         return "Not Allowed / Reserved for Future Use";
0332 
0333     default:
0334         return "Unknown";
0335     }
0336 }
0337 
0338 
0339 static void print_cfi_ident(struct cfi_ident *cfip)
0340 {
0341 #if 0
0342     if (cfip->qry[0] != 'Q' || cfip->qry[1] != 'R' || cfip->qry[2] != 'Y') {
0343         printk("Invalid CFI ident structure.\n");
0344         return;
0345     }
0346 #endif
0347     printk("Primary Vendor Command Set: %4.4X (%s)\n", cfip->P_ID, vendorname(cfip->P_ID));
0348     if (cfip->P_ADR)
0349         printk("Primary Algorithm Table at %4.4X\n", cfip->P_ADR);
0350     else
0351         printk("No Primary Algorithm Table\n");
0352 
0353     printk("Alternative Vendor Command Set: %4.4X (%s)\n", cfip->A_ID, vendorname(cfip->A_ID));
0354     if (cfip->A_ADR)
0355         printk("Alternate Algorithm Table at %4.4X\n", cfip->A_ADR);
0356     else
0357         printk("No Alternate Algorithm Table\n");
0358 
0359 
0360     printk("Vcc Minimum: %2d.%d V\n", cfip->VccMin >> 4, cfip->VccMin & 0xf);
0361     printk("Vcc Maximum: %2d.%d V\n", cfip->VccMax >> 4, cfip->VccMax & 0xf);
0362     if (cfip->VppMin) {
0363         printk("Vpp Minimum: %2d.%d V\n", cfip->VppMin >> 4, cfip->VppMin & 0xf);
0364         printk("Vpp Maximum: %2d.%d V\n", cfip->VppMax >> 4, cfip->VppMax & 0xf);
0365     }
0366     else
0367         printk("No Vpp line\n");
0368 
0369     printk("Typical byte/word write timeout: %d µs\n", 1<<cfip->WordWriteTimeoutTyp);
0370     printk("Maximum byte/word write timeout: %d µs\n", (1<<cfip->WordWriteTimeoutMax) * (1<<cfip->WordWriteTimeoutTyp));
0371 
0372     if (cfip->BufWriteTimeoutTyp || cfip->BufWriteTimeoutMax) {
0373         printk("Typical full buffer write timeout: %d µs\n", 1<<cfip->BufWriteTimeoutTyp);
0374         printk("Maximum full buffer write timeout: %d µs\n", (1<<cfip->BufWriteTimeoutMax) * (1<<cfip->BufWriteTimeoutTyp));
0375     }
0376     else
0377         printk("Full buffer write not supported\n");
0378 
0379     printk("Typical block erase timeout: %d ms\n", 1<<cfip->BlockEraseTimeoutTyp);
0380     printk("Maximum block erase timeout: %d ms\n", (1<<cfip->BlockEraseTimeoutMax) * (1<<cfip->BlockEraseTimeoutTyp));
0381     if (cfip->ChipEraseTimeoutTyp || cfip->ChipEraseTimeoutMax) {
0382         printk("Typical chip erase timeout: %d ms\n", 1<<cfip->ChipEraseTimeoutTyp);
0383         printk("Maximum chip erase timeout: %d ms\n", (1<<cfip->ChipEraseTimeoutMax) * (1<<cfip->ChipEraseTimeoutTyp));
0384     }
0385     else
0386         printk("Chip erase not supported\n");
0387 
0388     printk("Device size: 0x%X bytes (%d MiB)\n", 1 << cfip->DevSize, 1<< (cfip->DevSize - 20));
0389     printk("Flash Device Interface description: 0x%4.4X\n", cfip->InterfaceDesc);
0390     switch(cfip->InterfaceDesc) {
0391     case CFI_INTERFACE_X8_ASYNC:
0392         printk("  - x8-only asynchronous interface\n");
0393         break;
0394 
0395     case CFI_INTERFACE_X16_ASYNC:
0396         printk("  - x16-only asynchronous interface\n");
0397         break;
0398 
0399     case CFI_INTERFACE_X8_BY_X16_ASYNC:
0400         printk("  - supports x8 and x16 via BYTE# with asynchronous interface\n");
0401         break;
0402 
0403     case CFI_INTERFACE_X32_ASYNC:
0404         printk("  - x32-only asynchronous interface\n");
0405         break;
0406 
0407     case CFI_INTERFACE_X16_BY_X32_ASYNC:
0408         printk("  - supports x16 and x32 via Word# with asynchronous interface\n");
0409         break;
0410 
0411     case CFI_INTERFACE_NOT_ALLOWED:
0412         printk("  - Not Allowed / Reserved\n");
0413         break;
0414 
0415     default:
0416         printk("  - Unknown\n");
0417         break;
0418     }
0419 
0420     printk("Max. bytes in buffer write: 0x%x\n", 1<< cfip->MaxBufWriteSize);
0421     printk("Number of Erase Block Regions: %d\n", cfip->NumEraseRegions);
0422 
0423 }
0424 #endif /* DEBUG_CFI */
0425 
0426 static struct chip_probe cfi_chip_probe = {
0427     .name       = "CFI",
0428     .probe_chip = cfi_probe_chip
0429 };
0430 
0431 struct mtd_info *cfi_probe(struct map_info *map)
0432 {
0433     /*
0434      * Just use the generic probe stuff to call our CFI-specific
0435      * chip_probe routine in all the possible permutations, etc.
0436      */
0437     return mtd_do_chip_probe(map, &cfi_chip_probe);
0438 }
0439 
0440 static struct mtd_chip_driver cfi_chipdrv = {
0441     .probe      = cfi_probe,
0442     .name       = "cfi_probe",
0443     .module     = THIS_MODULE
0444 };
0445 
0446 static int __init cfi_probe_init(void)
0447 {
0448     register_mtd_chip_driver(&cfi_chipdrv);
0449     return 0;
0450 }
0451 
0452 static void __exit cfi_probe_exit(void)
0453 {
0454     unregister_mtd_chip_driver(&cfi_chipdrv);
0455 }
0456 
0457 module_init(cfi_probe_init);
0458 module_exit(cfi_probe_exit);
0459 
0460 MODULE_LICENSE("GPL");
0461 MODULE_AUTHOR("David Woodhouse <dwmw2@infradead.org> et al.");
0462 MODULE_DESCRIPTION("Probe code for CFI-compliant flash chips");
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