0001 # SPDX-License-Identifier: GPL-2.0-only
0002 menu "RAM/ROM/Flash chip drivers"
0003 depends on MTD!=n
0004
0005 config MTD_CFI
0006 tristate "Detect flash chips by Common Flash Interface (CFI) probe"
0007 select MTD_GEN_PROBE
0008 select MTD_CFI_UTIL
0009 help
0010 The Common Flash Interface specification was developed by Intel,
0011 AMD and other flash manufactures that provides a universal method
0012 for probing the capabilities of flash devices. If you wish to
0013 support any device that is CFI-compliant, you need to enable this
0014 option. Visit <https://www.amd.com/products/nvd/overview/cfi.html>
0015 for more information on CFI.
0016
0017 config MTD_JEDECPROBE
0018 tristate "Detect non-CFI AMD/JEDEC-compatible flash chips"
0019 select MTD_GEN_PROBE
0020 select MTD_CFI_UTIL
0021 help
0022 This option enables JEDEC-style probing of flash chips which are not
0023 compatible with the Common Flash Interface, but will use the common
0024 CFI-targeted flash drivers for any chips which are identified which
0025 are in fact compatible in all but the probe method. This actually
0026 covers most AMD/Fujitsu-compatible chips and also non-CFI
0027 Intel chips.
0028
0029 config MTD_GEN_PROBE
0030 tristate
0031
0032 config MTD_CFI_ADV_OPTIONS
0033 bool "Flash chip driver advanced configuration options"
0034 depends on MTD_GEN_PROBE
0035 help
0036 If you need to specify a specific endianness for access to flash
0037 chips, or if you wish to reduce the size of the kernel by including
0038 support for only specific arrangements of flash chips, say 'Y'. This
0039 option does not directly affect the code, but will enable other
0040 configuration options which allow you to do so.
0041
0042 If unsure, say 'N'.
0043
0044 choice
0045 prompt "Flash cmd/query data swapping"
0046 depends on MTD_CFI_ADV_OPTIONS
0047 default MTD_CFI_NOSWAP
0048 help
0049 This option defines the way in which the CPU attempts to arrange
0050 data bits when writing the 'magic' commands to the chips. Saying
0051 'NO', which is the default when CONFIG_MTD_CFI_ADV_OPTIONS isn't
0052 enabled, means that the CPU will not do any swapping; the chips
0053 are expected to be wired to the CPU in 'host-endian' form.
0054 Specific arrangements are possible with the BIG_ENDIAN_BYTE and
0055 LITTLE_ENDIAN_BYTE, if the bytes are reversed.
0056
0057 config MTD_CFI_NOSWAP
0058 depends on !ARCH_IXP4XX || CPU_BIG_ENDIAN
0059 bool "NO"
0060
0061 config MTD_CFI_BE_BYTE_SWAP
0062 bool "BIG_ENDIAN_BYTE"
0063
0064 config MTD_CFI_LE_BYTE_SWAP
0065 depends on !ARCH_IXP4XX
0066 bool "LITTLE_ENDIAN_BYTE"
0067
0068 endchoice
0069
0070 config MTD_CFI_GEOMETRY
0071 bool "Specific CFI Flash geometry selection"
0072 depends on MTD_CFI_ADV_OPTIONS
0073 select MTD_MAP_BANK_WIDTH_1 if !(MTD_MAP_BANK_WIDTH_2 || \
0074 MTD_MAP_BANK_WIDTH_4 || MTD_MAP_BANK_WIDTH_8 || \
0075 MTD_MAP_BANK_WIDTH_16 || MTD_MAP_BANK_WIDTH_32)
0076 select MTD_CFI_I1 if !(MTD_CFI_I2 || MTD_CFI_I4 || MTD_CFI_I8)
0077 help
0078 This option does not affect the code directly, but will enable
0079 some other configuration options which would allow you to reduce
0080 the size of the kernel by including support for only certain
0081 arrangements of CFI chips. If unsure, say 'N' and all options
0082 which are supported by the current code will be enabled.
0083
0084 config MTD_MAP_BANK_WIDTH_1
0085 bool "Support 8-bit buswidth" if MTD_CFI_GEOMETRY
0086 default y
0087 help
0088 If you wish to support CFI devices on a physical bus which is
0089 8 bits wide, say 'Y'.
0090
0091 config MTD_MAP_BANK_WIDTH_2
0092 bool "Support 16-bit buswidth" if MTD_CFI_GEOMETRY
0093 default y
0094 help
0095 If you wish to support CFI devices on a physical bus which is
0096 16 bits wide, say 'Y'.
0097
0098 config MTD_MAP_BANK_WIDTH_4
0099 bool "Support 32-bit buswidth" if MTD_CFI_GEOMETRY
0100 default y
0101 help
0102 If you wish to support CFI devices on a physical bus which is
0103 32 bits wide, say 'Y'.
0104
0105 config MTD_MAP_BANK_WIDTH_8
0106 bool "Support 64-bit buswidth" if MTD_CFI_GEOMETRY
0107 default n
0108 help
0109 If you wish to support CFI devices on a physical bus which is
0110 64 bits wide, say 'Y'.
0111
0112 config MTD_MAP_BANK_WIDTH_16
0113 bool "Support 128-bit buswidth" if MTD_CFI_GEOMETRY
0114 default n
0115 help
0116 If you wish to support CFI devices on a physical bus which is
0117 128 bits wide, say 'Y'.
0118
0119 config MTD_MAP_BANK_WIDTH_32
0120 bool "Support 256-bit buswidth" if MTD_CFI_GEOMETRY
0121 select MTD_COMPLEX_MAPPINGS if HAS_IOMEM
0122 default n
0123 help
0124 If you wish to support CFI devices on a physical bus which is
0125 256 bits wide, say 'Y'.
0126
0127 config MTD_CFI_I1
0128 bool "Support 1-chip flash interleave" if MTD_CFI_GEOMETRY
0129 default y
0130 help
0131 If your flash chips are not interleaved - i.e. you only have one
0132 flash chip addressed by each bus cycle, then say 'Y'.
0133
0134 config MTD_CFI_I2
0135 bool "Support 2-chip flash interleave" if MTD_CFI_GEOMETRY
0136 default y
0137 help
0138 If your flash chips are interleaved in pairs - i.e. you have two
0139 flash chips addressed by each bus cycle, then say 'Y'.
0140
0141 config MTD_CFI_I4
0142 bool "Support 4-chip flash interleave" if MTD_CFI_GEOMETRY
0143 default n
0144 help
0145 If your flash chips are interleaved in fours - i.e. you have four
0146 flash chips addressed by each bus cycle, then say 'Y'.
0147
0148 config MTD_CFI_I8
0149 bool "Support 8-chip flash interleave" if MTD_CFI_GEOMETRY
0150 default n
0151 help
0152 If your flash chips are interleaved in eights - i.e. you have eight
0153 flash chips addressed by each bus cycle, then say 'Y'.
0154
0155 config MTD_OTP
0156 bool "Protection Registers aka one-time programmable (OTP) bits"
0157 depends on MTD_CFI_ADV_OPTIONS
0158 default n
0159 help
0160 This enables support for reading, writing and locking so called
0161 "Protection Registers" present on some flash chips.
0162 A subset of them are pre-programmed at the factory with a
0163 unique set of values. The rest is user-programmable.
0164
0165 The user-programmable Protection Registers contain one-time
0166 programmable (OTP) bits; when programmed, register bits cannot be
0167 erased. Each Protection Register can be accessed multiple times to
0168 program individual bits, as long as the register remains unlocked.
0169
0170 Each Protection Register has an associated Lock Register bit. When a
0171 Lock Register bit is programmed, the associated Protection Register
0172 can only be read; it can no longer be programmed. Additionally,
0173 because the Lock Register bits themselves are OTP, when programmed,
0174 Lock Register bits cannot be erased. Therefore, when a Protection
0175 Register is locked, it cannot be unlocked.
0176
0177 This feature should therefore be used with extreme care. Any mistake
0178 in the programming of OTP bits will waste them.
0179
0180 config MTD_CFI_INTELEXT
0181 tristate "Support for CFI command set 0001 (Intel/Sharp chips)"
0182 depends on MTD_GEN_PROBE
0183 select MTD_CFI_UTIL
0184 help
0185 The Common Flash Interface defines a number of different command
0186 sets which a CFI-compliant chip may claim to implement. This code
0187 provides support for command set 0001, used on Intel StrataFlash
0188 and other parts.
0189
0190 config MTD_CFI_AMDSTD
0191 tristate "Support for CFI command set 0002 (AMD/Fujitsu/Spansion chips)"
0192 depends on MTD_GEN_PROBE
0193 select MTD_CFI_UTIL
0194 help
0195 The Common Flash Interface defines a number of different command
0196 sets which a CFI-compliant chip may claim to implement. This code
0197 provides support for command set 0002, used on chips including
0198 the AMD Am29LV320.
0199
0200 config MTD_CFI_STAA
0201 tristate "Support for CFI command set 0020 (ST (Advanced Architecture) chips)"
0202 depends on MTD_GEN_PROBE
0203 select MTD_CFI_UTIL
0204 help
0205 The Common Flash Interface defines a number of different command
0206 sets which a CFI-compliant chip may claim to implement. This code
0207 provides support for command set 0020.
0208
0209 config MTD_CFI_UTIL
0210 tristate
0211
0212 config MTD_RAM
0213 tristate "Support for RAM chips in bus mapping"
0214 help
0215 This option enables basic support for RAM chips accessed through
0216 a bus mapping driver.
0217
0218 config MTD_ROM
0219 tristate "Support for ROM chips in bus mapping"
0220 help
0221 This option enables basic support for ROM chips accessed through
0222 a bus mapping driver.
0223
0224 config MTD_ABSENT
0225 tristate "Support for absent chips in bus mapping"
0226 help
0227 This option enables support for a dummy probing driver used to
0228 allocated placeholder MTD devices on systems that have socketed
0229 or removable media. Use of this driver as a fallback chip probe
0230 preserves the expected registration order of MTD device nodes on
0231 the system regardless of media presence. Device nodes created
0232 with this driver will return -ENODEV upon access.
0233
0234 config MTD_XIP
0235 bool "XIP aware MTD support"
0236 depends on !SMP && (MTD_CFI_INTELEXT || MTD_CFI_AMDSTD) && ARCH_MTD_XIP
0237 default y if XIP_KERNEL
0238 help
0239 This allows MTD support to work with flash memory which is also
0240 used for XIP purposes. If you're not sure what this is all about
0241 then say N.
0242
0243 endmenu
