mmc/host/tmio_mmc.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Driver for the MMC / SD / SDIO cell found in:
0004  *
0005  * TC6393XB TC6391XB TC6387XB T7L66XB ASIC3
0006  *
0007  * Copyright (C) 2015-19 Renesas Electronics Corporation
0008  * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang
0009  * Copyright (C) 2016-17 Horms Solutions, Simon Horman
0010  * Copyright (C) 2007 Ian Molton
0011  * Copyright (C) 2004 Ian Molton
0012  */
0013
0014 #ifndef TMIO_MMC_H
0015 #define TMIO_MMC_H
0016
0017 #include <linux/dmaengine.h>
0018 #include <linux/highmem.h>
0019 #include <linux/mutex.h>
0020 #include <linux/pagemap.h>
0021 #include <linux/scatterlist.h>
0022 #include <linux/spinlock.h>
0023 #include <linux/interrupt.h>
0024
0025 #define CTL_SD_CMD 0x00
0026 #define CTL_ARG_REG 0x04
0027 #define CTL_STOP_INTERNAL_ACTION 0x08
0028 #define CTL_XFER_BLK_COUNT 0xa
0029 #define CTL_RESPONSE 0x0c
0030 /* driver merges STATUS and following STATUS2 */
0031 #define CTL_STATUS 0x1c
0032 /* driver merges IRQ_MASK and following IRQ_MASK2 */
0033 #define CTL_IRQ_MASK 0x20
0034 #define CTL_SD_CARD_CLK_CTL 0x24
0035 #define CTL_SD_XFER_LEN 0x26
0036 #define CTL_SD_MEM_CARD_OPT 0x28
0037 #define CTL_SD_ERROR_DETAIL_STATUS 0x2c
0038 #define CTL_SD_DATA_PORT 0x30
0039 #define CTL_TRANSACTION_CTL 0x34
0040 #define CTL_SDIO_STATUS 0x36
0041 #define CTL_SDIO_IRQ_MASK 0x38
0042 #define CTL_DMA_ENABLE 0xd8
0043 #define CTL_RESET_SD 0xe0
0044 #define CTL_VERSION 0xe2
0045 #define CTL_SDIF_MODE 0xe6 /* only known on R-Car 2+ */
0046
0047 /* Definitions for values the CTL_STOP_INTERNAL_ACTION register can take */
0048 #define TMIO_STOP_STP       BIT(0)
0049 #define TMIO_STOP_SEC       BIT(8)
0050
0051 /* Definitions for values the CTL_STATUS register can take */
0052 #define TMIO_STAT_CMDRESPEND    BIT(0)
0053 #define TMIO_STAT_DATAEND       BIT(2)
0054 #define TMIO_STAT_CARD_REMOVE   BIT(3)
0055 #define TMIO_STAT_CARD_INSERT   BIT(4)
0056 #define TMIO_STAT_SIGSTATE      BIT(5)
0057 #define TMIO_STAT_WRPROTECT     BIT(7)
0058 #define TMIO_STAT_CARD_REMOVE_A BIT(8)
0059 #define TMIO_STAT_CARD_INSERT_A BIT(9)
0060 #define TMIO_STAT_SIGSTATE_A    BIT(10)
0061
0062 /* These belong technically to CTL_STATUS2, but the driver merges them */
0063 #define TMIO_STAT_CMD_IDX_ERR   BIT(16)
0064 #define TMIO_STAT_CRCFAIL       BIT(17)
0065 #define TMIO_STAT_STOPBIT_ERR   BIT(18)
0066 #define TMIO_STAT_DATATIMEOUT   BIT(19)
0067 #define TMIO_STAT_RXOVERFLOW    BIT(20)
0068 #define TMIO_STAT_TXUNDERRUN    BIT(21)
0069 #define TMIO_STAT_CMDTIMEOUT    BIT(22)
0070 #define TMIO_STAT_DAT0      BIT(23) /* only known on R-Car so far */
0071 #define TMIO_STAT_RXRDY         BIT(24)
0072 #define TMIO_STAT_TXRQ          BIT(25)
0073 #define TMIO_STAT_ALWAYS_SET_27 BIT(27) /* only known on R-Car 2+ so far */
0074 #define TMIO_STAT_ILL_FUNC      BIT(29) /* only when !TMIO_MMC_HAS_IDLE_WAIT */
0075 #define TMIO_STAT_SCLKDIVEN     BIT(29) /* only when TMIO_MMC_HAS_IDLE_WAIT */
0076 #define TMIO_STAT_CMD_BUSY      BIT(30)
0077 #define TMIO_STAT_ILL_ACCESS    BIT(31)
0078
0079 /* Definitions for values the CTL_SD_CARD_CLK_CTL register can take */
0080 #define CLK_CTL_DIV_MASK    0xff
0081 #define CLK_CTL_SCLKEN      BIT(8)
0082
0083 /* Definitions for values the CTL_SD_MEM_CARD_OPT register can take */
0084 #define CARD_OPT_TOP_MASK   0xf0
0085 #define CARD_OPT_TOP_SHIFT  4
0086 #define CARD_OPT_EXTOP      BIT(9) /* first appeared on R-Car Gen3 SDHI */
0087 #define CARD_OPT_WIDTH8     BIT(13)
0088 #define CARD_OPT_ALWAYS1    BIT(14)
0089 #define CARD_OPT_WIDTH      BIT(15)
0090
0091 /* Definitions for values the CTL_SDIO_STATUS register can take */
0092 #define TMIO_SDIO_STAT_IOIRQ    0x0001
0093 #define TMIO_SDIO_STAT_EXPUB52  0x4000
0094 #define TMIO_SDIO_STAT_EXWT 0x8000
0095 #define TMIO_SDIO_MASK_ALL  0xc007
0096
0097 #define TMIO_SDIO_SETBITS_MASK  0x0006
0098
0099 /* Definitions for values the CTL_DMA_ENABLE register can take */
0100 #define DMA_ENABLE_DMASDRW  BIT(1)
0101
0102 /* Definitions for values the CTL_SDIF_MODE register can take */
0103 #define SDIF_MODE_HS400     BIT(0) /* only known on R-Car 2+ */
0104
0105 /* Define some IRQ masks */
0106 /* This is the mask used at reset by the chip */
0107 #define TMIO_MASK_ALL           0x837f031d
0108 #define TMIO_MASK_ALL_RCAR2 0x8b7f031d
0109 #define TMIO_MASK_READOP  (TMIO_STAT_RXRDY | TMIO_STAT_DATAEND)
0110 #define TMIO_MASK_WRITEOP (TMIO_STAT_TXRQ | TMIO_STAT_DATAEND)
0111 #define TMIO_MASK_CMD     (TMIO_STAT_CMDRESPEND | TMIO_STAT_CMDTIMEOUT | \
0112         TMIO_STAT_CARD_REMOVE | TMIO_STAT_CARD_INSERT)
0113 #define TMIO_MASK_IRQ     (TMIO_MASK_READOP | TMIO_MASK_WRITEOP | TMIO_MASK_CMD)
0114
0115 #define TMIO_MAX_BLK_SIZE 512
0116
0117 struct tmio_mmc_data;
0118 struct tmio_mmc_host;
0119
0120 struct tmio_mmc_dma_ops {
0121     void (*start)(struct tmio_mmc_host *host, struct mmc_data *data);
0122     void (*enable)(struct tmio_mmc_host *host, bool enable);
0123     void (*request)(struct tmio_mmc_host *host,
0124             struct tmio_mmc_data *pdata);
0125     void (*release)(struct tmio_mmc_host *host);
0126     void (*abort)(struct tmio_mmc_host *host);
0127     void (*dataend)(struct tmio_mmc_host *host);
0128
0129     /* optional */
0130     void (*end)(struct tmio_mmc_host *host);    /* held host->lock */
0131 };
0132
0133 struct tmio_mmc_host {
0134     void __iomem *ctl;
0135     struct mmc_command      *cmd;
0136     struct mmc_request      *mrq;
0137     struct mmc_data         *data;
0138     struct mmc_host         *mmc;
0139     struct mmc_host_ops     ops;
0140
0141     /* Callbacks for clock / power control */
0142     void (*set_pwr)(struct platform_device *host, int state);
0143
0144     /* pio related stuff */
0145     struct scatterlist      *sg_ptr;
0146     struct scatterlist      *sg_orig;
0147     unsigned int            sg_len;
0148     unsigned int            sg_off;
0149     unsigned int        bus_shift;
0150
0151     struct platform_device *pdev;
0152     struct tmio_mmc_data *pdata;
0153
0154     /* DMA support */
0155     bool            dma_on;
0156     struct dma_chan     *chan_rx;
0157     struct dma_chan     *chan_tx;
0158     struct tasklet_struct   dma_issue;
0159     struct scatterlist  bounce_sg;
0160     u8          *bounce_buf;
0161
0162     /* Track lost interrupts */
0163     struct delayed_work delayed_reset_work;
0164     struct work_struct  done;
0165
0166     /* Cache */
0167     u32         sdcard_irq_mask;
0168     u32         sdio_irq_mask;
0169     unsigned int        clk_cache;
0170     u32         sdcard_irq_setbit_mask;
0171     u32         sdcard_irq_mask_all;
0172
0173     spinlock_t      lock;       /* protect host private data */
0174     unsigned long       last_req_ts;
0175     struct mutex        ios_lock;   /* protect set_ios() context */
0176     bool            native_hotplug;
0177     bool            sdio_irq_enabled;
0178
0179     /* Mandatory callback */
0180     int (*clk_enable)(struct tmio_mmc_host *host);
0181     void (*set_clock)(struct tmio_mmc_host *host, unsigned int clock);
0182
0183     /* Optional callbacks */
0184     void (*clk_disable)(struct tmio_mmc_host *host);
0185     int (*multi_io_quirk)(struct mmc_card *card,
0186                   unsigned int direction, int blk_size);
0187     int (*write16_hook)(struct tmio_mmc_host *host, int addr);
0188     void (*reset)(struct tmio_mmc_host *host, bool preserve);
0189     bool (*check_retune)(struct tmio_mmc_host *host, struct mmc_request *mrq);
0190     void (*fixup_request)(struct tmio_mmc_host *host, struct mmc_request *mrq);
0191     unsigned int (*get_timeout_cycles)(struct tmio_mmc_host *host);
0192
0193     const struct tmio_mmc_dma_ops *dma_ops;
0194 };
0195
0196 struct tmio_mmc_host *tmio_mmc_host_alloc(struct platform_device *pdev,
0197                       struct tmio_mmc_data *pdata);
0198 void tmio_mmc_host_free(struct tmio_mmc_host *host);
0199 int tmio_mmc_host_probe(struct tmio_mmc_host *host);
0200 void tmio_mmc_host_remove(struct tmio_mmc_host *host);
0201 void tmio_mmc_do_data_irq(struct tmio_mmc_host *host);
0202
0203 void tmio_mmc_enable_mmc_irqs(struct tmio_mmc_host *host, u32 i);
0204 void tmio_mmc_disable_mmc_irqs(struct tmio_mmc_host *host, u32 i);
0205 irqreturn_t tmio_mmc_irq(int irq, void *devid);
0206
0207 static inline char *tmio_mmc_kmap_atomic(struct scatterlist *sg,
0208                      unsigned long *flags)
0209 {
0210     local_irq_save(*flags);
0211     return kmap_atomic(sg_page(sg)) + sg->offset;
0212 }
0213
0214 static inline void tmio_mmc_kunmap_atomic(struct scatterlist *sg,
0215                       unsigned long *flags, void *virt)
0216 {
0217     kunmap_atomic(virt - sg->offset);
0218     local_irq_restore(*flags);
0219 }
0220
0221 #ifdef CONFIG_PM
0222 int tmio_mmc_host_runtime_suspend(struct device *dev);
0223 int tmio_mmc_host_runtime_resume(struct device *dev);
0224 #endif
0225
0226 static inline u16 sd_ctrl_read16(struct tmio_mmc_host *host, int addr)
0227 {
0228     return ioread16(host->ctl + (addr << host->bus_shift));
0229 }
0230
0231 static inline void sd_ctrl_read16_rep(struct tmio_mmc_host *host, int addr,
0232                       u16 *buf, int count)
0233 {
0234     ioread16_rep(host->ctl + (addr << host->bus_shift), buf, count);
0235 }
0236
0237 static inline u32 sd_ctrl_read16_and_16_as_32(struct tmio_mmc_host *host,
0238                           int addr)
0239 {
0240     return ioread16(host->ctl + (addr << host->bus_shift)) |
0241            ioread16(host->ctl + ((addr + 2) << host->bus_shift)) << 16;
0242 }
0243
0244 static inline void sd_ctrl_read32_rep(struct tmio_mmc_host *host, int addr,
0245                       u32 *buf, int count)
0246 {
0247     ioread32_rep(host->ctl + (addr << host->bus_shift), buf, count);
0248 }
0249
0250 static inline void sd_ctrl_write16(struct tmio_mmc_host *host, int addr,
0251                    u16 val)
0252 {
0253     /* If there is a hook and it returns non-zero then there
0254      * is an error and the write should be skipped
0255      */
0256     if (host->write16_hook && host->write16_hook(host, addr))
0257         return;
0258     iowrite16(val, host->ctl + (addr << host->bus_shift));
0259 }
0260
0261 static inline void sd_ctrl_write16_rep(struct tmio_mmc_host *host, int addr,
0262                        u16 *buf, int count)
0263 {
0264     iowrite16_rep(host->ctl + (addr << host->bus_shift), buf, count);
0265 }
0266
0267 static inline void sd_ctrl_write32_as_16_and_16(struct tmio_mmc_host *host,
0268                         int addr, u32 val)
0269 {
0270     if (addr == CTL_IRQ_MASK || addr == CTL_STATUS)
0271         val |= host->sdcard_irq_setbit_mask;
0272
0273     iowrite16(val & 0xffff, host->ctl + (addr << host->bus_shift));
0274     iowrite16(val >> 16, host->ctl + ((addr + 2) << host->bus_shift));
0275 }
0276
0277 static inline void sd_ctrl_write32(struct tmio_mmc_host *host, int addr, u32 val)
0278 {
0279     iowrite32(val, host->ctl + (addr << host->bus_shift));
0280 }
0281
0282 static inline void sd_ctrl_write32_rep(struct tmio_mmc_host *host, int addr,
0283                        const u32 *buf, int count)
0284 {
0285     iowrite32_rep(host->ctl + (addr << host->bus_shift), buf, count);
0286 }
0287
0288 #endif