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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  *  tifm_sd.c - TI FlashMedia driver
0004  *
0005  *  Copyright (C) 2006 Alex Dubov <oakad@yahoo.com>
0006  *
0007  * Special thanks to Brad Campbell for extensive testing of this driver.
0008  */
0009 
0010 
0011 #include <linux/tifm.h>
0012 #include <linux/mmc/host.h>
0013 #include <linux/highmem.h>
0014 #include <linux/scatterlist.h>
0015 #include <linux/module.h>
0016 #include <asm/io.h>
0017 
0018 #define DRIVER_NAME "tifm_sd"
0019 #define DRIVER_VERSION "0.8"
0020 
0021 static bool no_dma = 0;
0022 static bool fixed_timeout = 0;
0023 module_param(no_dma, bool, 0644);
0024 module_param(fixed_timeout, bool, 0644);
0025 
0026 /* Constants here are mostly from OMAP5912 datasheet */
0027 #define TIFM_MMCSD_RESET      0x0002
0028 #define TIFM_MMCSD_CLKMASK    0x03ff
0029 #define TIFM_MMCSD_POWER      0x0800
0030 #define TIFM_MMCSD_4BBUS      0x8000
0031 #define TIFM_MMCSD_RXDE       0x8000   /* rx dma enable */
0032 #define TIFM_MMCSD_TXDE       0x0080   /* tx dma enable */
0033 #define TIFM_MMCSD_BUFINT     0x0c00   /* set bits: AE, AF */
0034 #define TIFM_MMCSD_DPE        0x0020   /* data timeout counted in kilocycles */
0035 #define TIFM_MMCSD_INAB       0x0080   /* abort / initialize command */
0036 #define TIFM_MMCSD_READ       0x8000
0037 
0038 #define TIFM_MMCSD_ERRMASK    0x01e0   /* set bits: CCRC, CTO, DCRC, DTO */
0039 #define TIFM_MMCSD_EOC        0x0001   /* end of command phase  */
0040 #define TIFM_MMCSD_CD         0x0002   /* card detect           */
0041 #define TIFM_MMCSD_CB         0x0004   /* card enter busy state */
0042 #define TIFM_MMCSD_BRS        0x0008   /* block received/sent   */
0043 #define TIFM_MMCSD_EOFB       0x0010   /* card exit busy state  */
0044 #define TIFM_MMCSD_DTO        0x0020   /* data time-out         */
0045 #define TIFM_MMCSD_DCRC       0x0040   /* data crc error        */
0046 #define TIFM_MMCSD_CTO        0x0080   /* command time-out      */
0047 #define TIFM_MMCSD_CCRC       0x0100   /* command crc error     */
0048 #define TIFM_MMCSD_AF         0x0400   /* fifo almost full      */
0049 #define TIFM_MMCSD_AE         0x0800   /* fifo almost empty     */
0050 #define TIFM_MMCSD_OCRB       0x1000   /* OCR busy              */
0051 #define TIFM_MMCSD_CIRQ       0x2000   /* card irq (cmd40/sdio) */
0052 #define TIFM_MMCSD_CERR       0x4000   /* card status error     */
0053 
0054 #define TIFM_MMCSD_ODTO       0x0040   /* open drain / extended timeout */
0055 #define TIFM_MMCSD_CARD_RO    0x0200   /* card is read-only     */
0056 
0057 #define TIFM_MMCSD_FIFO_SIZE  0x0020
0058 
0059 #define TIFM_MMCSD_RSP_R0     0x0000
0060 #define TIFM_MMCSD_RSP_R1     0x0100
0061 #define TIFM_MMCSD_RSP_R2     0x0200
0062 #define TIFM_MMCSD_RSP_R3     0x0300
0063 #define TIFM_MMCSD_RSP_R4     0x0400
0064 #define TIFM_MMCSD_RSP_R5     0x0500
0065 #define TIFM_MMCSD_RSP_R6     0x0600
0066 
0067 #define TIFM_MMCSD_RSP_BUSY   0x0800
0068 
0069 #define TIFM_MMCSD_CMD_BC     0x0000
0070 #define TIFM_MMCSD_CMD_BCR    0x1000
0071 #define TIFM_MMCSD_CMD_AC     0x2000
0072 #define TIFM_MMCSD_CMD_ADTC   0x3000
0073 
0074 #define TIFM_MMCSD_MAX_BLOCK_SIZE  0x0800UL
0075 
0076 #define TIFM_MMCSD_REQ_TIMEOUT_MS  1000
0077 
0078 enum {
0079     CMD_READY    = 0x0001,
0080     FIFO_READY   = 0x0002,
0081     BRS_READY    = 0x0004,
0082     SCMD_ACTIVE  = 0x0008,
0083     SCMD_READY   = 0x0010,
0084     CARD_BUSY    = 0x0020,
0085     DATA_CARRY   = 0x0040
0086 };
0087 
0088 struct tifm_sd {
0089     struct tifm_dev       *dev;
0090 
0091     unsigned short        eject:1,
0092                   open_drain:1,
0093                   no_dma:1;
0094     unsigned short        cmd_flags;
0095 
0096     unsigned int          clk_freq;
0097     unsigned int          clk_div;
0098     unsigned long         timeout_jiffies;
0099 
0100     struct tasklet_struct finish_tasklet;
0101     struct timer_list     timer;
0102     struct mmc_request    *req;
0103 
0104     int                   sg_len;
0105     int                   sg_pos;
0106     unsigned int          block_pos;
0107     struct scatterlist    bounce_buf;
0108     unsigned char         bounce_buf_data[TIFM_MMCSD_MAX_BLOCK_SIZE];
0109 };
0110 
0111 /* for some reason, host won't respond correctly to readw/writew */
0112 static void tifm_sd_read_fifo(struct tifm_sd *host, struct page *pg,
0113                   unsigned int off, unsigned int cnt)
0114 {
0115     struct tifm_dev *sock = host->dev;
0116     unsigned char *buf;
0117     unsigned int pos = 0, val;
0118 
0119     buf = kmap_atomic(pg) + off;
0120     if (host->cmd_flags & DATA_CARRY) {
0121         buf[pos++] = host->bounce_buf_data[0];
0122         host->cmd_flags &= ~DATA_CARRY;
0123     }
0124 
0125     while (pos < cnt) {
0126         val = readl(sock->addr + SOCK_MMCSD_DATA);
0127         buf[pos++] = val & 0xff;
0128         if (pos == cnt) {
0129             host->bounce_buf_data[0] = (val >> 8) & 0xff;
0130             host->cmd_flags |= DATA_CARRY;
0131             break;
0132         }
0133         buf[pos++] = (val >> 8) & 0xff;
0134     }
0135     kunmap_atomic(buf - off);
0136 }
0137 
0138 static void tifm_sd_write_fifo(struct tifm_sd *host, struct page *pg,
0139                    unsigned int off, unsigned int cnt)
0140 {
0141     struct tifm_dev *sock = host->dev;
0142     unsigned char *buf;
0143     unsigned int pos = 0, val;
0144 
0145     buf = kmap_atomic(pg) + off;
0146     if (host->cmd_flags & DATA_CARRY) {
0147         val = host->bounce_buf_data[0] | ((buf[pos++] << 8) & 0xff00);
0148         writel(val, sock->addr + SOCK_MMCSD_DATA);
0149         host->cmd_flags &= ~DATA_CARRY;
0150     }
0151 
0152     while (pos < cnt) {
0153         val = buf[pos++];
0154         if (pos == cnt) {
0155             host->bounce_buf_data[0] = val & 0xff;
0156             host->cmd_flags |= DATA_CARRY;
0157             break;
0158         }
0159         val |= (buf[pos++] << 8) & 0xff00;
0160         writel(val, sock->addr + SOCK_MMCSD_DATA);
0161     }
0162     kunmap_atomic(buf - off);
0163 }
0164 
0165 static void tifm_sd_transfer_data(struct tifm_sd *host)
0166 {
0167     struct mmc_data *r_data = host->req->cmd->data;
0168     struct scatterlist *sg = r_data->sg;
0169     unsigned int off, cnt, t_size = TIFM_MMCSD_FIFO_SIZE * 2;
0170     unsigned int p_off, p_cnt;
0171     struct page *pg;
0172 
0173     if (host->sg_pos == host->sg_len)
0174         return;
0175     while (t_size) {
0176         cnt = sg[host->sg_pos].length - host->block_pos;
0177         if (!cnt) {
0178             host->block_pos = 0;
0179             host->sg_pos++;
0180             if (host->sg_pos == host->sg_len) {
0181                 if ((r_data->flags & MMC_DATA_WRITE)
0182                     && (host->cmd_flags & DATA_CARRY))
0183                     writel(host->bounce_buf_data[0],
0184                            host->dev->addr
0185                            + SOCK_MMCSD_DATA);
0186 
0187                 return;
0188             }
0189             cnt = sg[host->sg_pos].length;
0190         }
0191         off = sg[host->sg_pos].offset + host->block_pos;
0192 
0193         pg = nth_page(sg_page(&sg[host->sg_pos]), off >> PAGE_SHIFT);
0194         p_off = offset_in_page(off);
0195         p_cnt = PAGE_SIZE - p_off;
0196         p_cnt = min(p_cnt, cnt);
0197         p_cnt = min(p_cnt, t_size);
0198 
0199         if (r_data->flags & MMC_DATA_READ)
0200             tifm_sd_read_fifo(host, pg, p_off, p_cnt);
0201         else if (r_data->flags & MMC_DATA_WRITE)
0202             tifm_sd_write_fifo(host, pg, p_off, p_cnt);
0203 
0204         t_size -= p_cnt;
0205         host->block_pos += p_cnt;
0206     }
0207 }
0208 
0209 static void tifm_sd_copy_page(struct page *dst, unsigned int dst_off,
0210                   struct page *src, unsigned int src_off,
0211                   unsigned int count)
0212 {
0213     unsigned char *src_buf = kmap_atomic(src) + src_off;
0214     unsigned char *dst_buf = kmap_atomic(dst) + dst_off;
0215 
0216     memcpy(dst_buf, src_buf, count);
0217 
0218     kunmap_atomic(dst_buf - dst_off);
0219     kunmap_atomic(src_buf - src_off);
0220 }
0221 
0222 static void tifm_sd_bounce_block(struct tifm_sd *host, struct mmc_data *r_data)
0223 {
0224     struct scatterlist *sg = r_data->sg;
0225     unsigned int t_size = r_data->blksz;
0226     unsigned int off, cnt;
0227     unsigned int p_off, p_cnt;
0228     struct page *pg;
0229 
0230     dev_dbg(&host->dev->dev, "bouncing block\n");
0231     while (t_size) {
0232         cnt = sg[host->sg_pos].length - host->block_pos;
0233         if (!cnt) {
0234             host->block_pos = 0;
0235             host->sg_pos++;
0236             if (host->sg_pos == host->sg_len)
0237                 return;
0238             cnt = sg[host->sg_pos].length;
0239         }
0240         off = sg[host->sg_pos].offset + host->block_pos;
0241 
0242         pg = nth_page(sg_page(&sg[host->sg_pos]), off >> PAGE_SHIFT);
0243         p_off = offset_in_page(off);
0244         p_cnt = PAGE_SIZE - p_off;
0245         p_cnt = min(p_cnt, cnt);
0246         p_cnt = min(p_cnt, t_size);
0247 
0248         if (r_data->flags & MMC_DATA_WRITE)
0249             tifm_sd_copy_page(sg_page(&host->bounce_buf),
0250                       r_data->blksz - t_size,
0251                       pg, p_off, p_cnt);
0252         else if (r_data->flags & MMC_DATA_READ)
0253             tifm_sd_copy_page(pg, p_off, sg_page(&host->bounce_buf),
0254                       r_data->blksz - t_size, p_cnt);
0255 
0256         t_size -= p_cnt;
0257         host->block_pos += p_cnt;
0258     }
0259 }
0260 
0261 static int tifm_sd_set_dma_data(struct tifm_sd *host, struct mmc_data *r_data)
0262 {
0263     struct tifm_dev *sock = host->dev;
0264     unsigned int t_size = TIFM_DMA_TSIZE * r_data->blksz;
0265     unsigned int dma_len, dma_blk_cnt, dma_off;
0266     struct scatterlist *sg = NULL;
0267     unsigned long flags;
0268 
0269     if (host->sg_pos == host->sg_len)
0270         return 1;
0271 
0272     if (host->cmd_flags & DATA_CARRY) {
0273         host->cmd_flags &= ~DATA_CARRY;
0274         local_irq_save(flags);
0275         tifm_sd_bounce_block(host, r_data);
0276         local_irq_restore(flags);
0277         if (host->sg_pos == host->sg_len)
0278             return 1;
0279     }
0280 
0281     dma_len = sg_dma_len(&r_data->sg[host->sg_pos]) - host->block_pos;
0282     if (!dma_len) {
0283         host->block_pos = 0;
0284         host->sg_pos++;
0285         if (host->sg_pos == host->sg_len)
0286             return 1;
0287         dma_len = sg_dma_len(&r_data->sg[host->sg_pos]);
0288     }
0289 
0290     if (dma_len < t_size) {
0291         dma_blk_cnt = dma_len / r_data->blksz;
0292         dma_off = host->block_pos;
0293         host->block_pos += dma_blk_cnt * r_data->blksz;
0294     } else {
0295         dma_blk_cnt = TIFM_DMA_TSIZE;
0296         dma_off = host->block_pos;
0297         host->block_pos += t_size;
0298     }
0299 
0300     if (dma_blk_cnt)
0301         sg = &r_data->sg[host->sg_pos];
0302     else if (dma_len) {
0303         if (r_data->flags & MMC_DATA_WRITE) {
0304             local_irq_save(flags);
0305             tifm_sd_bounce_block(host, r_data);
0306             local_irq_restore(flags);
0307         } else
0308             host->cmd_flags |= DATA_CARRY;
0309 
0310         sg = &host->bounce_buf;
0311         dma_off = 0;
0312         dma_blk_cnt = 1;
0313     } else
0314         return 1;
0315 
0316     dev_dbg(&sock->dev, "setting dma for %d blocks\n", dma_blk_cnt);
0317     writel(sg_dma_address(sg) + dma_off, sock->addr + SOCK_DMA_ADDRESS);
0318     if (r_data->flags & MMC_DATA_WRITE)
0319         writel((dma_blk_cnt << 8) | TIFM_DMA_TX | TIFM_DMA_EN,
0320                sock->addr + SOCK_DMA_CONTROL);
0321     else
0322         writel((dma_blk_cnt << 8) | TIFM_DMA_EN,
0323                sock->addr + SOCK_DMA_CONTROL);
0324 
0325     return 0;
0326 }
0327 
0328 static unsigned int tifm_sd_op_flags(struct mmc_command *cmd)
0329 {
0330     unsigned int rc = 0;
0331 
0332     switch (mmc_resp_type(cmd)) {
0333     case MMC_RSP_NONE:
0334         rc |= TIFM_MMCSD_RSP_R0;
0335         break;
0336     case MMC_RSP_R1B:
0337         rc |= TIFM_MMCSD_RSP_BUSY;
0338         fallthrough;
0339     case MMC_RSP_R1:
0340         rc |= TIFM_MMCSD_RSP_R1;
0341         break;
0342     case MMC_RSP_R2:
0343         rc |= TIFM_MMCSD_RSP_R2;
0344         break;
0345     case MMC_RSP_R3:
0346         rc |= TIFM_MMCSD_RSP_R3;
0347         break;
0348     default:
0349         BUG();
0350     }
0351 
0352     switch (mmc_cmd_type(cmd)) {
0353     case MMC_CMD_BC:
0354         rc |= TIFM_MMCSD_CMD_BC;
0355         break;
0356     case MMC_CMD_BCR:
0357         rc |= TIFM_MMCSD_CMD_BCR;
0358         break;
0359     case MMC_CMD_AC:
0360         rc |= TIFM_MMCSD_CMD_AC;
0361         break;
0362     case MMC_CMD_ADTC:
0363         rc |= TIFM_MMCSD_CMD_ADTC;
0364         break;
0365     default:
0366         BUG();
0367     }
0368     return rc;
0369 }
0370 
0371 static void tifm_sd_exec(struct tifm_sd *host, struct mmc_command *cmd)
0372 {
0373     struct tifm_dev *sock = host->dev;
0374     unsigned int cmd_mask = tifm_sd_op_flags(cmd);
0375 
0376     if (host->open_drain)
0377         cmd_mask |= TIFM_MMCSD_ODTO;
0378 
0379     if (cmd->data && (cmd->data->flags & MMC_DATA_READ))
0380         cmd_mask |= TIFM_MMCSD_READ;
0381 
0382     dev_dbg(&sock->dev, "executing opcode 0x%x, arg: 0x%x, mask: 0x%x\n",
0383         cmd->opcode, cmd->arg, cmd_mask);
0384 
0385     writel((cmd->arg >> 16) & 0xffff, sock->addr + SOCK_MMCSD_ARG_HIGH);
0386     writel(cmd->arg & 0xffff, sock->addr + SOCK_MMCSD_ARG_LOW);
0387     writel(cmd->opcode | cmd_mask, sock->addr + SOCK_MMCSD_COMMAND);
0388 }
0389 
0390 static void tifm_sd_fetch_resp(struct mmc_command *cmd, struct tifm_dev *sock)
0391 {
0392     cmd->resp[0] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x1c) << 16)
0393                | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x18);
0394     cmd->resp[1] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x14) << 16)
0395                | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x10);
0396     cmd->resp[2] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x0c) << 16)
0397                | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x08);
0398     cmd->resp[3] = (readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x04) << 16)
0399                | readl(sock->addr + SOCK_MMCSD_RESPONSE + 0x00);
0400 }
0401 
0402 static void tifm_sd_check_status(struct tifm_sd *host)
0403 {
0404     struct tifm_dev *sock = host->dev;
0405     struct mmc_command *cmd = host->req->cmd;
0406 
0407     if (cmd->error)
0408         goto finish_request;
0409 
0410     if (!(host->cmd_flags & CMD_READY))
0411         return;
0412 
0413     if (cmd->data) {
0414         if (cmd->data->error) {
0415             if ((host->cmd_flags & SCMD_ACTIVE)
0416                 && !(host->cmd_flags & SCMD_READY))
0417                 return;
0418 
0419             goto finish_request;
0420         }
0421 
0422         if (!(host->cmd_flags & BRS_READY))
0423             return;
0424 
0425         if (!(host->no_dma || (host->cmd_flags & FIFO_READY)))
0426             return;
0427 
0428         if (cmd->data->flags & MMC_DATA_WRITE) {
0429             if (host->req->stop) {
0430                 if (!(host->cmd_flags & SCMD_ACTIVE)) {
0431                     host->cmd_flags |= SCMD_ACTIVE;
0432                     writel(TIFM_MMCSD_EOFB
0433                            | readl(sock->addr
0434                                + SOCK_MMCSD_INT_ENABLE),
0435                            sock->addr
0436                            + SOCK_MMCSD_INT_ENABLE);
0437                     tifm_sd_exec(host, host->req->stop);
0438                     return;
0439                 } else {
0440                     if (!(host->cmd_flags & SCMD_READY)
0441                         || (host->cmd_flags & CARD_BUSY))
0442                         return;
0443                     writel((~TIFM_MMCSD_EOFB)
0444                            & readl(sock->addr
0445                                + SOCK_MMCSD_INT_ENABLE),
0446                            sock->addr
0447                            + SOCK_MMCSD_INT_ENABLE);
0448                 }
0449             } else {
0450                 if (host->cmd_flags & CARD_BUSY)
0451                     return;
0452                 writel((~TIFM_MMCSD_EOFB)
0453                        & readl(sock->addr
0454                            + SOCK_MMCSD_INT_ENABLE),
0455                        sock->addr + SOCK_MMCSD_INT_ENABLE);
0456             }
0457         } else {
0458             if (host->req->stop) {
0459                 if (!(host->cmd_flags & SCMD_ACTIVE)) {
0460                     host->cmd_flags |= SCMD_ACTIVE;
0461                     tifm_sd_exec(host, host->req->stop);
0462                     return;
0463                 } else {
0464                     if (!(host->cmd_flags & SCMD_READY))
0465                         return;
0466                 }
0467             }
0468         }
0469     }
0470 finish_request:
0471     tasklet_schedule(&host->finish_tasklet);
0472 }
0473 
0474 /* Called from interrupt handler */
0475 static void tifm_sd_data_event(struct tifm_dev *sock)
0476 {
0477     struct tifm_sd *host;
0478     unsigned int fifo_status = 0;
0479     struct mmc_data *r_data = NULL;
0480 
0481     spin_lock(&sock->lock);
0482     host = mmc_priv((struct mmc_host*)tifm_get_drvdata(sock));
0483     fifo_status = readl(sock->addr + SOCK_DMA_FIFO_STATUS);
0484     dev_dbg(&sock->dev, "data event: fifo_status %x, flags %x\n",
0485         fifo_status, host->cmd_flags);
0486 
0487     if (host->req) {
0488         r_data = host->req->cmd->data;
0489 
0490         if (r_data && (fifo_status & TIFM_FIFO_READY)) {
0491             if (tifm_sd_set_dma_data(host, r_data)) {
0492                 host->cmd_flags |= FIFO_READY;
0493                 tifm_sd_check_status(host);
0494             }
0495         }
0496     }
0497 
0498     writel(fifo_status, sock->addr + SOCK_DMA_FIFO_STATUS);
0499     spin_unlock(&sock->lock);
0500 }
0501 
0502 /* Called from interrupt handler */
0503 static void tifm_sd_card_event(struct tifm_dev *sock)
0504 {
0505     struct tifm_sd *host;
0506     unsigned int host_status = 0;
0507     int cmd_error = 0;
0508     struct mmc_command *cmd = NULL;
0509     unsigned long flags;
0510 
0511     spin_lock(&sock->lock);
0512     host = mmc_priv((struct mmc_host*)tifm_get_drvdata(sock));
0513     host_status = readl(sock->addr + SOCK_MMCSD_STATUS);
0514     dev_dbg(&sock->dev, "host event: host_status %x, flags %x\n",
0515         host_status, host->cmd_flags);
0516 
0517     if (host->req) {
0518         cmd = host->req->cmd;
0519 
0520         if (host_status & TIFM_MMCSD_ERRMASK) {
0521             writel(host_status & TIFM_MMCSD_ERRMASK,
0522                    sock->addr + SOCK_MMCSD_STATUS);
0523             if (host_status & TIFM_MMCSD_CTO)
0524                 cmd_error = -ETIMEDOUT;
0525             else if (host_status & TIFM_MMCSD_CCRC)
0526                 cmd_error = -EILSEQ;
0527 
0528             if (cmd->data) {
0529                 if (host_status & TIFM_MMCSD_DTO)
0530                     cmd->data->error = -ETIMEDOUT;
0531                 else if (host_status & TIFM_MMCSD_DCRC)
0532                     cmd->data->error = -EILSEQ;
0533             }
0534 
0535             writel(TIFM_FIFO_INT_SETALL,
0536                    sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
0537             writel(TIFM_DMA_RESET, sock->addr + SOCK_DMA_CONTROL);
0538 
0539             if (host->req->stop) {
0540                 if (host->cmd_flags & SCMD_ACTIVE) {
0541                     host->req->stop->error = cmd_error;
0542                     host->cmd_flags |= SCMD_READY;
0543                 } else {
0544                     cmd->error = cmd_error;
0545                     host->cmd_flags |= SCMD_ACTIVE;
0546                     tifm_sd_exec(host, host->req->stop);
0547                     goto done;
0548                 }
0549             } else
0550                 cmd->error = cmd_error;
0551         } else {
0552             if (host_status & (TIFM_MMCSD_EOC | TIFM_MMCSD_CERR)) {
0553                 if (!(host->cmd_flags & CMD_READY)) {
0554                     host->cmd_flags |= CMD_READY;
0555                     tifm_sd_fetch_resp(cmd, sock);
0556                 } else if (host->cmd_flags & SCMD_ACTIVE) {
0557                     host->cmd_flags |= SCMD_READY;
0558                     tifm_sd_fetch_resp(host->req->stop,
0559                                sock);
0560                 }
0561             }
0562             if (host_status & TIFM_MMCSD_BRS)
0563                 host->cmd_flags |= BRS_READY;
0564         }
0565 
0566         if (host->no_dma && cmd->data) {
0567             if (host_status & TIFM_MMCSD_AE)
0568                 writel(host_status & TIFM_MMCSD_AE,
0569                        sock->addr + SOCK_MMCSD_STATUS);
0570 
0571             if (host_status & (TIFM_MMCSD_AE | TIFM_MMCSD_AF
0572                        | TIFM_MMCSD_BRS)) {
0573                 local_irq_save(flags);
0574                 tifm_sd_transfer_data(host);
0575                 local_irq_restore(flags);
0576                 host_status &= ~TIFM_MMCSD_AE;
0577             }
0578         }
0579 
0580         if (host_status & TIFM_MMCSD_EOFB)
0581             host->cmd_flags &= ~CARD_BUSY;
0582         else if (host_status & TIFM_MMCSD_CB)
0583             host->cmd_flags |= CARD_BUSY;
0584 
0585         tifm_sd_check_status(host);
0586     }
0587 done:
0588     writel(host_status, sock->addr + SOCK_MMCSD_STATUS);
0589     spin_unlock(&sock->lock);
0590 }
0591 
0592 static void tifm_sd_set_data_timeout(struct tifm_sd *host,
0593                      struct mmc_data *data)
0594 {
0595     struct tifm_dev *sock = host->dev;
0596     unsigned int data_timeout = data->timeout_clks;
0597 
0598     if (fixed_timeout)
0599         return;
0600 
0601     data_timeout += data->timeout_ns /
0602             ((1000000000UL / host->clk_freq) * host->clk_div);
0603 
0604     if (data_timeout < 0xffff) {
0605         writel(data_timeout, sock->addr + SOCK_MMCSD_DATA_TO);
0606         writel((~TIFM_MMCSD_DPE)
0607                & readl(sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG),
0608                sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG);
0609     } else {
0610         data_timeout = (data_timeout >> 10) + 1;
0611         if (data_timeout > 0xffff)
0612             data_timeout = 0;   /* set to unlimited */
0613         writel(data_timeout, sock->addr + SOCK_MMCSD_DATA_TO);
0614         writel(TIFM_MMCSD_DPE
0615                | readl(sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG),
0616                sock->addr + SOCK_MMCSD_SDIO_MODE_CONFIG);
0617     }
0618 }
0619 
0620 static void tifm_sd_request(struct mmc_host *mmc, struct mmc_request *mrq)
0621 {
0622     struct tifm_sd *host = mmc_priv(mmc);
0623     struct tifm_dev *sock = host->dev;
0624     unsigned long flags;
0625     struct mmc_data *r_data = mrq->cmd->data;
0626 
0627     spin_lock_irqsave(&sock->lock, flags);
0628     if (host->eject) {
0629         mrq->cmd->error = -ENOMEDIUM;
0630         goto err_out;
0631     }
0632 
0633     if (host->req) {
0634         pr_err("%s : unfinished request detected\n",
0635                dev_name(&sock->dev));
0636         mrq->cmd->error = -ETIMEDOUT;
0637         goto err_out;
0638     }
0639 
0640     host->cmd_flags = 0;
0641     host->block_pos = 0;
0642     host->sg_pos = 0;
0643 
0644     if (mrq->data && !is_power_of_2(mrq->data->blksz))
0645         host->no_dma = 1;
0646     else
0647         host->no_dma = no_dma ? 1 : 0;
0648 
0649     if (r_data) {
0650         tifm_sd_set_data_timeout(host, r_data);
0651 
0652         if ((r_data->flags & MMC_DATA_WRITE) && !mrq->stop)
0653              writel(TIFM_MMCSD_EOFB
0654                 | readl(sock->addr + SOCK_MMCSD_INT_ENABLE),
0655                 sock->addr + SOCK_MMCSD_INT_ENABLE);
0656 
0657         if (host->no_dma) {
0658             writel(TIFM_MMCSD_BUFINT
0659                    | readl(sock->addr + SOCK_MMCSD_INT_ENABLE),
0660                    sock->addr + SOCK_MMCSD_INT_ENABLE);
0661             writel(((TIFM_MMCSD_FIFO_SIZE - 1) << 8)
0662                    | (TIFM_MMCSD_FIFO_SIZE - 1),
0663                    sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
0664 
0665             host->sg_len = r_data->sg_len;
0666         } else {
0667             sg_init_one(&host->bounce_buf, host->bounce_buf_data,
0668                     r_data->blksz);
0669 
0670             if(1 != tifm_map_sg(sock, &host->bounce_buf, 1,
0671                         r_data->flags & MMC_DATA_WRITE
0672                         ? DMA_TO_DEVICE
0673                         : DMA_FROM_DEVICE)) {
0674                 pr_err("%s : scatterlist map failed\n",
0675                        dev_name(&sock->dev));
0676                 mrq->cmd->error = -ENOMEM;
0677                 goto err_out;
0678             }
0679             host->sg_len = tifm_map_sg(sock, r_data->sg,
0680                            r_data->sg_len,
0681                            r_data->flags
0682                            & MMC_DATA_WRITE
0683                            ? DMA_TO_DEVICE
0684                            : DMA_FROM_DEVICE);
0685             if (host->sg_len < 1) {
0686                 pr_err("%s : scatterlist map failed\n",
0687                        dev_name(&sock->dev));
0688                 tifm_unmap_sg(sock, &host->bounce_buf, 1,
0689                           r_data->flags & MMC_DATA_WRITE
0690                           ? DMA_TO_DEVICE
0691                           : DMA_FROM_DEVICE);
0692                 mrq->cmd->error = -ENOMEM;
0693                 goto err_out;
0694             }
0695 
0696             writel(TIFM_FIFO_INT_SETALL,
0697                    sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
0698             writel(ilog2(r_data->blksz) - 2,
0699                    sock->addr + SOCK_FIFO_PAGE_SIZE);
0700             writel(TIFM_FIFO_ENABLE,
0701                    sock->addr + SOCK_FIFO_CONTROL);
0702             writel(TIFM_FIFO_INTMASK,
0703                    sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
0704 
0705             if (r_data->flags & MMC_DATA_WRITE)
0706                 writel(TIFM_MMCSD_TXDE,
0707                        sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
0708             else
0709                 writel(TIFM_MMCSD_RXDE,
0710                        sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
0711 
0712             tifm_sd_set_dma_data(host, r_data);
0713         }
0714 
0715         writel(r_data->blocks - 1,
0716                sock->addr + SOCK_MMCSD_NUM_BLOCKS);
0717         writel(r_data->blksz - 1,
0718                sock->addr + SOCK_MMCSD_BLOCK_LEN);
0719     }
0720 
0721     host->req = mrq;
0722     mod_timer(&host->timer, jiffies + host->timeout_jiffies);
0723     writel(TIFM_CTRL_LED | readl(sock->addr + SOCK_CONTROL),
0724            sock->addr + SOCK_CONTROL);
0725     tifm_sd_exec(host, mrq->cmd);
0726     spin_unlock_irqrestore(&sock->lock, flags);
0727     return;
0728 
0729 err_out:
0730     spin_unlock_irqrestore(&sock->lock, flags);
0731     mmc_request_done(mmc, mrq);
0732 }
0733 
0734 static void tifm_sd_end_cmd(struct tasklet_struct *t)
0735 {
0736     struct tifm_sd *host = from_tasklet(host, t, finish_tasklet);
0737     struct tifm_dev *sock = host->dev;
0738     struct mmc_host *mmc = tifm_get_drvdata(sock);
0739     struct mmc_request *mrq;
0740     struct mmc_data *r_data = NULL;
0741     unsigned long flags;
0742 
0743     spin_lock_irqsave(&sock->lock, flags);
0744 
0745     del_timer(&host->timer);
0746     mrq = host->req;
0747     host->req = NULL;
0748 
0749     if (!mrq) {
0750         pr_err(" %s : no request to complete?\n",
0751                dev_name(&sock->dev));
0752         spin_unlock_irqrestore(&sock->lock, flags);
0753         return;
0754     }
0755 
0756     r_data = mrq->cmd->data;
0757     if (r_data) {
0758         if (host->no_dma) {
0759             writel((~TIFM_MMCSD_BUFINT)
0760                    & readl(sock->addr + SOCK_MMCSD_INT_ENABLE),
0761                    sock->addr + SOCK_MMCSD_INT_ENABLE);
0762         } else {
0763             tifm_unmap_sg(sock, &host->bounce_buf, 1,
0764                       (r_data->flags & MMC_DATA_WRITE)
0765                       ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
0766             tifm_unmap_sg(sock, r_data->sg, r_data->sg_len,
0767                       (r_data->flags & MMC_DATA_WRITE)
0768                       ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
0769         }
0770 
0771         r_data->bytes_xfered = r_data->blocks
0772             - readl(sock->addr + SOCK_MMCSD_NUM_BLOCKS) - 1;
0773         r_data->bytes_xfered *= r_data->blksz;
0774         r_data->bytes_xfered += r_data->blksz
0775             - readl(sock->addr + SOCK_MMCSD_BLOCK_LEN) + 1;
0776     }
0777 
0778     writel((~TIFM_CTRL_LED) & readl(sock->addr + SOCK_CONTROL),
0779            sock->addr + SOCK_CONTROL);
0780 
0781     spin_unlock_irqrestore(&sock->lock, flags);
0782     mmc_request_done(mmc, mrq);
0783 }
0784 
0785 static void tifm_sd_abort(struct timer_list *t)
0786 {
0787     struct tifm_sd *host = from_timer(host, t, timer);
0788 
0789     pr_err("%s : card failed to respond for a long period of time "
0790            "(%x, %x)\n",
0791            dev_name(&host->dev->dev), host->req->cmd->opcode, host->cmd_flags);
0792 
0793     tifm_eject(host->dev);
0794 }
0795 
0796 static void tifm_sd_ios(struct mmc_host *mmc, struct mmc_ios *ios)
0797 {
0798     struct tifm_sd *host = mmc_priv(mmc);
0799     struct tifm_dev *sock = host->dev;
0800     unsigned int clk_div1, clk_div2;
0801     unsigned long flags;
0802 
0803     spin_lock_irqsave(&sock->lock, flags);
0804 
0805     dev_dbg(&sock->dev, "ios: clock = %u, vdd = %x, bus_mode = %x, "
0806         "chip_select = %x, power_mode = %x, bus_width = %x\n",
0807         ios->clock, ios->vdd, ios->bus_mode, ios->chip_select,
0808         ios->power_mode, ios->bus_width);
0809 
0810     if (ios->bus_width == MMC_BUS_WIDTH_4) {
0811         writel(TIFM_MMCSD_4BBUS | readl(sock->addr + SOCK_MMCSD_CONFIG),
0812                sock->addr + SOCK_MMCSD_CONFIG);
0813     } else {
0814         writel((~TIFM_MMCSD_4BBUS)
0815                & readl(sock->addr + SOCK_MMCSD_CONFIG),
0816                sock->addr + SOCK_MMCSD_CONFIG);
0817     }
0818 
0819     if (ios->clock) {
0820         clk_div1 = 20000000 / ios->clock;
0821         if (!clk_div1)
0822             clk_div1 = 1;
0823 
0824         clk_div2 = 24000000 / ios->clock;
0825         if (!clk_div2)
0826             clk_div2 = 1;
0827 
0828         if ((20000000 / clk_div1) > ios->clock)
0829             clk_div1++;
0830         if ((24000000 / clk_div2) > ios->clock)
0831             clk_div2++;
0832         if ((20000000 / clk_div1) > (24000000 / clk_div2)) {
0833             host->clk_freq = 20000000;
0834             host->clk_div = clk_div1;
0835             writel((~TIFM_CTRL_FAST_CLK)
0836                    & readl(sock->addr + SOCK_CONTROL),
0837                    sock->addr + SOCK_CONTROL);
0838         } else {
0839             host->clk_freq = 24000000;
0840             host->clk_div = clk_div2;
0841             writel(TIFM_CTRL_FAST_CLK
0842                    | readl(sock->addr + SOCK_CONTROL),
0843                    sock->addr + SOCK_CONTROL);
0844         }
0845     } else {
0846         host->clk_div = 0;
0847     }
0848     host->clk_div &= TIFM_MMCSD_CLKMASK;
0849     writel(host->clk_div
0850            | ((~TIFM_MMCSD_CLKMASK)
0851           & readl(sock->addr + SOCK_MMCSD_CONFIG)),
0852            sock->addr + SOCK_MMCSD_CONFIG);
0853 
0854     host->open_drain = (ios->bus_mode == MMC_BUSMODE_OPENDRAIN);
0855 
0856     /* chip_select : maybe later */
0857     //vdd
0858     //power is set before probe / after remove
0859 
0860     spin_unlock_irqrestore(&sock->lock, flags);
0861 }
0862 
0863 static int tifm_sd_ro(struct mmc_host *mmc)
0864 {
0865     int rc = 0;
0866     struct tifm_sd *host = mmc_priv(mmc);
0867     struct tifm_dev *sock = host->dev;
0868     unsigned long flags;
0869 
0870     spin_lock_irqsave(&sock->lock, flags);
0871     if (TIFM_MMCSD_CARD_RO & readl(sock->addr + SOCK_PRESENT_STATE))
0872         rc = 1;
0873     spin_unlock_irqrestore(&sock->lock, flags);
0874     return rc;
0875 }
0876 
0877 static const struct mmc_host_ops tifm_sd_ops = {
0878     .request = tifm_sd_request,
0879     .set_ios = tifm_sd_ios,
0880     .get_ro  = tifm_sd_ro
0881 };
0882 
0883 static int tifm_sd_initialize_host(struct tifm_sd *host)
0884 {
0885     int rc;
0886     unsigned int host_status = 0;
0887     struct tifm_dev *sock = host->dev;
0888 
0889     writel(0, sock->addr + SOCK_MMCSD_INT_ENABLE);
0890     host->clk_div = 61;
0891     host->clk_freq = 20000000;
0892     writel(TIFM_MMCSD_RESET, sock->addr + SOCK_MMCSD_SYSTEM_CONTROL);
0893     writel(host->clk_div | TIFM_MMCSD_POWER,
0894            sock->addr + SOCK_MMCSD_CONFIG);
0895 
0896     /* wait up to 0.51 sec for reset */
0897     for (rc = 32; rc <= 256; rc <<= 1) {
0898         if (1 & readl(sock->addr + SOCK_MMCSD_SYSTEM_STATUS)) {
0899             rc = 0;
0900             break;
0901         }
0902         msleep(rc);
0903     }
0904 
0905     if (rc) {
0906         pr_err("%s : controller failed to reset\n",
0907                dev_name(&sock->dev));
0908         return -ENODEV;
0909     }
0910 
0911     writel(0, sock->addr + SOCK_MMCSD_NUM_BLOCKS);
0912     writel(host->clk_div | TIFM_MMCSD_POWER,
0913            sock->addr + SOCK_MMCSD_CONFIG);
0914     writel(TIFM_MMCSD_RXDE, sock->addr + SOCK_MMCSD_BUFFER_CONFIG);
0915 
0916     // command timeout fixed to 64 clocks for now
0917     writel(64, sock->addr + SOCK_MMCSD_COMMAND_TO);
0918     writel(TIFM_MMCSD_INAB, sock->addr + SOCK_MMCSD_COMMAND);
0919 
0920     for (rc = 16; rc <= 64; rc <<= 1) {
0921         host_status = readl(sock->addr + SOCK_MMCSD_STATUS);
0922         writel(host_status, sock->addr + SOCK_MMCSD_STATUS);
0923         if (!(host_status & TIFM_MMCSD_ERRMASK)
0924             && (host_status & TIFM_MMCSD_EOC)) {
0925             rc = 0;
0926             break;
0927         }
0928         msleep(rc);
0929     }
0930 
0931     if (rc) {
0932         pr_err("%s : card not ready - probe failed on initialization\n",
0933                dev_name(&sock->dev));
0934         return -ENODEV;
0935     }
0936 
0937     writel(TIFM_MMCSD_CERR | TIFM_MMCSD_BRS | TIFM_MMCSD_EOC
0938            | TIFM_MMCSD_ERRMASK,
0939            sock->addr + SOCK_MMCSD_INT_ENABLE);
0940 
0941     return 0;
0942 }
0943 
0944 static int tifm_sd_probe(struct tifm_dev *sock)
0945 {
0946     struct mmc_host *mmc;
0947     struct tifm_sd *host;
0948     int rc = -EIO;
0949 
0950     if (!(TIFM_SOCK_STATE_OCCUPIED
0951           & readl(sock->addr + SOCK_PRESENT_STATE))) {
0952         pr_warn("%s : card gone, unexpectedly\n",
0953             dev_name(&sock->dev));
0954         return rc;
0955     }
0956 
0957     mmc = mmc_alloc_host(sizeof(struct tifm_sd), &sock->dev);
0958     if (!mmc)
0959         return -ENOMEM;
0960 
0961     host = mmc_priv(mmc);
0962     tifm_set_drvdata(sock, mmc);
0963     host->dev = sock;
0964     host->timeout_jiffies = msecs_to_jiffies(TIFM_MMCSD_REQ_TIMEOUT_MS);
0965     /*
0966      * We use a fixed request timeout of 1s, hence inform the core about it.
0967      * A future improvement should instead respect the cmd->busy_timeout.
0968      */
0969     mmc->max_busy_timeout = TIFM_MMCSD_REQ_TIMEOUT_MS;
0970 
0971     tasklet_setup(&host->finish_tasklet, tifm_sd_end_cmd);
0972     timer_setup(&host->timer, tifm_sd_abort, 0);
0973 
0974     mmc->ops = &tifm_sd_ops;
0975     mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
0976     mmc->caps = MMC_CAP_4_BIT_DATA;
0977     mmc->f_min = 20000000 / 60;
0978     mmc->f_max = 24000000;
0979 
0980     mmc->max_blk_count = 2048;
0981     mmc->max_segs = mmc->max_blk_count;
0982     mmc->max_blk_size = min(TIFM_MMCSD_MAX_BLOCK_SIZE, PAGE_SIZE);
0983     mmc->max_seg_size = mmc->max_blk_count * mmc->max_blk_size;
0984     mmc->max_req_size = mmc->max_seg_size;
0985 
0986     sock->card_event = tifm_sd_card_event;
0987     sock->data_event = tifm_sd_data_event;
0988     rc = tifm_sd_initialize_host(host);
0989 
0990     if (!rc)
0991         rc = mmc_add_host(mmc);
0992     if (!rc)
0993         return 0;
0994 
0995     mmc_free_host(mmc);
0996     return rc;
0997 }
0998 
0999 static void tifm_sd_remove(struct tifm_dev *sock)
1000 {
1001     struct mmc_host *mmc = tifm_get_drvdata(sock);
1002     struct tifm_sd *host = mmc_priv(mmc);
1003     unsigned long flags;
1004 
1005     spin_lock_irqsave(&sock->lock, flags);
1006     host->eject = 1;
1007     writel(0, sock->addr + SOCK_MMCSD_INT_ENABLE);
1008     spin_unlock_irqrestore(&sock->lock, flags);
1009 
1010     tasklet_kill(&host->finish_tasklet);
1011 
1012     spin_lock_irqsave(&sock->lock, flags);
1013     if (host->req) {
1014         writel(TIFM_FIFO_INT_SETALL,
1015                sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
1016         writel(0, sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
1017         host->req->cmd->error = -ENOMEDIUM;
1018         if (host->req->stop)
1019             host->req->stop->error = -ENOMEDIUM;
1020         tasklet_schedule(&host->finish_tasklet);
1021     }
1022     spin_unlock_irqrestore(&sock->lock, flags);
1023     mmc_remove_host(mmc);
1024     dev_dbg(&sock->dev, "after remove\n");
1025 
1026     mmc_free_host(mmc);
1027 }
1028 
1029 #ifdef CONFIG_PM
1030 
1031 static int tifm_sd_suspend(struct tifm_dev *sock, pm_message_t state)
1032 {
1033     return 0;
1034 }
1035 
1036 static int tifm_sd_resume(struct tifm_dev *sock)
1037 {
1038     struct mmc_host *mmc = tifm_get_drvdata(sock);
1039     struct tifm_sd *host = mmc_priv(mmc);
1040     int rc;
1041 
1042     rc = tifm_sd_initialize_host(host);
1043     dev_dbg(&sock->dev, "resume initialize %d\n", rc);
1044 
1045     if (rc)
1046         host->eject = 1;
1047 
1048     return rc;
1049 }
1050 
1051 #else
1052 
1053 #define tifm_sd_suspend NULL
1054 #define tifm_sd_resume NULL
1055 
1056 #endif /* CONFIG_PM */
1057 
1058 static struct tifm_device_id tifm_sd_id_tbl[] = {
1059     { TIFM_TYPE_SD }, { }
1060 };
1061 
1062 static struct tifm_driver tifm_sd_driver = {
1063     .driver = {
1064         .name  = DRIVER_NAME,
1065         .owner = THIS_MODULE
1066     },
1067     .id_table = tifm_sd_id_tbl,
1068     .probe    = tifm_sd_probe,
1069     .remove   = tifm_sd_remove,
1070     .suspend  = tifm_sd_suspend,
1071     .resume   = tifm_sd_resume
1072 };
1073 
1074 static int __init tifm_sd_init(void)
1075 {
1076     return tifm_register_driver(&tifm_sd_driver);
1077 }
1078 
1079 static void __exit tifm_sd_exit(void)
1080 {
1081     tifm_unregister_driver(&tifm_sd_driver);
1082 }
1083 
1084 MODULE_AUTHOR("Alex Dubov");
1085 MODULE_DESCRIPTION("TI FlashMedia SD driver");
1086 MODULE_LICENSE("GPL");
1087 MODULE_DEVICE_TABLE(tifm, tifm_sd_id_tbl);
1088 MODULE_VERSION(DRIVER_VERSION);
1089 
1090 module_init(tifm_sd_init);
1091 module_exit(tifm_sd_exit);
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