mmc/host/sdhci_f_sdh30.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * linux/drivers/mmc/host/sdhci_f_sdh30.c
0004  *
0005  * Copyright (C) 2013 - 2015 Fujitsu Semiconductor, Ltd
0006  *              Vincent Yang <vincent.yang@tw.fujitsu.com>
0007  * Copyright (C) 2015 Linaro Ltd  Andy Green <andy.green@linaro.org>
0008  */
0009
0010 #include <linux/acpi.h>
0011 #include <linux/err.h>
0012 #include <linux/delay.h>
0013 #include <linux/module.h>
0014 #include <linux/of.h>
0015 #include <linux/property.h>
0016 #include <linux/clk.h>
0017
0018 #include "sdhci-pltfm.h"
0019 #include "sdhci_f_sdh30.h"
0020
0021 struct f_sdhost_priv {
0022     struct clk *clk_iface;
0023     struct clk *clk;
0024     u32 vendor_hs200;
0025     struct device *dev;
0026     bool enable_cmd_dat_delay;
0027 };
0028
0029 static void sdhci_f_sdh30_soft_voltage_switch(struct sdhci_host *host)
0030 {
0031     struct f_sdhost_priv *priv = sdhci_priv(host);
0032     u32 ctrl = 0;
0033
0034     usleep_range(2500, 3000);
0035     ctrl = sdhci_readl(host, F_SDH30_IO_CONTROL2);
0036     ctrl |= F_SDH30_CRES_O_DN;
0037     sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2);
0038     ctrl |= F_SDH30_MSEL_O_1_8;
0039     sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2);
0040
0041     ctrl &= ~F_SDH30_CRES_O_DN;
0042     sdhci_writel(host, ctrl, F_SDH30_IO_CONTROL2);
0043     usleep_range(2500, 3000);
0044
0045     if (priv->vendor_hs200) {
0046         dev_info(priv->dev, "%s: setting hs200\n", __func__);
0047         ctrl = sdhci_readl(host, F_SDH30_ESD_CONTROL);
0048         ctrl |= priv->vendor_hs200;
0049         sdhci_writel(host, ctrl, F_SDH30_ESD_CONTROL);
0050     }
0051
0052     ctrl = sdhci_readl(host, F_SDH30_TUNING_SETTING);
0053     ctrl |= F_SDH30_CMD_CHK_DIS;
0054     sdhci_writel(host, ctrl, F_SDH30_TUNING_SETTING);
0055 }
0056
0057 static unsigned int sdhci_f_sdh30_get_min_clock(struct sdhci_host *host)
0058 {
0059     return F_SDH30_MIN_CLOCK;
0060 }
0061
0062 static void sdhci_f_sdh30_reset(struct sdhci_host *host, u8 mask)
0063 {
0064     struct f_sdhost_priv *priv = sdhci_priv(host);
0065     u32 ctl;
0066
0067     if (sdhci_readw(host, SDHCI_CLOCK_CONTROL) == 0)
0068         sdhci_writew(host, 0xBC01, SDHCI_CLOCK_CONTROL);
0069
0070     sdhci_reset(host, mask);
0071
0072     if (priv->enable_cmd_dat_delay) {
0073         ctl = sdhci_readl(host, F_SDH30_ESD_CONTROL);
0074         ctl |= F_SDH30_CMD_DAT_DELAY;
0075         sdhci_writel(host, ctl, F_SDH30_ESD_CONTROL);
0076     }
0077 }
0078
0079 static const struct sdhci_ops sdhci_f_sdh30_ops = {
0080     .voltage_switch = sdhci_f_sdh30_soft_voltage_switch,
0081     .get_min_clock = sdhci_f_sdh30_get_min_clock,
0082     .reset = sdhci_f_sdh30_reset,
0083     .set_clock = sdhci_set_clock,
0084     .set_bus_width = sdhci_set_bus_width,
0085     .set_uhs_signaling = sdhci_set_uhs_signaling,
0086 };
0087
0088 static int sdhci_f_sdh30_probe(struct platform_device *pdev)
0089 {
0090     struct sdhci_host *host;
0091     struct device *dev = &pdev->dev;
0092     int irq, ctrl = 0, ret = 0;
0093     struct f_sdhost_priv *priv;
0094     u32 reg = 0;
0095
0096     irq = platform_get_irq(pdev, 0);
0097     if (irq < 0)
0098         return irq;
0099
0100     host = sdhci_alloc_host(dev, sizeof(struct f_sdhost_priv));
0101     if (IS_ERR(host))
0102         return PTR_ERR(host);
0103
0104     priv = sdhci_priv(host);
0105     priv->dev = dev;
0106
0107     host->quirks = SDHCI_QUIRK_NO_ENDATTR_IN_NOPDESC |
0108                SDHCI_QUIRK_INVERTED_WRITE_PROTECT;
0109     host->quirks2 = SDHCI_QUIRK2_SUPPORT_SINGLE |
0110             SDHCI_QUIRK2_TUNING_WORK_AROUND;
0111
0112     priv->enable_cmd_dat_delay = device_property_read_bool(dev,
0113                         "fujitsu,cmd-dat-delay-select");
0114
0115     ret = mmc_of_parse(host->mmc);
0116     if (ret)
0117         goto err;
0118
0119     platform_set_drvdata(pdev, host);
0120
0121     host->hw_name = "f_sdh30";
0122     host->ops = &sdhci_f_sdh30_ops;
0123     host->irq = irq;
0124
0125     host->ioaddr = devm_platform_ioremap_resource(pdev, 0);
0126     if (IS_ERR(host->ioaddr)) {
0127         ret = PTR_ERR(host->ioaddr);
0128         goto err;
0129     }
0130
0131     if (dev_of_node(dev)) {
0132         sdhci_get_of_property(pdev);
0133
0134         priv->clk_iface = devm_clk_get(&pdev->dev, "iface");
0135         if (IS_ERR(priv->clk_iface)) {
0136             ret = PTR_ERR(priv->clk_iface);
0137             goto err;
0138         }
0139
0140         ret = clk_prepare_enable(priv->clk_iface);
0141         if (ret)
0142             goto err;
0143
0144         priv->clk = devm_clk_get(&pdev->dev, "core");
0145         if (IS_ERR(priv->clk)) {
0146             ret = PTR_ERR(priv->clk);
0147             goto err_clk;
0148         }
0149
0150         ret = clk_prepare_enable(priv->clk);
0151         if (ret)
0152             goto err_clk;
0153     }
0154
0155     /* init vendor specific regs */
0156     ctrl = sdhci_readw(host, F_SDH30_AHB_CONFIG);
0157     ctrl |= F_SDH30_SIN | F_SDH30_AHB_INCR_16 | F_SDH30_AHB_INCR_8 |
0158         F_SDH30_AHB_INCR_4;
0159     ctrl &= ~(F_SDH30_AHB_BIGED | F_SDH30_BUSLOCK_EN);
0160     sdhci_writew(host, ctrl, F_SDH30_AHB_CONFIG);
0161
0162     reg = sdhci_readl(host, F_SDH30_ESD_CONTROL);
0163     sdhci_writel(host, reg & ~F_SDH30_EMMC_RST, F_SDH30_ESD_CONTROL);
0164     msleep(20);
0165     sdhci_writel(host, reg | F_SDH30_EMMC_RST, F_SDH30_ESD_CONTROL);
0166
0167     reg = sdhci_readl(host, SDHCI_CAPABILITIES);
0168     if (reg & SDHCI_CAN_DO_8BIT)
0169         priv->vendor_hs200 = F_SDH30_EMMC_HS200;
0170
0171     ret = sdhci_add_host(host);
0172     if (ret)
0173         goto err_add_host;
0174
0175     return 0;
0176
0177 err_add_host:
0178     clk_disable_unprepare(priv->clk);
0179 err_clk:
0180     clk_disable_unprepare(priv->clk_iface);
0181 err:
0182     sdhci_free_host(host);
0183     return ret;
0184 }
0185
0186 static int sdhci_f_sdh30_remove(struct platform_device *pdev)
0187 {
0188     struct sdhci_host *host = platform_get_drvdata(pdev);
0189     struct f_sdhost_priv *priv = sdhci_priv(host);
0190
0191     sdhci_remove_host(host, readl(host->ioaddr + SDHCI_INT_STATUS) ==
0192               0xffffffff);
0193
0194     clk_disable_unprepare(priv->clk_iface);
0195     clk_disable_unprepare(priv->clk);
0196
0197     sdhci_free_host(host);
0198     platform_set_drvdata(pdev, NULL);
0199
0200     return 0;
0201 }
0202
0203 #ifdef CONFIG_OF
0204 static const struct of_device_id f_sdh30_dt_ids[] = {
0205     { .compatible = "fujitsu,mb86s70-sdhci-3.0" },
0206     { /* sentinel */ }
0207 };
0208 MODULE_DEVICE_TABLE(of, f_sdh30_dt_ids);
0209 #endif
0210
0211 #ifdef CONFIG_ACPI
0212 static const struct acpi_device_id f_sdh30_acpi_ids[] = {
0213     { "SCX0002" },
0214     { /* sentinel */ }
0215 };
0216 MODULE_DEVICE_TABLE(acpi, f_sdh30_acpi_ids);
0217 #endif
0218
0219 static struct platform_driver sdhci_f_sdh30_driver = {
0220     .driver = {
0221         .name = "f_sdh30",
0222         .probe_type = PROBE_PREFER_ASYNCHRONOUS,
0223         .of_match_table = of_match_ptr(f_sdh30_dt_ids),
0224         .acpi_match_table = ACPI_PTR(f_sdh30_acpi_ids),
0225         .pm = &sdhci_pltfm_pmops,
0226     },
0227     .probe  = sdhci_f_sdh30_probe,
0228     .remove = sdhci_f_sdh30_remove,
0229 };
0230
0231 module_platform_driver(sdhci_f_sdh30_driver);
0232
0233 MODULE_DESCRIPTION("F_SDH30 SD Card Controller driver");
0234 MODULE_LICENSE("GPL v2");
0235 MODULE_AUTHOR("FUJITSU SEMICONDUCTOR LTD.");
0236 MODULE_ALIAS("platform:f_sdh30");