0001
0002
0003
0004
0005
0006
0007
0008
0009
0010 #include <linux/module.h>
0011 #include <linux/slab.h>
0012 #include <linux/delay.h>
0013 #include <linux/platform_device.h>
0014 #include <linux/usb.h>
0015 #include <linux/mmc/host.h>
0016 #include <linux/mmc/mmc.h>
0017 #include <linux/mmc/sd.h>
0018 #include <linux/mmc/card.h>
0019 #include <linux/scatterlist.h>
0020 #include <linux/pm.h>
0021 #include <linux/pm_runtime.h>
0022
0023 #include <linux/rtsx_usb.h>
0024 #include <asm/unaligned.h>
0025
0026 #if defined(CONFIG_LEDS_CLASS) || (defined(CONFIG_LEDS_CLASS_MODULE) && \
0027 defined(CONFIG_MMC_REALTEK_USB_MODULE))
0028 #include <linux/leds.h>
0029 #include <linux/workqueue.h>
0030 #define RTSX_USB_USE_LEDS_CLASS
0031 #endif
0032
0033 struct rtsx_usb_sdmmc {
0034 struct platform_device *pdev;
0035 struct rtsx_ucr *ucr;
0036 struct mmc_host *mmc;
0037 struct mmc_request *mrq;
0038
0039 struct mutex host_mutex;
0040
0041 u8 ssc_depth;
0042 unsigned int clock;
0043 bool vpclk;
0044 bool double_clk;
0045 bool host_removal;
0046 bool card_exist;
0047 bool initial_mode;
0048 bool ddr_mode;
0049
0050 unsigned char power_mode;
0051
0052 #ifdef RTSX_USB_USE_LEDS_CLASS
0053 struct led_classdev led;
0054 char led_name[32];
0055 struct work_struct led_work;
0056 #endif
0057 };
0058
0059 static inline struct device *sdmmc_dev(struct rtsx_usb_sdmmc *host)
0060 {
0061 return &(host->pdev->dev);
0062 }
0063
0064 static inline void sd_clear_error(struct rtsx_usb_sdmmc *host)
0065 {
0066 struct rtsx_ucr *ucr = host->ucr;
0067 rtsx_usb_ep0_write_register(ucr, CARD_STOP,
0068 SD_STOP | SD_CLR_ERR,
0069 SD_STOP | SD_CLR_ERR);
0070
0071 rtsx_usb_clear_dma_err(ucr);
0072 rtsx_usb_clear_fsm_err(ucr);
0073 }
0074
0075 #ifdef DEBUG
0076 static void sd_print_debug_regs(struct rtsx_usb_sdmmc *host)
0077 {
0078 struct rtsx_ucr *ucr = host->ucr;
0079 u8 val = 0;
0080
0081 rtsx_usb_ep0_read_register(ucr, SD_STAT1, &val);
0082 dev_dbg(sdmmc_dev(host), "SD_STAT1: 0x%x\n", val);
0083 rtsx_usb_ep0_read_register(ucr, SD_STAT2, &val);
0084 dev_dbg(sdmmc_dev(host), "SD_STAT2: 0x%x\n", val);
0085 rtsx_usb_ep0_read_register(ucr, SD_BUS_STAT, &val);
0086 dev_dbg(sdmmc_dev(host), "SD_BUS_STAT: 0x%x\n", val);
0087 }
0088 #else
0089 #define sd_print_debug_regs(host)
0090 #endif
0091
0092 static int sd_read_data(struct rtsx_usb_sdmmc *host, struct mmc_command *cmd,
0093 u16 byte_cnt, u8 *buf, int buf_len, int timeout)
0094 {
0095 struct rtsx_ucr *ucr = host->ucr;
0096 int err;
0097 u8 trans_mode;
0098
0099 if (!buf)
0100 buf_len = 0;
0101
0102 rtsx_usb_init_cmd(ucr);
0103 if (cmd != NULL) {
0104 dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD%d\n", __func__
0105 , cmd->opcode);
0106 if (cmd->opcode == MMC_SEND_TUNING_BLOCK)
0107 trans_mode = SD_TM_AUTO_TUNING;
0108 else
0109 trans_mode = SD_TM_NORMAL_READ;
0110
0111 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
0112 SD_CMD0, 0xFF, (u8)(cmd->opcode) | 0x40);
0113 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
0114 SD_CMD1, 0xFF, (u8)(cmd->arg >> 24));
0115 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
0116 SD_CMD2, 0xFF, (u8)(cmd->arg >> 16));
0117 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
0118 SD_CMD3, 0xFF, (u8)(cmd->arg >> 8));
0119 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
0120 SD_CMD4, 0xFF, (u8)cmd->arg);
0121 } else {
0122 trans_mode = SD_TM_AUTO_READ_3;
0123 }
0124
0125 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, (u8)byte_cnt);
0126 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H,
0127 0xFF, (u8)(byte_cnt >> 8));
0128 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L, 0xFF, 1);
0129 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H, 0xFF, 0);
0130
0131 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF,
0132 SD_CALCULATE_CRC7 | SD_CHECK_CRC16 |
0133 SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_6);
0134 if (trans_mode != SD_TM_AUTO_TUNING)
0135 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
0136 CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
0137
0138 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER,
0139 0xFF, trans_mode | SD_TRANSFER_START);
0140 rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
0141 SD_TRANSFER_END, SD_TRANSFER_END);
0142
0143 if (cmd != NULL) {
0144 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD1, 0, 0);
0145 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD2, 0, 0);
0146 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD3, 0, 0);
0147 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD4, 0, 0);
0148 }
0149
0150 err = rtsx_usb_send_cmd(ucr, MODE_CR, timeout);
0151 if (err) {
0152 dev_dbg(sdmmc_dev(host),
0153 "rtsx_usb_send_cmd failed (err = %d)\n", err);
0154 return err;
0155 }
0156
0157 err = rtsx_usb_get_rsp(ucr, !cmd ? 1 : 5, timeout);
0158 if (err || (ucr->rsp_buf[0] & SD_TRANSFER_ERR)) {
0159 sd_print_debug_regs(host);
0160
0161 if (!err) {
0162 dev_dbg(sdmmc_dev(host),
0163 "Transfer failed (SD_TRANSFER = %02x)\n",
0164 ucr->rsp_buf[0]);
0165 err = -EIO;
0166 } else {
0167 dev_dbg(sdmmc_dev(host),
0168 "rtsx_usb_get_rsp failed (err = %d)\n", err);
0169 }
0170
0171 return err;
0172 }
0173
0174 if (cmd != NULL) {
0175 cmd->resp[0] = get_unaligned_be32(ucr->rsp_buf + 1);
0176 dev_dbg(sdmmc_dev(host), "cmd->resp[0] = 0x%08x\n",
0177 cmd->resp[0]);
0178 }
0179
0180 if (buf && buf_len) {
0181
0182 err = rtsx_usb_read_ppbuf(ucr, buf, byte_cnt - (byte_cnt % 2));
0183 if (err) {
0184 dev_dbg(sdmmc_dev(host),
0185 "rtsx_usb_read_ppbuf failed (err = %d)\n", err);
0186 return err;
0187 }
0188
0189
0190 if (byte_cnt % 2)
0191 return rtsx_usb_read_register(ucr,
0192 PPBUF_BASE2 + byte_cnt,
0193 buf + byte_cnt - 1);
0194 }
0195
0196 return 0;
0197 }
0198
0199 static int sd_write_data(struct rtsx_usb_sdmmc *host, struct mmc_command *cmd,
0200 u16 byte_cnt, u8 *buf, int buf_len, int timeout)
0201 {
0202 struct rtsx_ucr *ucr = host->ucr;
0203 int err;
0204 u8 trans_mode;
0205
0206 if (!buf)
0207 buf_len = 0;
0208
0209 if (buf && buf_len) {
0210 err = rtsx_usb_write_ppbuf(ucr, buf, buf_len);
0211 if (err) {
0212 dev_dbg(sdmmc_dev(host),
0213 "rtsx_usb_write_ppbuf failed (err = %d)\n",
0214 err);
0215 return err;
0216 }
0217 }
0218
0219 trans_mode = (cmd != NULL) ? SD_TM_AUTO_WRITE_2 : SD_TM_AUTO_WRITE_3;
0220 rtsx_usb_init_cmd(ucr);
0221
0222 if (cmd != NULL) {
0223 dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD%d\n", __func__,
0224 cmd->opcode);
0225 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
0226 SD_CMD0, 0xFF, (u8)(cmd->opcode) | 0x40);
0227 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
0228 SD_CMD1, 0xFF, (u8)(cmd->arg >> 24));
0229 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
0230 SD_CMD2, 0xFF, (u8)(cmd->arg >> 16));
0231 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
0232 SD_CMD3, 0xFF, (u8)(cmd->arg >> 8));
0233 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
0234 SD_CMD4, 0xFF, (u8)cmd->arg);
0235 }
0236
0237 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, (u8)byte_cnt);
0238 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H,
0239 0xFF, (u8)(byte_cnt >> 8));
0240 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L, 0xFF, 1);
0241 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H, 0xFF, 0);
0242
0243 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF,
0244 SD_CALCULATE_CRC7 | SD_CHECK_CRC16 |
0245 SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_6);
0246 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
0247 CARD_DATA_SOURCE, 0x01, PINGPONG_BUFFER);
0248
0249 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER, 0xFF,
0250 trans_mode | SD_TRANSFER_START);
0251 rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
0252 SD_TRANSFER_END, SD_TRANSFER_END);
0253
0254 if (cmd != NULL) {
0255 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD1, 0, 0);
0256 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD2, 0, 0);
0257 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD3, 0, 0);
0258 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_CMD4, 0, 0);
0259 }
0260
0261 err = rtsx_usb_send_cmd(ucr, MODE_CR, timeout);
0262 if (err) {
0263 dev_dbg(sdmmc_dev(host),
0264 "rtsx_usb_send_cmd failed (err = %d)\n", err);
0265 return err;
0266 }
0267
0268 err = rtsx_usb_get_rsp(ucr, !cmd ? 1 : 5, timeout);
0269 if (err) {
0270 sd_print_debug_regs(host);
0271 dev_dbg(sdmmc_dev(host),
0272 "rtsx_usb_get_rsp failed (err = %d)\n", err);
0273 return err;
0274 }
0275
0276 if (cmd != NULL) {
0277 cmd->resp[0] = get_unaligned_be32(ucr->rsp_buf + 1);
0278 dev_dbg(sdmmc_dev(host), "cmd->resp[0] = 0x%08x\n",
0279 cmd->resp[0]);
0280 }
0281
0282 return 0;
0283 }
0284
0285 static void sd_send_cmd_get_rsp(struct rtsx_usb_sdmmc *host,
0286 struct mmc_command *cmd)
0287 {
0288 struct rtsx_ucr *ucr = host->ucr;
0289 u8 cmd_idx = (u8)cmd->opcode;
0290 u32 arg = cmd->arg;
0291 int err = 0;
0292 int timeout = 100;
0293 int i;
0294 u8 *ptr;
0295 int stat_idx = 0;
0296 int len = 2;
0297 u8 rsp_type;
0298
0299 dev_dbg(sdmmc_dev(host), "%s: SD/MMC CMD %d, arg = 0x%08x\n",
0300 __func__, cmd_idx, arg);
0301
0302
0303
0304
0305
0306
0307
0308
0309 switch (mmc_resp_type(cmd)) {
0310 case MMC_RSP_NONE:
0311 rsp_type = SD_RSP_TYPE_R0;
0312 break;
0313 case MMC_RSP_R1:
0314 rsp_type = SD_RSP_TYPE_R1;
0315 break;
0316 case MMC_RSP_R1_NO_CRC:
0317 rsp_type = SD_RSP_TYPE_R1 | SD_NO_CHECK_CRC7;
0318 break;
0319 case MMC_RSP_R1B:
0320 rsp_type = SD_RSP_TYPE_R1b;
0321 break;
0322 case MMC_RSP_R2:
0323 rsp_type = SD_RSP_TYPE_R2;
0324 break;
0325 case MMC_RSP_R3:
0326 rsp_type = SD_RSP_TYPE_R3;
0327 break;
0328 default:
0329 dev_dbg(sdmmc_dev(host), "cmd->flag is not valid\n");
0330 err = -EINVAL;
0331 goto out;
0332 }
0333
0334 if (rsp_type == SD_RSP_TYPE_R1b)
0335 timeout = cmd->busy_timeout ? cmd->busy_timeout : 3000;
0336
0337 if (cmd->opcode == SD_SWITCH_VOLTAGE) {
0338 err = rtsx_usb_write_register(ucr, SD_BUS_STAT,
0339 SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP,
0340 SD_CLK_TOGGLE_EN);
0341 if (err)
0342 goto out;
0343 }
0344
0345 rtsx_usb_init_cmd(ucr);
0346
0347 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD0, 0xFF, 0x40 | cmd_idx);
0348 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD1, 0xFF, (u8)(arg >> 24));
0349 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD2, 0xFF, (u8)(arg >> 16));
0350 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD3, 0xFF, (u8)(arg >> 8));
0351 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CMD4, 0xFF, (u8)arg);
0352
0353 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF, rsp_type);
0354 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_DATA_SOURCE,
0355 0x01, PINGPONG_BUFFER);
0356 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER,
0357 0xFF, SD_TM_CMD_RSP | SD_TRANSFER_START);
0358 rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
0359 SD_TRANSFER_END | SD_STAT_IDLE,
0360 SD_TRANSFER_END | SD_STAT_IDLE);
0361
0362 if (rsp_type == SD_RSP_TYPE_R2) {
0363
0364 for (i = PPBUF_BASE2; i < PPBUF_BASE2 + 16; i++)
0365 rtsx_usb_add_cmd(ucr, READ_REG_CMD, (u16)i, 0, 0);
0366 stat_idx = 16;
0367 } else if (rsp_type != SD_RSP_TYPE_R0) {
0368
0369 for (i = SD_CMD0; i <= SD_CMD4; i++)
0370 rtsx_usb_add_cmd(ucr, READ_REG_CMD, (u16)i, 0, 0);
0371 stat_idx = 5;
0372 }
0373 len += stat_idx;
0374
0375 rtsx_usb_add_cmd(ucr, READ_REG_CMD, SD_STAT1, 0, 0);
0376
0377 err = rtsx_usb_send_cmd(ucr, MODE_CR, 100);
0378 if (err) {
0379 dev_dbg(sdmmc_dev(host),
0380 "rtsx_usb_send_cmd error (err = %d)\n", err);
0381 goto out;
0382 }
0383
0384 err = rtsx_usb_get_rsp(ucr, len, timeout);
0385 if (err || (ucr->rsp_buf[0] & SD_TRANSFER_ERR)) {
0386 sd_print_debug_regs(host);
0387 sd_clear_error(host);
0388
0389 if (!err) {
0390 dev_dbg(sdmmc_dev(host),
0391 "Transfer failed (SD_TRANSFER = %02x)\n",
0392 ucr->rsp_buf[0]);
0393 err = -EIO;
0394 } else {
0395 dev_dbg(sdmmc_dev(host),
0396 "rtsx_usb_get_rsp failed (err = %d)\n", err);
0397 }
0398
0399 goto out;
0400 }
0401
0402 if (rsp_type == SD_RSP_TYPE_R0) {
0403 err = 0;
0404 goto out;
0405 }
0406
0407
0408 ptr = ucr->rsp_buf + 1;
0409
0410
0411 if ((ptr[0] & 0xC0) != 0) {
0412 err = -EILSEQ;
0413 dev_dbg(sdmmc_dev(host), "Invalid response bit\n");
0414 goto out;
0415 }
0416
0417
0418 if (!(rsp_type & SD_NO_CHECK_CRC7)) {
0419 if (ptr[stat_idx] & SD_CRC7_ERR) {
0420 err = -EILSEQ;
0421 dev_dbg(sdmmc_dev(host), "CRC7 error\n");
0422 goto out;
0423 }
0424 }
0425
0426 if (rsp_type == SD_RSP_TYPE_R2) {
0427
0428
0429
0430
0431
0432 ptr[16] = 1;
0433
0434 for (i = 0; i < 4; i++) {
0435 cmd->resp[i] = get_unaligned_be32(ptr + 1 + i * 4);
0436 dev_dbg(sdmmc_dev(host), "cmd->resp[%d] = 0x%08x\n",
0437 i, cmd->resp[i]);
0438 }
0439 } else {
0440 cmd->resp[0] = get_unaligned_be32(ptr + 1);
0441 dev_dbg(sdmmc_dev(host), "cmd->resp[0] = 0x%08x\n",
0442 cmd->resp[0]);
0443 }
0444
0445 out:
0446 cmd->error = err;
0447 }
0448
0449 static int sd_rw_multi(struct rtsx_usb_sdmmc *host, struct mmc_request *mrq)
0450 {
0451 struct rtsx_ucr *ucr = host->ucr;
0452 struct mmc_data *data = mrq->data;
0453 int read = (data->flags & MMC_DATA_READ) ? 1 : 0;
0454 u8 cfg2, trans_mode;
0455 int err;
0456 u8 flag;
0457 size_t data_len = data->blksz * data->blocks;
0458 unsigned int pipe;
0459
0460 if (read) {
0461 dev_dbg(sdmmc_dev(host), "%s: read %zu bytes\n",
0462 __func__, data_len);
0463 cfg2 = SD_CALCULATE_CRC7 | SD_CHECK_CRC16 |
0464 SD_NO_WAIT_BUSY_END | SD_CHECK_CRC7 | SD_RSP_LEN_0;
0465 trans_mode = SD_TM_AUTO_READ_3;
0466 } else {
0467 dev_dbg(sdmmc_dev(host), "%s: write %zu bytes\n",
0468 __func__, data_len);
0469 cfg2 = SD_NO_CALCULATE_CRC7 | SD_CHECK_CRC16 |
0470 SD_NO_WAIT_BUSY_END | SD_NO_CHECK_CRC7 | SD_RSP_LEN_0;
0471 trans_mode = SD_TM_AUTO_WRITE_3;
0472 }
0473
0474 rtsx_usb_init_cmd(ucr);
0475
0476 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_L, 0xFF, 0x00);
0477 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BYTE_CNT_H, 0xFF, 0x02);
0478 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_L,
0479 0xFF, (u8)data->blocks);
0480 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BLOCK_CNT_H,
0481 0xFF, (u8)(data->blocks >> 8));
0482
0483 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_DATA_SOURCE,
0484 0x01, RING_BUFFER);
0485
0486 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC3,
0487 0xFF, (u8)(data_len >> 24));
0488 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC2,
0489 0xFF, (u8)(data_len >> 16));
0490 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC1,
0491 0xFF, (u8)(data_len >> 8));
0492 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_TC0,
0493 0xFF, (u8)data_len);
0494 if (read) {
0495 flag = MODE_CDIR;
0496 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_CTL,
0497 0x03 | DMA_PACK_SIZE_MASK,
0498 DMA_DIR_FROM_CARD | DMA_EN | DMA_512);
0499 } else {
0500 flag = MODE_CDOR;
0501 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, MC_DMA_CTL,
0502 0x03 | DMA_PACK_SIZE_MASK,
0503 DMA_DIR_TO_CARD | DMA_EN | DMA_512);
0504 }
0505
0506 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG2, 0xFF, cfg2);
0507 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_TRANSFER, 0xFF,
0508 trans_mode | SD_TRANSFER_START);
0509 rtsx_usb_add_cmd(ucr, CHECK_REG_CMD, SD_TRANSFER,
0510 SD_TRANSFER_END, SD_TRANSFER_END);
0511
0512 err = rtsx_usb_send_cmd(ucr, flag, 100);
0513 if (err)
0514 return err;
0515
0516 if (read)
0517 pipe = usb_rcvbulkpipe(ucr->pusb_dev, EP_BULK_IN);
0518 else
0519 pipe = usb_sndbulkpipe(ucr->pusb_dev, EP_BULK_OUT);
0520
0521 err = rtsx_usb_transfer_data(ucr, pipe, data->sg, data_len,
0522 data->sg_len, NULL, 10000);
0523 if (err) {
0524 dev_dbg(sdmmc_dev(host), "rtsx_usb_transfer_data error %d\n"
0525 , err);
0526 sd_clear_error(host);
0527 return err;
0528 }
0529
0530 return rtsx_usb_get_rsp(ucr, 1, 2000);
0531 }
0532
0533 static inline void sd_enable_initial_mode(struct rtsx_usb_sdmmc *host)
0534 {
0535 rtsx_usb_write_register(host->ucr, SD_CFG1,
0536 SD_CLK_DIVIDE_MASK, SD_CLK_DIVIDE_128);
0537 }
0538
0539 static inline void sd_disable_initial_mode(struct rtsx_usb_sdmmc *host)
0540 {
0541 rtsx_usb_write_register(host->ucr, SD_CFG1,
0542 SD_CLK_DIVIDE_MASK, SD_CLK_DIVIDE_0);
0543 }
0544
0545 static void sd_normal_rw(struct rtsx_usb_sdmmc *host,
0546 struct mmc_request *mrq)
0547 {
0548 struct mmc_command *cmd = mrq->cmd;
0549 struct mmc_data *data = mrq->data;
0550 u8 *buf;
0551
0552 buf = kzalloc(data->blksz, GFP_NOIO);
0553 if (!buf) {
0554 cmd->error = -ENOMEM;
0555 return;
0556 }
0557
0558 if (data->flags & MMC_DATA_READ) {
0559 if (host->initial_mode)
0560 sd_disable_initial_mode(host);
0561
0562 cmd->error = sd_read_data(host, cmd, (u16)data->blksz, buf,
0563 data->blksz, 200);
0564
0565 if (host->initial_mode)
0566 sd_enable_initial_mode(host);
0567
0568 sg_copy_from_buffer(data->sg, data->sg_len, buf, data->blksz);
0569 } else {
0570 sg_copy_to_buffer(data->sg, data->sg_len, buf, data->blksz);
0571
0572 cmd->error = sd_write_data(host, cmd, (u16)data->blksz, buf,
0573 data->blksz, 200);
0574 }
0575
0576 kfree(buf);
0577 }
0578
0579 static int sd_change_phase(struct rtsx_usb_sdmmc *host, u8 sample_point, int tx)
0580 {
0581 struct rtsx_ucr *ucr = host->ucr;
0582
0583 dev_dbg(sdmmc_dev(host), "%s: %s sample_point = %d\n",
0584 __func__, tx ? "TX" : "RX", sample_point);
0585
0586 rtsx_usb_init_cmd(ucr);
0587
0588 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CLK_DIV, CLK_CHANGE, CLK_CHANGE);
0589
0590 if (tx)
0591 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL,
0592 0x0F, sample_point);
0593 else
0594 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK1_CTL,
0595 0x0F, sample_point);
0596
0597 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL, PHASE_NOT_RESET, 0);
0598 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_VPCLK0_CTL,
0599 PHASE_NOT_RESET, PHASE_NOT_RESET);
0600 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CLK_DIV, CLK_CHANGE, 0);
0601 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1, SD_ASYNC_FIFO_RST, 0);
0602
0603 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
0604 }
0605
0606 static inline u32 get_phase_point(u32 phase_map, unsigned int idx)
0607 {
0608 idx &= MAX_PHASE;
0609 return phase_map & (1 << idx);
0610 }
0611
0612 static int get_phase_len(u32 phase_map, unsigned int idx)
0613 {
0614 int i;
0615
0616 for (i = 0; i < MAX_PHASE + 1; i++) {
0617 if (get_phase_point(phase_map, idx + i) == 0)
0618 return i;
0619 }
0620 return MAX_PHASE + 1;
0621 }
0622
0623 static u8 sd_search_final_phase(struct rtsx_usb_sdmmc *host, u32 phase_map)
0624 {
0625 int start = 0, len = 0;
0626 int start_final = 0, len_final = 0;
0627 u8 final_phase = 0xFF;
0628
0629 if (phase_map == 0) {
0630 dev_dbg(sdmmc_dev(host), "Phase: [map:%x]\n", phase_map);
0631 return final_phase;
0632 }
0633
0634 while (start < MAX_PHASE + 1) {
0635 len = get_phase_len(phase_map, start);
0636 if (len_final < len) {
0637 start_final = start;
0638 len_final = len;
0639 }
0640 start += len ? len : 1;
0641 }
0642
0643 final_phase = (start_final + len_final / 2) & MAX_PHASE;
0644 dev_dbg(sdmmc_dev(host), "Phase: [map:%x] [maxlen:%d] [final:%d]\n",
0645 phase_map, len_final, final_phase);
0646
0647 return final_phase;
0648 }
0649
0650 static void sd_wait_data_idle(struct rtsx_usb_sdmmc *host)
0651 {
0652 int i;
0653 u8 val = 0;
0654
0655 for (i = 0; i < 100; i++) {
0656 rtsx_usb_ep0_read_register(host->ucr, SD_DATA_STATE, &val);
0657 if (val & SD_DATA_IDLE)
0658 return;
0659
0660 usleep_range(100, 1000);
0661 }
0662 }
0663
0664 static int sd_tuning_rx_cmd(struct rtsx_usb_sdmmc *host,
0665 u8 opcode, u8 sample_point)
0666 {
0667 int err;
0668 struct mmc_command cmd = {};
0669
0670 err = sd_change_phase(host, sample_point, 0);
0671 if (err)
0672 return err;
0673
0674 cmd.opcode = MMC_SEND_TUNING_BLOCK;
0675 err = sd_read_data(host, &cmd, 0x40, NULL, 0, 100);
0676 if (err) {
0677
0678 sd_wait_data_idle(host);
0679 sd_clear_error(host);
0680 return err;
0681 }
0682
0683 return 0;
0684 }
0685
0686 static void sd_tuning_phase(struct rtsx_usb_sdmmc *host,
0687 u8 opcode, u16 *phase_map)
0688 {
0689 int err, i;
0690 u16 raw_phase_map = 0;
0691
0692 for (i = MAX_PHASE; i >= 0; i--) {
0693 err = sd_tuning_rx_cmd(host, opcode, (u8)i);
0694 if (!err)
0695 raw_phase_map |= 1 << i;
0696 }
0697
0698 if (phase_map)
0699 *phase_map = raw_phase_map;
0700 }
0701
0702 static int sd_tuning_rx(struct rtsx_usb_sdmmc *host, u8 opcode)
0703 {
0704 int err, i;
0705 u16 raw_phase_map[RX_TUNING_CNT] = {0}, phase_map;
0706 u8 final_phase;
0707
0708
0709 err = sd_change_phase(host, 0x01, 1);
0710 if (err) {
0711 dev_dbg(sdmmc_dev(host), "TX phase setting failed\n");
0712 return err;
0713 }
0714
0715
0716 for (i = 0; i < RX_TUNING_CNT; i++) {
0717 sd_tuning_phase(host, opcode, &(raw_phase_map[i]));
0718
0719 if (raw_phase_map[i] == 0)
0720 break;
0721 }
0722
0723 phase_map = 0xFFFF;
0724 for (i = 0; i < RX_TUNING_CNT; i++) {
0725 dev_dbg(sdmmc_dev(host), "RX raw_phase_map[%d] = 0x%04x\n",
0726 i, raw_phase_map[i]);
0727 phase_map &= raw_phase_map[i];
0728 }
0729 dev_dbg(sdmmc_dev(host), "RX phase_map = 0x%04x\n", phase_map);
0730
0731 if (phase_map) {
0732 final_phase = sd_search_final_phase(host, phase_map);
0733 if (final_phase == 0xFF)
0734 return -EINVAL;
0735
0736 err = sd_change_phase(host, final_phase, 0);
0737 if (err)
0738 return err;
0739 } else {
0740 return -EINVAL;
0741 }
0742
0743 return 0;
0744 }
0745
0746 static int sdmmc_get_ro(struct mmc_host *mmc)
0747 {
0748 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
0749 struct rtsx_ucr *ucr = host->ucr;
0750 int err;
0751 u16 val;
0752
0753 if (host->host_removal)
0754 return -ENOMEDIUM;
0755
0756 mutex_lock(&ucr->dev_mutex);
0757
0758
0759 err = rtsx_usb_get_card_status(ucr, &val);
0760
0761 mutex_unlock(&ucr->dev_mutex);
0762
0763
0764
0765 if (err)
0766 return 0;
0767
0768 if (val & SD_WP)
0769 return 1;
0770
0771 return 0;
0772 }
0773
0774 static int sdmmc_get_cd(struct mmc_host *mmc)
0775 {
0776 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
0777 struct rtsx_ucr *ucr = host->ucr;
0778 int err;
0779 u16 val;
0780
0781 if (host->host_removal)
0782 return -ENOMEDIUM;
0783
0784 mutex_lock(&ucr->dev_mutex);
0785
0786
0787 err = rtsx_usb_get_card_status(ucr, &val);
0788
0789 mutex_unlock(&ucr->dev_mutex);
0790
0791
0792 if (err)
0793 goto no_card;
0794
0795 if (val & SD_CD) {
0796 host->card_exist = true;
0797 return 1;
0798 }
0799
0800 no_card:
0801 host->card_exist = false;
0802 return 0;
0803 }
0804
0805 static void sdmmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
0806 {
0807 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
0808 struct rtsx_ucr *ucr = host->ucr;
0809 struct mmc_command *cmd = mrq->cmd;
0810 struct mmc_data *data = mrq->data;
0811 unsigned int data_size = 0;
0812
0813 dev_dbg(sdmmc_dev(host), "%s\n", __func__);
0814
0815 if (host->host_removal) {
0816 cmd->error = -ENOMEDIUM;
0817 goto finish;
0818 }
0819
0820 if ((!host->card_exist)) {
0821 cmd->error = -ENOMEDIUM;
0822 goto finish_detect_card;
0823 }
0824
0825 mutex_lock(&ucr->dev_mutex);
0826
0827 mutex_lock(&host->host_mutex);
0828 host->mrq = mrq;
0829 mutex_unlock(&host->host_mutex);
0830
0831 if (mrq->data)
0832 data_size = data->blocks * data->blksz;
0833
0834 if (!data_size) {
0835 sd_send_cmd_get_rsp(host, cmd);
0836 } else if ((!(data_size % 512) && cmd->opcode != MMC_SEND_EXT_CSD) ||
0837 mmc_op_multi(cmd->opcode)) {
0838 sd_send_cmd_get_rsp(host, cmd);
0839
0840 if (!cmd->error) {
0841 sd_rw_multi(host, mrq);
0842
0843 if (mmc_op_multi(cmd->opcode) && mrq->stop) {
0844 sd_send_cmd_get_rsp(host, mrq->stop);
0845 rtsx_usb_write_register(ucr, MC_FIFO_CTL,
0846 FIFO_FLUSH, FIFO_FLUSH);
0847 }
0848 }
0849 } else {
0850 sd_normal_rw(host, mrq);
0851 }
0852
0853 if (mrq->data) {
0854 if (cmd->error || data->error)
0855 data->bytes_xfered = 0;
0856 else
0857 data->bytes_xfered = data->blocks * data->blksz;
0858 }
0859
0860 mutex_unlock(&ucr->dev_mutex);
0861
0862 finish_detect_card:
0863 if (cmd->error) {
0864
0865
0866
0867
0868 sdmmc_get_cd(mmc);
0869 dev_dbg(sdmmc_dev(host), "cmd->error = %d\n", cmd->error);
0870 }
0871
0872 finish:
0873 mutex_lock(&host->host_mutex);
0874 host->mrq = NULL;
0875 mutex_unlock(&host->host_mutex);
0876
0877 mmc_request_done(mmc, mrq);
0878 }
0879
0880 static int sd_set_bus_width(struct rtsx_usb_sdmmc *host,
0881 unsigned char bus_width)
0882 {
0883 int err = 0;
0884 static const u8 width[] = {
0885 [MMC_BUS_WIDTH_1] = SD_BUS_WIDTH_1BIT,
0886 [MMC_BUS_WIDTH_4] = SD_BUS_WIDTH_4BIT,
0887 [MMC_BUS_WIDTH_8] = SD_BUS_WIDTH_8BIT,
0888 };
0889
0890 if (bus_width <= MMC_BUS_WIDTH_8)
0891 err = rtsx_usb_write_register(host->ucr, SD_CFG1,
0892 0x03, width[bus_width]);
0893
0894 return err;
0895 }
0896
0897 static int sd_pull_ctl_disable_lqfp48(struct rtsx_ucr *ucr)
0898 {
0899 rtsx_usb_init_cmd(ucr);
0900
0901 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0x55);
0902 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x55);
0903 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0x95);
0904 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
0905 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x55);
0906 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0xA5);
0907
0908 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
0909 }
0910
0911 static int sd_pull_ctl_disable_qfn24(struct rtsx_ucr *ucr)
0912 {
0913 rtsx_usb_init_cmd(ucr);
0914
0915 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0x65);
0916 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x55);
0917 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0x95);
0918 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
0919 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x56);
0920 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0x59);
0921
0922 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
0923 }
0924
0925 static int sd_pull_ctl_enable_lqfp48(struct rtsx_ucr *ucr)
0926 {
0927 rtsx_usb_init_cmd(ucr);
0928
0929 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0xAA);
0930 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0xAA);
0931 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0xA9);
0932 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x55);
0933 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x55);
0934 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0xA5);
0935
0936 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
0937 }
0938
0939 static int sd_pull_ctl_enable_qfn24(struct rtsx_ucr *ucr)
0940 {
0941 rtsx_usb_init_cmd(ucr);
0942
0943 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL1, 0xFF, 0xA5);
0944 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL2, 0xFF, 0x9A);
0945 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL3, 0xFF, 0xA5);
0946 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL4, 0xFF, 0x9A);
0947 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL5, 0xFF, 0x65);
0948 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PULL_CTL6, 0xFF, 0x5A);
0949
0950 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
0951 }
0952
0953 static int sd_power_on(struct rtsx_usb_sdmmc *host)
0954 {
0955 struct rtsx_ucr *ucr = host->ucr;
0956 int err;
0957
0958 dev_dbg(sdmmc_dev(host), "%s\n", __func__);
0959 rtsx_usb_init_cmd(ucr);
0960 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_SELECT, 0x07, SD_MOD_SEL);
0961 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_SHARE_MODE,
0962 CARD_SHARE_MASK, CARD_SHARE_SD);
0963 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_EN,
0964 SD_CLK_EN, SD_CLK_EN);
0965 err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
0966 if (err)
0967 return err;
0968
0969 if (CHECK_PKG(ucr, LQFP48))
0970 err = sd_pull_ctl_enable_lqfp48(ucr);
0971 else
0972 err = sd_pull_ctl_enable_qfn24(ucr);
0973 if (err)
0974 return err;
0975
0976 err = rtsx_usb_write_register(ucr, CARD_PWR_CTL,
0977 POWER_MASK, PARTIAL_POWER_ON);
0978 if (err)
0979 return err;
0980
0981 usleep_range(800, 1000);
0982
0983 rtsx_usb_init_cmd(ucr);
0984 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL,
0985 POWER_MASK|LDO3318_PWR_MASK, POWER_ON|LDO_ON);
0986 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_OE,
0987 SD_OUTPUT_EN, SD_OUTPUT_EN);
0988
0989 return rtsx_usb_send_cmd(ucr, MODE_C, 100);
0990 }
0991
0992 static int sd_power_off(struct rtsx_usb_sdmmc *host)
0993 {
0994 struct rtsx_ucr *ucr = host->ucr;
0995 int err;
0996
0997 dev_dbg(sdmmc_dev(host), "%s\n", __func__);
0998 rtsx_usb_init_cmd(ucr);
0999
1000 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_EN, SD_CLK_EN, 0);
1001 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_OE, SD_OUTPUT_EN, 0);
1002 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL,
1003 POWER_MASK, POWER_OFF);
1004 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_PWR_CTL,
1005 POWER_MASK|LDO3318_PWR_MASK, POWER_OFF|LDO_SUSPEND);
1006
1007 err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
1008 if (err)
1009 return err;
1010
1011 if (CHECK_PKG(ucr, LQFP48))
1012 return sd_pull_ctl_disable_lqfp48(ucr);
1013 return sd_pull_ctl_disable_qfn24(ucr);
1014 }
1015
1016 static int sd_set_power_mode(struct rtsx_usb_sdmmc *host,
1017 unsigned char power_mode)
1018 {
1019 int err;
1020
1021 if (power_mode != MMC_POWER_OFF)
1022 power_mode = MMC_POWER_ON;
1023
1024 if (power_mode == host->power_mode)
1025 return 0;
1026
1027 if (power_mode == MMC_POWER_OFF) {
1028 err = sd_power_off(host);
1029 pm_runtime_put_noidle(sdmmc_dev(host));
1030 } else {
1031 pm_runtime_get_noresume(sdmmc_dev(host));
1032 err = sd_power_on(host);
1033 }
1034
1035 if (!err)
1036 host->power_mode = power_mode;
1037
1038 return err;
1039 }
1040
1041 static int sd_set_timing(struct rtsx_usb_sdmmc *host,
1042 unsigned char timing, bool *ddr_mode)
1043 {
1044 struct rtsx_ucr *ucr = host->ucr;
1045 int err;
1046
1047 *ddr_mode = false;
1048
1049 rtsx_usb_init_cmd(ucr);
1050
1051 switch (timing) {
1052 case MMC_TIMING_UHS_SDR104:
1053 case MMC_TIMING_UHS_SDR50:
1054 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1,
1055 0x0C | SD_ASYNC_FIFO_RST,
1056 SD_30_MODE | SD_ASYNC_FIFO_RST);
1057 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
1058 CRC_VAR_CLK0 | SD30_FIX_CLK | SAMPLE_VAR_CLK1);
1059 break;
1060
1061 case MMC_TIMING_UHS_DDR50:
1062 *ddr_mode = true;
1063
1064 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1,
1065 0x0C | SD_ASYNC_FIFO_RST,
1066 SD_DDR_MODE | SD_ASYNC_FIFO_RST);
1067 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
1068 CRC_VAR_CLK0 | SD30_FIX_CLK | SAMPLE_VAR_CLK1);
1069 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PUSH_POINT_CTL,
1070 DDR_VAR_TX_CMD_DAT, DDR_VAR_TX_CMD_DAT);
1071 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,
1072 DDR_VAR_RX_DAT | DDR_VAR_RX_CMD,
1073 DDR_VAR_RX_DAT | DDR_VAR_RX_CMD);
1074 break;
1075
1076 case MMC_TIMING_MMC_HS:
1077 case MMC_TIMING_SD_HS:
1078 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_CFG1,
1079 0x0C, SD_20_MODE);
1080 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
1081 CRC_FIX_CLK | SD30_VAR_CLK0 | SAMPLE_VAR_CLK1);
1082 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PUSH_POINT_CTL,
1083 SD20_TX_SEL_MASK, SD20_TX_14_AHEAD);
1084 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,
1085 SD20_RX_SEL_MASK, SD20_RX_14_DELAY);
1086 break;
1087
1088 default:
1089 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
1090 SD_CFG1, 0x0C, SD_20_MODE);
1091 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, CARD_CLK_SOURCE, 0xFF,
1092 CRC_FIX_CLK | SD30_VAR_CLK0 | SAMPLE_VAR_CLK1);
1093 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD,
1094 SD_PUSH_POINT_CTL, 0xFF, 0);
1095 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_SAMPLE_POINT_CTL,
1096 SD20_RX_SEL_MASK, SD20_RX_POS_EDGE);
1097 break;
1098 }
1099
1100 err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
1101
1102 return err;
1103 }
1104
1105 static void sdmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
1106 {
1107 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
1108 struct rtsx_ucr *ucr = host->ucr;
1109
1110 dev_dbg(sdmmc_dev(host), "%s\n", __func__);
1111 mutex_lock(&ucr->dev_mutex);
1112
1113 sd_set_power_mode(host, ios->power_mode);
1114 sd_set_bus_width(host, ios->bus_width);
1115 sd_set_timing(host, ios->timing, &host->ddr_mode);
1116
1117 host->vpclk = false;
1118 host->double_clk = true;
1119
1120 switch (ios->timing) {
1121 case MMC_TIMING_UHS_SDR104:
1122 case MMC_TIMING_UHS_SDR50:
1123 host->ssc_depth = SSC_DEPTH_2M;
1124 host->vpclk = true;
1125 host->double_clk = false;
1126 break;
1127 case MMC_TIMING_UHS_DDR50:
1128 case MMC_TIMING_UHS_SDR25:
1129 host->ssc_depth = SSC_DEPTH_1M;
1130 break;
1131 default:
1132 host->ssc_depth = SSC_DEPTH_512K;
1133 break;
1134 }
1135
1136 host->initial_mode = (ios->clock <= 1000000) ? true : false;
1137 host->clock = ios->clock;
1138
1139 rtsx_usb_switch_clock(host->ucr, host->clock, host->ssc_depth,
1140 host->initial_mode, host->double_clk, host->vpclk);
1141
1142 mutex_unlock(&ucr->dev_mutex);
1143 dev_dbg(sdmmc_dev(host), "%s end\n", __func__);
1144 }
1145
1146 static int sdmmc_switch_voltage(struct mmc_host *mmc, struct mmc_ios *ios)
1147 {
1148 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
1149 struct rtsx_ucr *ucr = host->ucr;
1150 int err = 0;
1151
1152 dev_dbg(sdmmc_dev(host), "%s: signal_voltage = %d\n",
1153 __func__, ios->signal_voltage);
1154
1155 if (host->host_removal)
1156 return -ENOMEDIUM;
1157
1158 if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_120)
1159 return -EPERM;
1160
1161 mutex_lock(&ucr->dev_mutex);
1162
1163 err = rtsx_usb_card_exclusive_check(ucr, RTSX_USB_SD_CARD);
1164 if (err) {
1165 mutex_unlock(&ucr->dev_mutex);
1166 return err;
1167 }
1168
1169
1170
1171
1172 rtsx_usb_init_cmd(ucr);
1173
1174 if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330) {
1175 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PAD_CTL,
1176 SD_IO_USING_1V8, SD_IO_USING_3V3);
1177 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, LDO_POWER_CFG,
1178 TUNE_SD18_MASK, TUNE_SD18_3V3);
1179 } else {
1180 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_BUS_STAT,
1181 SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP,
1182 SD_CLK_FORCE_STOP);
1183 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, SD_PAD_CTL,
1184 SD_IO_USING_1V8, SD_IO_USING_1V8);
1185 rtsx_usb_add_cmd(ucr, WRITE_REG_CMD, LDO_POWER_CFG,
1186 TUNE_SD18_MASK, TUNE_SD18_1V8);
1187 }
1188
1189 err = rtsx_usb_send_cmd(ucr, MODE_C, 100);
1190 mutex_unlock(&ucr->dev_mutex);
1191
1192 return err;
1193 }
1194
1195 static int sdmmc_card_busy(struct mmc_host *mmc)
1196 {
1197 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
1198 struct rtsx_ucr *ucr = host->ucr;
1199 int err;
1200 u8 stat;
1201 u8 mask = SD_DAT3_STATUS | SD_DAT2_STATUS | SD_DAT1_STATUS
1202 | SD_DAT0_STATUS;
1203
1204 dev_dbg(sdmmc_dev(host), "%s\n", __func__);
1205
1206 mutex_lock(&ucr->dev_mutex);
1207
1208 err = rtsx_usb_write_register(ucr, SD_BUS_STAT,
1209 SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP,
1210 SD_CLK_TOGGLE_EN);
1211 if (err)
1212 goto out;
1213
1214 mdelay(1);
1215
1216 err = rtsx_usb_read_register(ucr, SD_BUS_STAT, &stat);
1217 if (err)
1218 goto out;
1219
1220 err = rtsx_usb_write_register(ucr, SD_BUS_STAT,
1221 SD_CLK_TOGGLE_EN | SD_CLK_FORCE_STOP, 0);
1222 out:
1223 mutex_unlock(&ucr->dev_mutex);
1224
1225 if (err)
1226 return err;
1227
1228
1229 if ((stat & mask) != mask)
1230 return 1;
1231 else
1232 return 0;
1233 }
1234
1235 static int sdmmc_execute_tuning(struct mmc_host *mmc, u32 opcode)
1236 {
1237 struct rtsx_usb_sdmmc *host = mmc_priv(mmc);
1238 struct rtsx_ucr *ucr = host->ucr;
1239 int err = 0;
1240
1241 if (host->host_removal)
1242 return -ENOMEDIUM;
1243
1244 mutex_lock(&ucr->dev_mutex);
1245
1246 if (!host->ddr_mode)
1247 err = sd_tuning_rx(host, MMC_SEND_TUNING_BLOCK);
1248
1249 mutex_unlock(&ucr->dev_mutex);
1250
1251 return err;
1252 }
1253
1254 static const struct mmc_host_ops rtsx_usb_sdmmc_ops = {
1255 .request = sdmmc_request,
1256 .set_ios = sdmmc_set_ios,
1257 .get_ro = sdmmc_get_ro,
1258 .get_cd = sdmmc_get_cd,
1259 .start_signal_voltage_switch = sdmmc_switch_voltage,
1260 .card_busy = sdmmc_card_busy,
1261 .execute_tuning = sdmmc_execute_tuning,
1262 };
1263
1264 #ifdef RTSX_USB_USE_LEDS_CLASS
1265 static void rtsx_usb_led_control(struct led_classdev *led,
1266 enum led_brightness brightness)
1267 {
1268 struct rtsx_usb_sdmmc *host = container_of(led,
1269 struct rtsx_usb_sdmmc, led);
1270
1271 if (host->host_removal)
1272 return;
1273
1274 host->led.brightness = brightness;
1275 schedule_work(&host->led_work);
1276 }
1277
1278 static void rtsx_usb_update_led(struct work_struct *work)
1279 {
1280 struct rtsx_usb_sdmmc *host =
1281 container_of(work, struct rtsx_usb_sdmmc, led_work);
1282 struct rtsx_ucr *ucr = host->ucr;
1283
1284 pm_runtime_get_noresume(sdmmc_dev(host));
1285 mutex_lock(&ucr->dev_mutex);
1286
1287 if (host->power_mode == MMC_POWER_OFF)
1288 goto out;
1289
1290 if (host->led.brightness == LED_OFF)
1291 rtsx_usb_turn_off_led(ucr);
1292 else
1293 rtsx_usb_turn_on_led(ucr);
1294
1295 out:
1296 mutex_unlock(&ucr->dev_mutex);
1297 pm_runtime_put_sync_suspend(sdmmc_dev(host));
1298 }
1299 #endif
1300
1301 static void rtsx_usb_init_host(struct rtsx_usb_sdmmc *host)
1302 {
1303 struct mmc_host *mmc = host->mmc;
1304
1305 mmc->f_min = 250000;
1306 mmc->f_max = 208000000;
1307 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34 | MMC_VDD_165_195;
1308 mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SD_HIGHSPEED |
1309 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_BUS_WIDTH_TEST |
1310 MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 | MMC_CAP_UHS_SDR50 |
1311 MMC_CAP_SYNC_RUNTIME_PM;
1312 mmc->caps2 = MMC_CAP2_NO_PRESCAN_POWERUP | MMC_CAP2_FULL_PWR_CYCLE |
1313 MMC_CAP2_NO_SDIO;
1314
1315 mmc->max_current_330 = 400;
1316 mmc->max_current_180 = 800;
1317 mmc->ops = &rtsx_usb_sdmmc_ops;
1318 mmc->max_segs = 256;
1319 mmc->max_seg_size = 65536;
1320 mmc->max_blk_size = 512;
1321 mmc->max_blk_count = 65535;
1322 mmc->max_req_size = 524288;
1323
1324 host->power_mode = MMC_POWER_OFF;
1325 }
1326
1327 static int rtsx_usb_sdmmc_drv_probe(struct platform_device *pdev)
1328 {
1329 struct mmc_host *mmc;
1330 struct rtsx_usb_sdmmc *host;
1331 struct rtsx_ucr *ucr;
1332 #ifdef RTSX_USB_USE_LEDS_CLASS
1333 int err;
1334 #endif
1335
1336 ucr = usb_get_intfdata(to_usb_interface(pdev->dev.parent));
1337 if (!ucr)
1338 return -ENXIO;
1339
1340 dev_dbg(&(pdev->dev), ": Realtek USB SD/MMC controller found\n");
1341
1342 mmc = mmc_alloc_host(sizeof(*host), &pdev->dev);
1343 if (!mmc)
1344 return -ENOMEM;
1345
1346 host = mmc_priv(mmc);
1347 host->ucr = ucr;
1348 host->mmc = mmc;
1349 host->pdev = pdev;
1350 platform_set_drvdata(pdev, host);
1351
1352 mutex_init(&host->host_mutex);
1353 rtsx_usb_init_host(host);
1354 pm_runtime_enable(&pdev->dev);
1355
1356 #ifdef RTSX_USB_USE_LEDS_CLASS
1357 snprintf(host->led_name, sizeof(host->led_name),
1358 "%s::", mmc_hostname(mmc));
1359 host->led.name = host->led_name;
1360 host->led.brightness = LED_OFF;
1361 host->led.default_trigger = mmc_hostname(mmc);
1362 host->led.brightness_set = rtsx_usb_led_control;
1363
1364 err = led_classdev_register(mmc_dev(mmc), &host->led);
1365 if (err)
1366 dev_err(&(pdev->dev),
1367 "Failed to register LED device: %d\n", err);
1368 INIT_WORK(&host->led_work, rtsx_usb_update_led);
1369
1370 #endif
1371 mmc_add_host(mmc);
1372
1373 return 0;
1374 }
1375
1376 static int rtsx_usb_sdmmc_drv_remove(struct platform_device *pdev)
1377 {
1378 struct rtsx_usb_sdmmc *host = platform_get_drvdata(pdev);
1379 struct mmc_host *mmc;
1380
1381 if (!host)
1382 return 0;
1383
1384 mmc = host->mmc;
1385 host->host_removal = true;
1386
1387 mutex_lock(&host->host_mutex);
1388 if (host->mrq) {
1389 dev_dbg(&(pdev->dev),
1390 "%s: Controller removed during transfer\n",
1391 mmc_hostname(mmc));
1392 host->mrq->cmd->error = -ENOMEDIUM;
1393 if (host->mrq->stop)
1394 host->mrq->stop->error = -ENOMEDIUM;
1395 mmc_request_done(mmc, host->mrq);
1396 }
1397 mutex_unlock(&host->host_mutex);
1398
1399 mmc_remove_host(mmc);
1400
1401 #ifdef RTSX_USB_USE_LEDS_CLASS
1402 cancel_work_sync(&host->led_work);
1403 led_classdev_unregister(&host->led);
1404 #endif
1405
1406 mmc_free_host(mmc);
1407 pm_runtime_disable(&pdev->dev);
1408 platform_set_drvdata(pdev, NULL);
1409
1410 dev_dbg(&(pdev->dev),
1411 ": Realtek USB SD/MMC module has been removed\n");
1412
1413 return 0;
1414 }
1415
1416 #ifdef CONFIG_PM
1417 static int rtsx_usb_sdmmc_runtime_suspend(struct device *dev)
1418 {
1419 struct rtsx_usb_sdmmc *host = dev_get_drvdata(dev);
1420
1421 host->mmc->caps &= ~MMC_CAP_NEEDS_POLL;
1422 return 0;
1423 }
1424
1425 static int rtsx_usb_sdmmc_runtime_resume(struct device *dev)
1426 {
1427 struct rtsx_usb_sdmmc *host = dev_get_drvdata(dev);
1428
1429 host->mmc->caps |= MMC_CAP_NEEDS_POLL;
1430 if (sdmmc_get_cd(host->mmc) == 1)
1431 mmc_detect_change(host->mmc, 0);
1432 return 0;
1433 }
1434 #endif
1435
1436 static const struct dev_pm_ops rtsx_usb_sdmmc_dev_pm_ops = {
1437 SET_RUNTIME_PM_OPS(rtsx_usb_sdmmc_runtime_suspend,
1438 rtsx_usb_sdmmc_runtime_resume, NULL)
1439 };
1440
1441 static const struct platform_device_id rtsx_usb_sdmmc_ids[] = {
1442 {
1443 .name = "rtsx_usb_sdmmc",
1444 }, {
1445
1446 }
1447 };
1448 MODULE_DEVICE_TABLE(platform, rtsx_usb_sdmmc_ids);
1449
1450 static struct platform_driver rtsx_usb_sdmmc_driver = {
1451 .probe = rtsx_usb_sdmmc_drv_probe,
1452 .remove = rtsx_usb_sdmmc_drv_remove,
1453 .id_table = rtsx_usb_sdmmc_ids,
1454 .driver = {
1455 .name = "rtsx_usb_sdmmc",
1456 .probe_type = PROBE_PREFER_ASYNCHRONOUS,
1457 .pm = &rtsx_usb_sdmmc_dev_pm_ops,
1458 },
1459 };
1460 module_platform_driver(rtsx_usb_sdmmc_driver);
1461
1462 MODULE_LICENSE("GPL v2");
1463 MODULE_AUTHOR("Roger Tseng <rogerable@realtek.com>");
1464 MODULE_DESCRIPTION("Realtek USB SD/MMC Card Host Driver");