mmc/host/pxamci.h

0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 #define MMC_STRPCL  0x0000
0003 #define STOP_CLOCK      (1 << 0)
0004 #define START_CLOCK     (2 << 0)
0005
0006 #define MMC_STAT    0x0004
0007 #define STAT_END_CMD_RES        (1 << 13)
0008 #define STAT_PRG_DONE           (1 << 12)
0009 #define STAT_DATA_TRAN_DONE     (1 << 11)
0010 #define STAT_CLK_EN         (1 << 8)
0011 #define STAT_RECV_FIFO_FULL     (1 << 7)
0012 #define STAT_XMIT_FIFO_EMPTY        (1 << 6)
0013 #define STAT_RES_CRC_ERR        (1 << 5)
0014 #define STAT_SPI_READ_ERROR_TOKEN   (1 << 4)
0015 #define STAT_CRC_READ_ERROR     (1 << 3)
0016 #define STAT_CRC_WRITE_ERROR        (1 << 2)
0017 #define STAT_TIME_OUT_RESPONSE      (1 << 1)
0018 #define STAT_READ_TIME_OUT      (1 << 0)
0019
0020 #define MMC_CLKRT   0x0008      /* 3 bit */
0021
0022 #define MMC_SPI     0x000c
0023 #define SPI_CS_ADDRESS      (1 << 3)
0024 #define SPI_CS_EN       (1 << 2)
0025 #define CRC_ON          (1 << 1)
0026 #define SPI_EN          (1 << 0)
0027
0028 #define MMC_CMDAT   0x0010
0029 #define CMDAT_SDIO_INT_EN   (1 << 11)
0030 #define CMDAT_SD_4DAT       (1 << 8)
0031 #define CMDAT_DMAEN     (1 << 7)
0032 #define CMDAT_INIT      (1 << 6)
0033 #define CMDAT_BUSY      (1 << 5)
0034 #define CMDAT_STREAM        (1 << 4)    /* 1 = stream */
0035 #define CMDAT_WRITE     (1 << 3)    /* 1 = write */
0036 #define CMDAT_DATAEN        (1 << 2)
0037 #define CMDAT_RESP_NONE     (0 << 0)
0038 #define CMDAT_RESP_SHORT    (1 << 0)
0039 #define CMDAT_RESP_R2       (2 << 0)
0040 #define CMDAT_RESP_R3       (3 << 0)
0041
0042 #define MMC_RESTO   0x0014  /* 7 bit */
0043
0044 #define MMC_RDTO    0x0018  /* 16 bit */
0045
0046 #define MMC_BLKLEN  0x001c  /* 10 bit */
0047
0048 #define MMC_NOB     0x0020  /* 16 bit */
0049
0050 #define MMC_PRTBUF  0x0024
0051 #define BUF_PART_FULL       (1 << 0)
0052
0053 #define MMC_I_MASK  0x0028
0054
0055 /*PXA27x MMC interrupts*/
0056 #define SDIO_SUSPEND_ACK    (1 << 12)
0057 #define SDIO_INT            (1 << 11)
0058 #define RD_STALLED          (1 << 10)
0059 #define RES_ERR             (1 << 9)
0060 #define DAT_ERR             (1 << 8)
0061 #define TINT                (1 << 7)
0062
0063 /*PXA2xx MMC interrupts*/
0064 #define TXFIFO_WR_REQ       (1 << 6)
0065 #define RXFIFO_RD_REQ       (1 << 5)
0066 #define CLK_IS_OFF      (1 << 4)
0067 #define STOP_CMD        (1 << 3)
0068 #define END_CMD_RES     (1 << 2)
0069 #define PRG_DONE        (1 << 1)
0070 #define DATA_TRAN_DONE      (1 << 0)
0071
0072 #if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
0073 #define MMC_I_MASK_ALL          0x00001fff
0074 #else
0075 #define MMC_I_MASK_ALL          0x0000007f
0076 #endif
0077
0078 #define MMC_I_REG   0x002c
0079 /* same as MMC_I_MASK */
0080
0081 #define MMC_CMD     0x0030
0082
0083 #define MMC_ARGH    0x0034  /* 16 bit */
0084
0085 #define MMC_ARGL    0x0038  /* 16 bit */
0086
0087 #define MMC_RES     0x003c  /* 16 bit */
0088
0089 #define MMC_RXFIFO  0x0040  /* 8 bit */
0090
0091 #define MMC_TXFIFO  0x0044  /* 8 bit */