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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * Portions copyright (C) 2003 Russell King, PXA MMCI Driver
0004  * Portions copyright (C) 2004-2005 Pierre Ossman, W83L51xD SD/MMC driver
0005  *
0006  * Copyright 2008 Embedded Alley Solutions, Inc.
0007  * Copyright 2009-2011 Freescale Semiconductor, Inc.
0008  */
0009 
0010 #include <linux/kernel.h>
0011 #include <linux/init.h>
0012 #include <linux/ioport.h>
0013 #include <linux/of.h>
0014 #include <linux/of_device.h>
0015 #include <linux/platform_device.h>
0016 #include <linux/delay.h>
0017 #include <linux/interrupt.h>
0018 #include <linux/dma-mapping.h>
0019 #include <linux/dmaengine.h>
0020 #include <linux/dma/mxs-dma.h>
0021 #include <linux/highmem.h>
0022 #include <linux/clk.h>
0023 #include <linux/err.h>
0024 #include <linux/completion.h>
0025 #include <linux/mmc/host.h>
0026 #include <linux/mmc/mmc.h>
0027 #include <linux/mmc/sdio.h>
0028 #include <linux/mmc/slot-gpio.h>
0029 #include <linux/regulator/consumer.h>
0030 #include <linux/module.h>
0031 #include <linux/stmp_device.h>
0032 #include <linux/spi/mxs-spi.h>
0033 
0034 #define DRIVER_NAME "mxs-mmc"
0035 
0036 #define MXS_MMC_IRQ_BITS    (BM_SSP_CTRL1_SDIO_IRQ      | \
0037                  BM_SSP_CTRL1_RESP_ERR_IRQ  | \
0038                  BM_SSP_CTRL1_RESP_TIMEOUT_IRQ  | \
0039                  BM_SSP_CTRL1_DATA_TIMEOUT_IRQ  | \
0040                  BM_SSP_CTRL1_DATA_CRC_IRQ  | \
0041                  BM_SSP_CTRL1_FIFO_UNDERRUN_IRQ | \
0042                  BM_SSP_CTRL1_RECV_TIMEOUT_IRQ  | \
0043                  BM_SSP_CTRL1_FIFO_OVERRUN_IRQ)
0044 
0045 /* card detect polling timeout */
0046 #define MXS_MMC_DETECT_TIMEOUT          (HZ/2)
0047 
0048 struct mxs_mmc_host {
0049     struct mxs_ssp          ssp;
0050 
0051     struct mmc_host         *mmc;
0052     struct mmc_request      *mrq;
0053     struct mmc_command      *cmd;
0054     struct mmc_data         *data;
0055 
0056     unsigned char           bus_width;
0057     spinlock_t          lock;
0058     int             sdio_irq_en;
0059     bool                broken_cd;
0060 };
0061 
0062 static int mxs_mmc_get_cd(struct mmc_host *mmc)
0063 {
0064     struct mxs_mmc_host *host = mmc_priv(mmc);
0065     struct mxs_ssp *ssp = &host->ssp;
0066     int present, ret;
0067 
0068     if (host->broken_cd)
0069         return -ENOSYS;
0070 
0071     ret = mmc_gpio_get_cd(mmc);
0072     if (ret >= 0)
0073         return ret;
0074 
0075     present = mmc->caps & MMC_CAP_NEEDS_POLL ||
0076         !(readl(ssp->base + HW_SSP_STATUS(ssp)) &
0077             BM_SSP_STATUS_CARD_DETECT);
0078 
0079     if (mmc->caps2 & MMC_CAP2_CD_ACTIVE_HIGH)
0080         present = !present;
0081 
0082     return present;
0083 }
0084 
0085 static int mxs_mmc_reset(struct mxs_mmc_host *host)
0086 {
0087     struct mxs_ssp *ssp = &host->ssp;
0088     u32 ctrl0, ctrl1;
0089     int ret;
0090 
0091     ret = stmp_reset_block(ssp->base);
0092     if (ret)
0093         return ret;
0094 
0095     ctrl0 = BM_SSP_CTRL0_IGNORE_CRC;
0096     ctrl1 = BF_SSP(0x3, CTRL1_SSP_MODE) |
0097         BF_SSP(0x7, CTRL1_WORD_LENGTH) |
0098         BM_SSP_CTRL1_DMA_ENABLE |
0099         BM_SSP_CTRL1_POLARITY |
0100         BM_SSP_CTRL1_RECV_TIMEOUT_IRQ_EN |
0101         BM_SSP_CTRL1_DATA_CRC_IRQ_EN |
0102         BM_SSP_CTRL1_DATA_TIMEOUT_IRQ_EN |
0103         BM_SSP_CTRL1_RESP_TIMEOUT_IRQ_EN |
0104         BM_SSP_CTRL1_RESP_ERR_IRQ_EN;
0105 
0106     writel(BF_SSP(0xffff, TIMING_TIMEOUT) |
0107            BF_SSP(2, TIMING_CLOCK_DIVIDE) |
0108            BF_SSP(0, TIMING_CLOCK_RATE),
0109            ssp->base + HW_SSP_TIMING(ssp));
0110 
0111     if (host->sdio_irq_en) {
0112         ctrl0 |= BM_SSP_CTRL0_SDIO_IRQ_CHECK;
0113         ctrl1 |= BM_SSP_CTRL1_SDIO_IRQ_EN;
0114     }
0115 
0116     writel(ctrl0, ssp->base + HW_SSP_CTRL0);
0117     writel(ctrl1, ssp->base + HW_SSP_CTRL1(ssp));
0118     return 0;
0119 }
0120 
0121 static void mxs_mmc_start_cmd(struct mxs_mmc_host *host,
0122                   struct mmc_command *cmd);
0123 
0124 static void mxs_mmc_request_done(struct mxs_mmc_host *host)
0125 {
0126     struct mmc_command *cmd = host->cmd;
0127     struct mmc_data *data = host->data;
0128     struct mmc_request *mrq = host->mrq;
0129     struct mxs_ssp *ssp = &host->ssp;
0130 
0131     if (mmc_resp_type(cmd) & MMC_RSP_PRESENT) {
0132         if (mmc_resp_type(cmd) & MMC_RSP_136) {
0133             cmd->resp[3] = readl(ssp->base + HW_SSP_SDRESP0(ssp));
0134             cmd->resp[2] = readl(ssp->base + HW_SSP_SDRESP1(ssp));
0135             cmd->resp[1] = readl(ssp->base + HW_SSP_SDRESP2(ssp));
0136             cmd->resp[0] = readl(ssp->base + HW_SSP_SDRESP3(ssp));
0137         } else {
0138             cmd->resp[0] = readl(ssp->base + HW_SSP_SDRESP0(ssp));
0139         }
0140     }
0141 
0142     if (cmd == mrq->sbc) {
0143         /* Finished CMD23, now send actual command. */
0144         mxs_mmc_start_cmd(host, mrq->cmd);
0145         return;
0146     } else if (data) {
0147         dma_unmap_sg(mmc_dev(host->mmc), data->sg,
0148                  data->sg_len, ssp->dma_dir);
0149         /*
0150          * If there was an error on any block, we mark all
0151          * data blocks as being in error.
0152          */
0153         if (!data->error)
0154             data->bytes_xfered = data->blocks * data->blksz;
0155         else
0156             data->bytes_xfered = 0;
0157 
0158         host->data = NULL;
0159         if (data->stop && (data->error || !mrq->sbc)) {
0160             mxs_mmc_start_cmd(host, mrq->stop);
0161             return;
0162         }
0163     }
0164 
0165     host->mrq = NULL;
0166     mmc_request_done(host->mmc, mrq);
0167 }
0168 
0169 static void mxs_mmc_dma_irq_callback(void *param)
0170 {
0171     struct mxs_mmc_host *host = param;
0172 
0173     mxs_mmc_request_done(host);
0174 }
0175 
0176 static irqreturn_t mxs_mmc_irq_handler(int irq, void *dev_id)
0177 {
0178     struct mxs_mmc_host *host = dev_id;
0179     struct mmc_command *cmd = host->cmd;
0180     struct mmc_data *data = host->data;
0181     struct mxs_ssp *ssp = &host->ssp;
0182     u32 stat;
0183 
0184     spin_lock(&host->lock);
0185 
0186     stat = readl(ssp->base + HW_SSP_CTRL1(ssp));
0187     writel(stat & MXS_MMC_IRQ_BITS,
0188            ssp->base + HW_SSP_CTRL1(ssp) + STMP_OFFSET_REG_CLR);
0189 
0190     spin_unlock(&host->lock);
0191 
0192     if ((stat & BM_SSP_CTRL1_SDIO_IRQ) && (stat & BM_SSP_CTRL1_SDIO_IRQ_EN))
0193         mmc_signal_sdio_irq(host->mmc);
0194 
0195     if (stat & BM_SSP_CTRL1_RESP_TIMEOUT_IRQ)
0196         cmd->error = -ETIMEDOUT;
0197     else if (stat & BM_SSP_CTRL1_RESP_ERR_IRQ)
0198         cmd->error = -EIO;
0199 
0200     if (data) {
0201         if (stat & (BM_SSP_CTRL1_DATA_TIMEOUT_IRQ |
0202                 BM_SSP_CTRL1_RECV_TIMEOUT_IRQ))
0203             data->error = -ETIMEDOUT;
0204         else if (stat & BM_SSP_CTRL1_DATA_CRC_IRQ)
0205             data->error = -EILSEQ;
0206         else if (stat & (BM_SSP_CTRL1_FIFO_UNDERRUN_IRQ |
0207                  BM_SSP_CTRL1_FIFO_OVERRUN_IRQ))
0208             data->error = -EIO;
0209     }
0210 
0211     return IRQ_HANDLED;
0212 }
0213 
0214 static struct dma_async_tx_descriptor *mxs_mmc_prep_dma(
0215     struct mxs_mmc_host *host, unsigned long flags)
0216 {
0217     struct mxs_ssp *ssp = &host->ssp;
0218     struct dma_async_tx_descriptor *desc;
0219     struct mmc_data *data = host->data;
0220     struct scatterlist * sgl;
0221     unsigned int sg_len;
0222 
0223     if (data) {
0224         /* data */
0225         dma_map_sg(mmc_dev(host->mmc), data->sg,
0226                data->sg_len, ssp->dma_dir);
0227         sgl = data->sg;
0228         sg_len = data->sg_len;
0229     } else {
0230         /* pio */
0231         sgl = (struct scatterlist *) ssp->ssp_pio_words;
0232         sg_len = SSP_PIO_NUM;
0233     }
0234 
0235     desc = dmaengine_prep_slave_sg(ssp->dmach,
0236                 sgl, sg_len, ssp->slave_dirn, flags);
0237     if (desc) {
0238         desc->callback = mxs_mmc_dma_irq_callback;
0239         desc->callback_param = host;
0240     } else {
0241         if (data)
0242             dma_unmap_sg(mmc_dev(host->mmc), data->sg,
0243                      data->sg_len, ssp->dma_dir);
0244     }
0245 
0246     return desc;
0247 }
0248 
0249 static void mxs_mmc_bc(struct mxs_mmc_host *host)
0250 {
0251     struct mxs_ssp *ssp = &host->ssp;
0252     struct mmc_command *cmd = host->cmd;
0253     struct dma_async_tx_descriptor *desc;
0254     u32 ctrl0, cmd0, cmd1;
0255 
0256     ctrl0 = BM_SSP_CTRL0_ENABLE | BM_SSP_CTRL0_IGNORE_CRC;
0257     cmd0 = BF_SSP(cmd->opcode, CMD0_CMD) | BM_SSP_CMD0_APPEND_8CYC;
0258     cmd1 = cmd->arg;
0259 
0260     if (host->sdio_irq_en) {
0261         ctrl0 |= BM_SSP_CTRL0_SDIO_IRQ_CHECK;
0262         cmd0 |= BM_SSP_CMD0_CONT_CLKING_EN | BM_SSP_CMD0_SLOW_CLKING_EN;
0263     }
0264 
0265     ssp->ssp_pio_words[0] = ctrl0;
0266     ssp->ssp_pio_words[1] = cmd0;
0267     ssp->ssp_pio_words[2] = cmd1;
0268     ssp->dma_dir = DMA_NONE;
0269     ssp->slave_dirn = DMA_TRANS_NONE;
0270     desc = mxs_mmc_prep_dma(host, MXS_DMA_CTRL_WAIT4END);
0271     if (!desc)
0272         goto out;
0273 
0274     dmaengine_submit(desc);
0275     dma_async_issue_pending(ssp->dmach);
0276     return;
0277 
0278 out:
0279     dev_warn(mmc_dev(host->mmc),
0280          "%s: failed to prep dma\n", __func__);
0281 }
0282 
0283 static void mxs_mmc_ac(struct mxs_mmc_host *host)
0284 {
0285     struct mxs_ssp *ssp = &host->ssp;
0286     struct mmc_command *cmd = host->cmd;
0287     struct dma_async_tx_descriptor *desc;
0288     u32 ignore_crc, get_resp, long_resp;
0289     u32 ctrl0, cmd0, cmd1;
0290 
0291     ignore_crc = (mmc_resp_type(cmd) & MMC_RSP_CRC) ?
0292             0 : BM_SSP_CTRL0_IGNORE_CRC;
0293     get_resp = (mmc_resp_type(cmd) & MMC_RSP_PRESENT) ?
0294             BM_SSP_CTRL0_GET_RESP : 0;
0295     long_resp = (mmc_resp_type(cmd) & MMC_RSP_136) ?
0296             BM_SSP_CTRL0_LONG_RESP : 0;
0297 
0298     ctrl0 = BM_SSP_CTRL0_ENABLE | ignore_crc | get_resp | long_resp;
0299     cmd0 = BF_SSP(cmd->opcode, CMD0_CMD);
0300     cmd1 = cmd->arg;
0301 
0302     if (cmd->opcode == MMC_STOP_TRANSMISSION)
0303         cmd0 |= BM_SSP_CMD0_APPEND_8CYC;
0304 
0305     if (host->sdio_irq_en) {
0306         ctrl0 |= BM_SSP_CTRL0_SDIO_IRQ_CHECK;
0307         cmd0 |= BM_SSP_CMD0_CONT_CLKING_EN | BM_SSP_CMD0_SLOW_CLKING_EN;
0308     }
0309 
0310     ssp->ssp_pio_words[0] = ctrl0;
0311     ssp->ssp_pio_words[1] = cmd0;
0312     ssp->ssp_pio_words[2] = cmd1;
0313     ssp->dma_dir = DMA_NONE;
0314     ssp->slave_dirn = DMA_TRANS_NONE;
0315     desc = mxs_mmc_prep_dma(host, MXS_DMA_CTRL_WAIT4END);
0316     if (!desc)
0317         goto out;
0318 
0319     dmaengine_submit(desc);
0320     dma_async_issue_pending(ssp->dmach);
0321     return;
0322 
0323 out:
0324     dev_warn(mmc_dev(host->mmc),
0325          "%s: failed to prep dma\n", __func__);
0326 }
0327 
0328 static unsigned short mxs_ns_to_ssp_ticks(unsigned clock_rate, unsigned ns)
0329 {
0330     const unsigned int ssp_timeout_mul = 4096;
0331     /*
0332      * Calculate ticks in ms since ns are large numbers
0333      * and might overflow
0334      */
0335     const unsigned int clock_per_ms = clock_rate / 1000;
0336     const unsigned int ms = ns / 1000;
0337     const unsigned int ticks = ms * clock_per_ms;
0338     const unsigned int ssp_ticks = ticks / ssp_timeout_mul;
0339 
0340     WARN_ON(ssp_ticks == 0);
0341     return ssp_ticks;
0342 }
0343 
0344 static void mxs_mmc_adtc(struct mxs_mmc_host *host)
0345 {
0346     struct mmc_command *cmd = host->cmd;
0347     struct mmc_data *data = cmd->data;
0348     struct dma_async_tx_descriptor *desc;
0349     struct scatterlist *sgl = data->sg, *sg;
0350     unsigned int sg_len = data->sg_len;
0351     unsigned int i;
0352 
0353     unsigned short dma_data_dir, timeout;
0354     enum dma_transfer_direction slave_dirn;
0355     unsigned int data_size = 0, log2_blksz;
0356     unsigned int blocks = data->blocks;
0357 
0358     struct mxs_ssp *ssp = &host->ssp;
0359 
0360     u32 ignore_crc, get_resp, long_resp, read;
0361     u32 ctrl0, cmd0, cmd1, val;
0362 
0363     ignore_crc = (mmc_resp_type(cmd) & MMC_RSP_CRC) ?
0364             0 : BM_SSP_CTRL0_IGNORE_CRC;
0365     get_resp = (mmc_resp_type(cmd) & MMC_RSP_PRESENT) ?
0366             BM_SSP_CTRL0_GET_RESP : 0;
0367     long_resp = (mmc_resp_type(cmd) & MMC_RSP_136) ?
0368             BM_SSP_CTRL0_LONG_RESP : 0;
0369 
0370     if (data->flags & MMC_DATA_WRITE) {
0371         dma_data_dir = DMA_TO_DEVICE;
0372         slave_dirn = DMA_MEM_TO_DEV;
0373         read = 0;
0374     } else {
0375         dma_data_dir = DMA_FROM_DEVICE;
0376         slave_dirn = DMA_DEV_TO_MEM;
0377         read = BM_SSP_CTRL0_READ;
0378     }
0379 
0380     ctrl0 = BF_SSP(host->bus_width, CTRL0_BUS_WIDTH) |
0381         ignore_crc | get_resp | long_resp |
0382         BM_SSP_CTRL0_DATA_XFER | read |
0383         BM_SSP_CTRL0_WAIT_FOR_IRQ |
0384         BM_SSP_CTRL0_ENABLE;
0385 
0386     cmd0 = BF_SSP(cmd->opcode, CMD0_CMD);
0387 
0388     /* get logarithm to base 2 of block size for setting register */
0389     log2_blksz = ilog2(data->blksz);
0390 
0391     /*
0392      * take special care of the case that data size from data->sg
0393      * is not equal to blocks x blksz
0394      */
0395     for_each_sg(sgl, sg, sg_len, i)
0396         data_size += sg->length;
0397 
0398     if (data_size != data->blocks * data->blksz)
0399         blocks = 1;
0400 
0401     /* xfer count, block size and count need to be set differently */
0402     if (ssp_is_old(ssp)) {
0403         ctrl0 |= BF_SSP(data_size, CTRL0_XFER_COUNT);
0404         cmd0 |= BF_SSP(log2_blksz, CMD0_BLOCK_SIZE) |
0405             BF_SSP(blocks - 1, CMD0_BLOCK_COUNT);
0406     } else {
0407         writel(data_size, ssp->base + HW_SSP_XFER_SIZE);
0408         writel(BF_SSP(log2_blksz, BLOCK_SIZE_BLOCK_SIZE) |
0409                BF_SSP(blocks - 1, BLOCK_SIZE_BLOCK_COUNT),
0410                ssp->base + HW_SSP_BLOCK_SIZE);
0411     }
0412 
0413     if (cmd->opcode == SD_IO_RW_EXTENDED)
0414         cmd0 |= BM_SSP_CMD0_APPEND_8CYC;
0415 
0416     cmd1 = cmd->arg;
0417 
0418     if (host->sdio_irq_en) {
0419         ctrl0 |= BM_SSP_CTRL0_SDIO_IRQ_CHECK;
0420         cmd0 |= BM_SSP_CMD0_CONT_CLKING_EN | BM_SSP_CMD0_SLOW_CLKING_EN;
0421     }
0422 
0423     /* set the timeout count */
0424     timeout = mxs_ns_to_ssp_ticks(ssp->clk_rate, data->timeout_ns);
0425     val = readl(ssp->base + HW_SSP_TIMING(ssp));
0426     val &= ~(BM_SSP_TIMING_TIMEOUT);
0427     val |= BF_SSP(timeout, TIMING_TIMEOUT);
0428     writel(val, ssp->base + HW_SSP_TIMING(ssp));
0429 
0430     /* pio */
0431     ssp->ssp_pio_words[0] = ctrl0;
0432     ssp->ssp_pio_words[1] = cmd0;
0433     ssp->ssp_pio_words[2] = cmd1;
0434     ssp->dma_dir = DMA_NONE;
0435     ssp->slave_dirn = DMA_TRANS_NONE;
0436     desc = mxs_mmc_prep_dma(host, 0);
0437     if (!desc)
0438         goto out;
0439 
0440     /* append data sg */
0441     WARN_ON(host->data != NULL);
0442     host->data = data;
0443     ssp->dma_dir = dma_data_dir;
0444     ssp->slave_dirn = slave_dirn;
0445     desc = mxs_mmc_prep_dma(host, DMA_PREP_INTERRUPT | MXS_DMA_CTRL_WAIT4END);
0446     if (!desc)
0447         goto out;
0448 
0449     dmaengine_submit(desc);
0450     dma_async_issue_pending(ssp->dmach);
0451     return;
0452 out:
0453     dev_warn(mmc_dev(host->mmc),
0454          "%s: failed to prep dma\n", __func__);
0455 }
0456 
0457 static void mxs_mmc_start_cmd(struct mxs_mmc_host *host,
0458                   struct mmc_command *cmd)
0459 {
0460     host->cmd = cmd;
0461 
0462     switch (mmc_cmd_type(cmd)) {
0463     case MMC_CMD_BC:
0464         mxs_mmc_bc(host);
0465         break;
0466     case MMC_CMD_BCR:
0467         mxs_mmc_ac(host);
0468         break;
0469     case MMC_CMD_AC:
0470         mxs_mmc_ac(host);
0471         break;
0472     case MMC_CMD_ADTC:
0473         mxs_mmc_adtc(host);
0474         break;
0475     default:
0476         dev_warn(mmc_dev(host->mmc),
0477              "%s: unknown MMC command\n", __func__);
0478         break;
0479     }
0480 }
0481 
0482 static void mxs_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
0483 {
0484     struct mxs_mmc_host *host = mmc_priv(mmc);
0485 
0486     WARN_ON(host->mrq != NULL);
0487     host->mrq = mrq;
0488 
0489     if (mrq->sbc)
0490         mxs_mmc_start_cmd(host, mrq->sbc);
0491     else
0492         mxs_mmc_start_cmd(host, mrq->cmd);
0493 }
0494 
0495 static void mxs_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
0496 {
0497     struct mxs_mmc_host *host = mmc_priv(mmc);
0498 
0499     if (ios->bus_width == MMC_BUS_WIDTH_8)
0500         host->bus_width = 2;
0501     else if (ios->bus_width == MMC_BUS_WIDTH_4)
0502         host->bus_width = 1;
0503     else
0504         host->bus_width = 0;
0505 
0506     if (ios->clock)
0507         mxs_ssp_set_clk_rate(&host->ssp, ios->clock);
0508 }
0509 
0510 static void mxs_mmc_enable_sdio_irq(struct mmc_host *mmc, int enable)
0511 {
0512     struct mxs_mmc_host *host = mmc_priv(mmc);
0513     struct mxs_ssp *ssp = &host->ssp;
0514     unsigned long flags;
0515 
0516     spin_lock_irqsave(&host->lock, flags);
0517 
0518     host->sdio_irq_en = enable;
0519 
0520     if (enable) {
0521         writel(BM_SSP_CTRL0_SDIO_IRQ_CHECK,
0522                ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_SET);
0523         writel(BM_SSP_CTRL1_SDIO_IRQ_EN,
0524                ssp->base + HW_SSP_CTRL1(ssp) + STMP_OFFSET_REG_SET);
0525     } else {
0526         writel(BM_SSP_CTRL0_SDIO_IRQ_CHECK,
0527                ssp->base + HW_SSP_CTRL0 + STMP_OFFSET_REG_CLR);
0528         writel(BM_SSP_CTRL1_SDIO_IRQ_EN,
0529                ssp->base + HW_SSP_CTRL1(ssp) + STMP_OFFSET_REG_CLR);
0530     }
0531 
0532     spin_unlock_irqrestore(&host->lock, flags);
0533 
0534     if (enable && readl(ssp->base + HW_SSP_STATUS(ssp)) &
0535             BM_SSP_STATUS_SDIO_IRQ)
0536         mmc_signal_sdio_irq(host->mmc);
0537 
0538 }
0539 
0540 static const struct mmc_host_ops mxs_mmc_ops = {
0541     .request = mxs_mmc_request,
0542     .get_ro = mmc_gpio_get_ro,
0543     .get_cd = mxs_mmc_get_cd,
0544     .set_ios = mxs_mmc_set_ios,
0545     .enable_sdio_irq = mxs_mmc_enable_sdio_irq,
0546 };
0547 
0548 static const struct of_device_id mxs_mmc_dt_ids[] = {
0549     { .compatible = "fsl,imx23-mmc", .data = (void *) IMX23_SSP, },
0550     { .compatible = "fsl,imx28-mmc", .data = (void *) IMX28_SSP, },
0551     { /* sentinel */ }
0552 };
0553 MODULE_DEVICE_TABLE(of, mxs_mmc_dt_ids);
0554 
0555 static void mxs_mmc_regulator_disable(void *regulator)
0556 {
0557     regulator_disable(regulator);
0558 }
0559 
0560 static int mxs_mmc_probe(struct platform_device *pdev)
0561 {
0562     struct device_node *np = pdev->dev.of_node;
0563     struct mxs_mmc_host *host;
0564     struct mmc_host *mmc;
0565     int ret = 0, irq_err;
0566     struct regulator *reg_vmmc;
0567     struct mxs_ssp *ssp;
0568 
0569     irq_err = platform_get_irq(pdev, 0);
0570     if (irq_err < 0)
0571         return irq_err;
0572 
0573     mmc = mmc_alloc_host(sizeof(struct mxs_mmc_host), &pdev->dev);
0574     if (!mmc)
0575         return -ENOMEM;
0576 
0577     host = mmc_priv(mmc);
0578     ssp = &host->ssp;
0579     ssp->dev = &pdev->dev;
0580     ssp->base = devm_platform_ioremap_resource(pdev, 0);
0581     if (IS_ERR(ssp->base)) {
0582         ret = PTR_ERR(ssp->base);
0583         goto out_mmc_free;
0584     }
0585 
0586     ssp->devid = (enum mxs_ssp_id)of_device_get_match_data(&pdev->dev);
0587 
0588     host->mmc = mmc;
0589     host->sdio_irq_en = 0;
0590 
0591     reg_vmmc = devm_regulator_get(&pdev->dev, "vmmc");
0592     if (!IS_ERR(reg_vmmc)) {
0593         ret = regulator_enable(reg_vmmc);
0594         if (ret) {
0595             dev_err(&pdev->dev,
0596                 "Failed to enable vmmc regulator: %d\n", ret);
0597             goto out_mmc_free;
0598         }
0599 
0600         ret = devm_add_action_or_reset(&pdev->dev, mxs_mmc_regulator_disable,
0601                            reg_vmmc);
0602         if (ret)
0603             goto out_mmc_free;
0604     }
0605 
0606     ssp->clk = devm_clk_get(&pdev->dev, NULL);
0607     if (IS_ERR(ssp->clk)) {
0608         ret = PTR_ERR(ssp->clk);
0609         goto out_mmc_free;
0610     }
0611     ret = clk_prepare_enable(ssp->clk);
0612     if (ret)
0613         goto out_mmc_free;
0614 
0615     ret = mxs_mmc_reset(host);
0616     if (ret) {
0617         dev_err(&pdev->dev, "Failed to reset mmc: %d\n", ret);
0618         goto out_clk_disable;
0619     }
0620 
0621     ssp->dmach = dma_request_chan(&pdev->dev, "rx-tx");
0622     if (IS_ERR(ssp->dmach)) {
0623         dev_err(mmc_dev(host->mmc),
0624             "%s: failed to request dma\n", __func__);
0625         ret = PTR_ERR(ssp->dmach);
0626         goto out_clk_disable;
0627     }
0628 
0629     /* set mmc core parameters */
0630     mmc->ops = &mxs_mmc_ops;
0631     mmc->caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED |
0632             MMC_CAP_SDIO_IRQ | MMC_CAP_NEEDS_POLL | MMC_CAP_CMD23;
0633 
0634     host->broken_cd = of_property_read_bool(np, "broken-cd");
0635 
0636     mmc->f_min = 400000;
0637     mmc->f_max = 288000000;
0638 
0639     ret = mmc_of_parse(mmc);
0640     if (ret)
0641         goto out_free_dma;
0642 
0643     mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
0644 
0645     mmc->max_segs = 52;
0646     mmc->max_blk_size = 1 << 0xf;
0647     mmc->max_blk_count = (ssp_is_old(ssp)) ? 0xff : 0xffffff;
0648     mmc->max_req_size = (ssp_is_old(ssp)) ? 0xffff : 0xffffffff;
0649     mmc->max_seg_size = dma_get_max_seg_size(ssp->dmach->device->dev);
0650 
0651     platform_set_drvdata(pdev, mmc);
0652 
0653     spin_lock_init(&host->lock);
0654 
0655     ret = devm_request_irq(&pdev->dev, irq_err, mxs_mmc_irq_handler, 0,
0656                    dev_name(&pdev->dev), host);
0657     if (ret)
0658         goto out_free_dma;
0659 
0660     ret = mmc_add_host(mmc);
0661     if (ret)
0662         goto out_free_dma;
0663 
0664     dev_info(mmc_dev(host->mmc), "initialized\n");
0665 
0666     return 0;
0667 
0668 out_free_dma:
0669     dma_release_channel(ssp->dmach);
0670 out_clk_disable:
0671     clk_disable_unprepare(ssp->clk);
0672 out_mmc_free:
0673     mmc_free_host(mmc);
0674     return ret;
0675 }
0676 
0677 static int mxs_mmc_remove(struct platform_device *pdev)
0678 {
0679     struct mmc_host *mmc = platform_get_drvdata(pdev);
0680     struct mxs_mmc_host *host = mmc_priv(mmc);
0681     struct mxs_ssp *ssp = &host->ssp;
0682 
0683     mmc_remove_host(mmc);
0684 
0685     if (ssp->dmach)
0686         dma_release_channel(ssp->dmach);
0687 
0688     clk_disable_unprepare(ssp->clk);
0689 
0690     mmc_free_host(mmc);
0691 
0692     return 0;
0693 }
0694 
0695 #ifdef CONFIG_PM_SLEEP
0696 static int mxs_mmc_suspend(struct device *dev)
0697 {
0698     struct mmc_host *mmc = dev_get_drvdata(dev);
0699     struct mxs_mmc_host *host = mmc_priv(mmc);
0700     struct mxs_ssp *ssp = &host->ssp;
0701 
0702     clk_disable_unprepare(ssp->clk);
0703     return 0;
0704 }
0705 
0706 static int mxs_mmc_resume(struct device *dev)
0707 {
0708     struct mmc_host *mmc = dev_get_drvdata(dev);
0709     struct mxs_mmc_host *host = mmc_priv(mmc);
0710     struct mxs_ssp *ssp = &host->ssp;
0711 
0712     return clk_prepare_enable(ssp->clk);
0713 }
0714 #endif
0715 
0716 static SIMPLE_DEV_PM_OPS(mxs_mmc_pm_ops, mxs_mmc_suspend, mxs_mmc_resume);
0717 
0718 static struct platform_driver mxs_mmc_driver = {
0719     .probe      = mxs_mmc_probe,
0720     .remove     = mxs_mmc_remove,
0721     .driver     = {
0722         .name   = DRIVER_NAME,
0723         .probe_type = PROBE_PREFER_ASYNCHRONOUS,
0724         .pm = &mxs_mmc_pm_ops,
0725         .of_match_table = mxs_mmc_dt_ids,
0726     },
0727 };
0728 
0729 module_platform_driver(mxs_mmc_driver);
0730 
0731 MODULE_DESCRIPTION("FREESCALE MXS MMC peripheral");
0732 MODULE_AUTHOR("Freescale Semiconductor");
0733 MODULE_LICENSE("GPL");
0734 MODULE_ALIAS("platform:" DRIVER_NAME);
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