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0001 // SPDX-License-Identifier: GPL-2.0
0002 /*
0003  * LiteX LiteSDCard driver
0004  *
0005  * Copyright (C) 2019-2020 Antmicro <contact@antmicro.com>
0006  * Copyright (C) 2019-2020 Kamil Rakoczy <krakoczy@antmicro.com>
0007  * Copyright (C) 2019-2020 Maciej Dudek <mdudek@internships.antmicro.com>
0008  * Copyright (C) 2020 Paul Mackerras <paulus@ozlabs.org>
0009  * Copyright (C) 2020-2022 Gabriel Somlo <gsomlo@gmail.com>
0010  */
0011 
0012 #include <linux/bits.h>
0013 #include <linux/clk.h>
0014 #include <linux/delay.h>
0015 #include <linux/dma-mapping.h>
0016 #include <linux/interrupt.h>
0017 #include <linux/iopoll.h>
0018 #include <linux/litex.h>
0019 #include <linux/mod_devicetable.h>
0020 #include <linux/module.h>
0021 #include <linux/platform_device.h>
0022 
0023 #include <linux/mmc/host.h>
0024 #include <linux/mmc/mmc.h>
0025 #include <linux/mmc/sd.h>
0026 
0027 #define LITEX_PHY_CARDDETECT  0x00
0028 #define LITEX_PHY_CLOCKERDIV  0x04
0029 #define LITEX_PHY_INITIALIZE  0x08
0030 #define LITEX_PHY_WRITESTATUS 0x0C
0031 #define LITEX_CORE_CMDARG     0x00
0032 #define LITEX_CORE_CMDCMD     0x04
0033 #define LITEX_CORE_CMDSND     0x08
0034 #define LITEX_CORE_CMDRSP     0x0C
0035 #define LITEX_CORE_CMDEVT     0x1C
0036 #define LITEX_CORE_DATEVT     0x20
0037 #define LITEX_CORE_BLKLEN     0x24
0038 #define LITEX_CORE_BLKCNT     0x28
0039 #define LITEX_BLK2MEM_BASE    0x00
0040 #define LITEX_BLK2MEM_LEN     0x08
0041 #define LITEX_BLK2MEM_ENA     0x0C
0042 #define LITEX_BLK2MEM_DONE    0x10
0043 #define LITEX_BLK2MEM_LOOP    0x14
0044 #define LITEX_MEM2BLK_BASE    0x00
0045 #define LITEX_MEM2BLK_LEN     0x08
0046 #define LITEX_MEM2BLK_ENA     0x0C
0047 #define LITEX_MEM2BLK_DONE    0x10
0048 #define LITEX_MEM2BLK_LOOP    0x14
0049 #define LITEX_MEM2BLK         0x18
0050 #define LITEX_IRQ_STATUS      0x00
0051 #define LITEX_IRQ_PENDING     0x04
0052 #define LITEX_IRQ_ENABLE      0x08
0053 
0054 #define SD_CTL_DATA_XFER_NONE  0
0055 #define SD_CTL_DATA_XFER_READ  1
0056 #define SD_CTL_DATA_XFER_WRITE 2
0057 
0058 #define SD_CTL_RESP_NONE       0
0059 #define SD_CTL_RESP_SHORT      1
0060 #define SD_CTL_RESP_LONG       2
0061 #define SD_CTL_RESP_SHORT_BUSY 3
0062 
0063 #define SD_BIT_DONE    BIT(0)
0064 #define SD_BIT_WR_ERR  BIT(1)
0065 #define SD_BIT_TIMEOUT BIT(2)
0066 #define SD_BIT_CRC_ERR BIT(3)
0067 
0068 #define SD_SLEEP_US       5
0069 #define SD_TIMEOUT_US 20000
0070 
0071 #define SDIRQ_CARD_DETECT    1
0072 #define SDIRQ_SD_TO_MEM_DONE 2
0073 #define SDIRQ_MEM_TO_SD_DONE 4
0074 #define SDIRQ_CMD_DONE       8
0075 
0076 struct litex_mmc_host {
0077     struct mmc_host *mmc;
0078 
0079     void __iomem *sdphy;
0080     void __iomem *sdcore;
0081     void __iomem *sdreader;
0082     void __iomem *sdwriter;
0083     void __iomem *sdirq;
0084 
0085     void *buffer;
0086     size_t buf_size;
0087     dma_addr_t dma;
0088 
0089     struct completion cmd_done;
0090     int irq;
0091 
0092     unsigned int ref_clk;
0093     unsigned int sd_clk;
0094 
0095     u32 resp[4];
0096     u16 rca;
0097 
0098     bool is_bus_width_set;
0099     bool app_cmd;
0100 };
0101 
0102 static int litex_mmc_sdcard_wait_done(void __iomem *reg, struct device *dev)
0103 {
0104     u8 evt;
0105     int ret;
0106 
0107     ret = readx_poll_timeout(litex_read8, reg, evt, evt & SD_BIT_DONE,
0108                  SD_SLEEP_US, SD_TIMEOUT_US);
0109     if (ret)
0110         return ret;
0111     if (evt == SD_BIT_DONE)
0112         return 0;
0113     if (evt & SD_BIT_WR_ERR)
0114         return -EIO;
0115     if (evt & SD_BIT_TIMEOUT)
0116         return -ETIMEDOUT;
0117     if (evt & SD_BIT_CRC_ERR)
0118         return -EILSEQ;
0119     dev_err(dev, "%s: unknown error (evt=%x)\n", __func__, evt);
0120     return -EINVAL;
0121 }
0122 
0123 static int litex_mmc_send_cmd(struct litex_mmc_host *host,
0124                   u8 cmd, u32 arg, u8 response_len, u8 transfer)
0125 {
0126     struct device *dev = mmc_dev(host->mmc);
0127     void __iomem *reg;
0128     int ret;
0129     u8 evt;
0130 
0131     litex_write32(host->sdcore + LITEX_CORE_CMDARG, arg);
0132     litex_write32(host->sdcore + LITEX_CORE_CMDCMD,
0133               cmd << 8 | transfer << 5 | response_len);
0134     litex_write8(host->sdcore + LITEX_CORE_CMDSND, 1);
0135 
0136     /*
0137      * Wait for an interrupt if we have an interrupt and either there is
0138      * data to be transferred, or if the card can report busy via DAT0.
0139      */
0140     if (host->irq > 0 &&
0141         (transfer != SD_CTL_DATA_XFER_NONE ||
0142          response_len == SD_CTL_RESP_SHORT_BUSY)) {
0143         reinit_completion(&host->cmd_done);
0144         litex_write32(host->sdirq + LITEX_IRQ_ENABLE,
0145                   SDIRQ_CMD_DONE | SDIRQ_CARD_DETECT);
0146         wait_for_completion(&host->cmd_done);
0147     }
0148 
0149     ret = litex_mmc_sdcard_wait_done(host->sdcore + LITEX_CORE_CMDEVT, dev);
0150     if (ret) {
0151         dev_err(dev, "Command (cmd %d) error, status %d\n", cmd, ret);
0152         return ret;
0153     }
0154 
0155     if (response_len != SD_CTL_RESP_NONE) {
0156         /*
0157          * NOTE: this matches the semantics of litex_read32()
0158          * regardless of underlying arch endianness!
0159          */
0160         memcpy_fromio(host->resp,
0161                   host->sdcore + LITEX_CORE_CMDRSP, 0x10);
0162     }
0163 
0164     if (!host->app_cmd && cmd == SD_SEND_RELATIVE_ADDR)
0165         host->rca = (host->resp[3] >> 16);
0166 
0167     host->app_cmd = (cmd == MMC_APP_CMD);
0168 
0169     if (transfer == SD_CTL_DATA_XFER_NONE)
0170         return ret; /* OK from prior litex_mmc_sdcard_wait_done() */
0171 
0172     ret = litex_mmc_sdcard_wait_done(host->sdcore + LITEX_CORE_DATEVT, dev);
0173     if (ret) {
0174         dev_err(dev, "Data xfer (cmd %d) error, status %d\n", cmd, ret);
0175         return ret;
0176     }
0177 
0178     /* Wait for completion of (read or write) DMA transfer */
0179     reg = (transfer == SD_CTL_DATA_XFER_READ) ?
0180         host->sdreader + LITEX_BLK2MEM_DONE :
0181         host->sdwriter + LITEX_MEM2BLK_DONE;
0182     ret = readx_poll_timeout(litex_read8, reg, evt, evt & SD_BIT_DONE,
0183                  SD_SLEEP_US, SD_TIMEOUT_US);
0184     if (ret)
0185         dev_err(dev, "DMA timeout (cmd %d)\n", cmd);
0186 
0187     return ret;
0188 }
0189 
0190 static int litex_mmc_send_app_cmd(struct litex_mmc_host *host)
0191 {
0192     return litex_mmc_send_cmd(host, MMC_APP_CMD, host->rca << 16,
0193                   SD_CTL_RESP_SHORT, SD_CTL_DATA_XFER_NONE);
0194 }
0195 
0196 static int litex_mmc_send_set_bus_w_cmd(struct litex_mmc_host *host, u32 width)
0197 {
0198     return litex_mmc_send_cmd(host, SD_APP_SET_BUS_WIDTH, width,
0199                   SD_CTL_RESP_SHORT, SD_CTL_DATA_XFER_NONE);
0200 }
0201 
0202 static int litex_mmc_set_bus_width(struct litex_mmc_host *host)
0203 {
0204     bool app_cmd_sent;
0205     int ret;
0206 
0207     if (host->is_bus_width_set)
0208         return 0;
0209 
0210     /* Ensure 'app_cmd' precedes 'app_set_bus_width_cmd' */
0211     app_cmd_sent = host->app_cmd; /* was preceding command app_cmd? */
0212     if (!app_cmd_sent) {
0213         ret = litex_mmc_send_app_cmd(host);
0214         if (ret)
0215             return ret;
0216     }
0217 
0218     /* LiteSDCard only supports 4-bit bus width */
0219     ret = litex_mmc_send_set_bus_w_cmd(host, MMC_BUS_WIDTH_4);
0220     if (ret)
0221         return ret;
0222 
0223     /* Re-send 'app_cmd' if necessary */
0224     if (app_cmd_sent) {
0225         ret = litex_mmc_send_app_cmd(host);
0226         if (ret)
0227             return ret;
0228     }
0229 
0230     host->is_bus_width_set = true;
0231 
0232     return 0;
0233 }
0234 
0235 static int litex_mmc_get_cd(struct mmc_host *mmc)
0236 {
0237     struct litex_mmc_host *host = mmc_priv(mmc);
0238     int ret;
0239 
0240     if (!mmc_card_is_removable(mmc))
0241         return 1;
0242 
0243     ret = !litex_read8(host->sdphy + LITEX_PHY_CARDDETECT);
0244     if (ret)
0245         return ret;
0246 
0247     /* Ensure bus width will be set (again) upon card (re)insertion */
0248     host->is_bus_width_set = false;
0249 
0250     return 0;
0251 }
0252 
0253 static irqreturn_t litex_mmc_interrupt(int irq, void *arg)
0254 {
0255     struct mmc_host *mmc = arg;
0256     struct litex_mmc_host *host = mmc_priv(mmc);
0257     u32 pending = litex_read32(host->sdirq + LITEX_IRQ_PENDING);
0258     irqreturn_t ret = IRQ_NONE;
0259 
0260     /* Check for card change interrupt */
0261     if (pending & SDIRQ_CARD_DETECT) {
0262         litex_write32(host->sdirq + LITEX_IRQ_PENDING,
0263                   SDIRQ_CARD_DETECT);
0264         mmc_detect_change(mmc, msecs_to_jiffies(10));
0265         ret = IRQ_HANDLED;
0266     }
0267 
0268     /* Check for command completed */
0269     if (pending & SDIRQ_CMD_DONE) {
0270         /* Disable it so it doesn't keep interrupting */
0271         litex_write32(host->sdirq + LITEX_IRQ_ENABLE,
0272                   SDIRQ_CARD_DETECT);
0273         complete(&host->cmd_done);
0274         ret = IRQ_HANDLED;
0275     }
0276 
0277     return ret;
0278 }
0279 
0280 static u32 litex_mmc_response_len(struct mmc_command *cmd)
0281 {
0282     if (cmd->flags & MMC_RSP_136)
0283         return SD_CTL_RESP_LONG;
0284     if (!(cmd->flags & MMC_RSP_PRESENT))
0285         return SD_CTL_RESP_NONE;
0286     if (cmd->flags & MMC_RSP_BUSY)
0287         return SD_CTL_RESP_SHORT_BUSY;
0288     return SD_CTL_RESP_SHORT;
0289 }
0290 
0291 static void litex_mmc_do_dma(struct litex_mmc_host *host, struct mmc_data *data,
0292                  unsigned int *len, bool *direct, u8 *transfer)
0293 {
0294     struct device *dev = mmc_dev(host->mmc);
0295     dma_addr_t dma;
0296     int sg_count;
0297 
0298     /*
0299      * Try to DMA directly to/from the data buffer.
0300      * We can do that if the buffer can be mapped for DMA
0301      * in one contiguous chunk.
0302      */
0303     dma = host->dma;
0304     *len = data->blksz * data->blocks;
0305     sg_count = dma_map_sg(dev, data->sg, data->sg_len,
0306                   mmc_get_dma_dir(data));
0307     if (sg_count == 1) {
0308         dma = sg_dma_address(data->sg);
0309         *len = sg_dma_len(data->sg);
0310         *direct = true;
0311     } else if (*len > host->buf_size)
0312         *len = host->buf_size;
0313 
0314     if (data->flags & MMC_DATA_READ) {
0315         litex_write8(host->sdreader + LITEX_BLK2MEM_ENA, 0);
0316         litex_write64(host->sdreader + LITEX_BLK2MEM_BASE, dma);
0317         litex_write32(host->sdreader + LITEX_BLK2MEM_LEN, *len);
0318         litex_write8(host->sdreader + LITEX_BLK2MEM_ENA, 1);
0319         *transfer = SD_CTL_DATA_XFER_READ;
0320     } else if (data->flags & MMC_DATA_WRITE) {
0321         if (!*direct)
0322             sg_copy_to_buffer(data->sg, data->sg_len,
0323                       host->buffer, *len);
0324         litex_write8(host->sdwriter + LITEX_MEM2BLK_ENA, 0);
0325         litex_write64(host->sdwriter + LITEX_MEM2BLK_BASE, dma);
0326         litex_write32(host->sdwriter + LITEX_MEM2BLK_LEN, *len);
0327         litex_write8(host->sdwriter + LITEX_MEM2BLK_ENA, 1);
0328         *transfer = SD_CTL_DATA_XFER_WRITE;
0329     } else {
0330         dev_warn(dev, "Data present w/o read or write flag.\n");
0331         /* Continue: set cmd status, mark req done */
0332     }
0333 
0334     litex_write16(host->sdcore + LITEX_CORE_BLKLEN, data->blksz);
0335     litex_write32(host->sdcore + LITEX_CORE_BLKCNT, data->blocks);
0336 }
0337 
0338 static void litex_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq)
0339 {
0340     struct litex_mmc_host *host = mmc_priv(mmc);
0341     struct device *dev = mmc_dev(mmc);
0342     struct mmc_command *cmd = mrq->cmd;
0343     struct mmc_command *sbc = mrq->sbc;
0344     struct mmc_data *data = mrq->data;
0345     struct mmc_command *stop = mrq->stop;
0346     unsigned int retries = cmd->retries;
0347     unsigned int len = 0;
0348     bool direct = false;
0349     u32 response_len = litex_mmc_response_len(cmd);
0350     u8 transfer = SD_CTL_DATA_XFER_NONE;
0351 
0352     /* First check that the card is still there */
0353     if (!litex_mmc_get_cd(mmc)) {
0354         cmd->error = -ENOMEDIUM;
0355         mmc_request_done(mmc, mrq);
0356         return;
0357     }
0358 
0359     /* Send set-block-count command if needed */
0360     if (sbc) {
0361         sbc->error = litex_mmc_send_cmd(host, sbc->opcode, sbc->arg,
0362                         litex_mmc_response_len(sbc),
0363                         SD_CTL_DATA_XFER_NONE);
0364         if (sbc->error) {
0365             host->is_bus_width_set = false;
0366             mmc_request_done(mmc, mrq);
0367             return;
0368         }
0369     }
0370 
0371     if (data) {
0372         /*
0373          * LiteSDCard only supports 4-bit bus width; therefore, we MUST
0374          * inject a SET_BUS_WIDTH (acmd6) before the very first data
0375          * transfer, earlier than when the mmc subsystem would normally
0376          * get around to it!
0377          */
0378         cmd->error = litex_mmc_set_bus_width(host);
0379         if (cmd->error) {
0380             dev_err(dev, "Can't set bus width!\n");
0381             mmc_request_done(mmc, mrq);
0382             return;
0383         }
0384 
0385         litex_mmc_do_dma(host, data, &len, &direct, &transfer);
0386     }
0387 
0388     do {
0389         cmd->error = litex_mmc_send_cmd(host, cmd->opcode, cmd->arg,
0390                         response_len, transfer);
0391     } while (cmd->error && retries-- > 0);
0392 
0393     if (cmd->error) {
0394         /* Card may be gone; don't assume bus width is still set */
0395         host->is_bus_width_set = false;
0396     }
0397 
0398     if (response_len == SD_CTL_RESP_SHORT) {
0399         /* Pull short response fields from appropriate host registers */
0400         cmd->resp[0] = host->resp[3];
0401         cmd->resp[1] = host->resp[2] & 0xFF;
0402     } else if (response_len == SD_CTL_RESP_LONG) {
0403         cmd->resp[0] = host->resp[0];
0404         cmd->resp[1] = host->resp[1];
0405         cmd->resp[2] = host->resp[2];
0406         cmd->resp[3] = host->resp[3];
0407     }
0408 
0409     /* Send stop-transmission command if required */
0410     if (stop && (cmd->error || !sbc)) {
0411         stop->error = litex_mmc_send_cmd(host, stop->opcode, stop->arg,
0412                          litex_mmc_response_len(stop),
0413                          SD_CTL_DATA_XFER_NONE);
0414         if (stop->error)
0415             host->is_bus_width_set = false;
0416     }
0417 
0418     if (data) {
0419         dma_unmap_sg(dev, data->sg, data->sg_len,
0420                  mmc_get_dma_dir(data));
0421     }
0422 
0423     if (!cmd->error && transfer != SD_CTL_DATA_XFER_NONE) {
0424         data->bytes_xfered = min(len, mmc->max_req_size);
0425         if (transfer == SD_CTL_DATA_XFER_READ && !direct) {
0426             sg_copy_from_buffer(data->sg, sg_nents(data->sg),
0427                         host->buffer, data->bytes_xfered);
0428         }
0429     }
0430 
0431     mmc_request_done(mmc, mrq);
0432 }
0433 
0434 static void litex_mmc_setclk(struct litex_mmc_host *host, unsigned int freq)
0435 {
0436     struct device *dev = mmc_dev(host->mmc);
0437     u32 div;
0438 
0439     div = freq ? host->ref_clk / freq : 256U;
0440     div = roundup_pow_of_two(div);
0441     div = clamp(div, 2U, 256U);
0442     dev_dbg(dev, "sd_clk_freq=%d: set to %d via div=%d\n",
0443         freq, host->ref_clk / div, div);
0444     litex_write16(host->sdphy + LITEX_PHY_CLOCKERDIV, div);
0445     host->sd_clk = freq;
0446 }
0447 
0448 static void litex_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
0449 {
0450     struct litex_mmc_host *host = mmc_priv(mmc);
0451 
0452     /*
0453      * NOTE: Ignore any ios->bus_width updates; they occur right after
0454      * the mmc core sends its own acmd6 bus-width change notification,
0455      * which is redundant since we snoop on the command flow and inject
0456      * an early acmd6 before the first data transfer command is sent!
0457      */
0458 
0459     /* Update sd_clk */
0460     if (ios->clock != host->sd_clk)
0461         litex_mmc_setclk(host, ios->clock);
0462 }
0463 
0464 static const struct mmc_host_ops litex_mmc_ops = {
0465     .get_cd = litex_mmc_get_cd,
0466     .request = litex_mmc_request,
0467     .set_ios = litex_mmc_set_ios,
0468 };
0469 
0470 static int litex_mmc_irq_init(struct platform_device *pdev,
0471                   struct litex_mmc_host *host)
0472 {
0473     struct device *dev = mmc_dev(host->mmc);
0474     int ret;
0475 
0476     ret = platform_get_irq_optional(pdev, 0);
0477     if (ret < 0 && ret != -ENXIO)
0478         return ret;
0479     if (ret > 0)
0480         host->irq = ret;
0481     else {
0482         dev_warn(dev, "Failed to get IRQ, using polling\n");
0483         goto use_polling;
0484     }
0485 
0486     host->sdirq = devm_platform_ioremap_resource_byname(pdev, "irq");
0487     if (IS_ERR(host->sdirq))
0488         return PTR_ERR(host->sdirq);
0489 
0490     ret = devm_request_irq(dev, host->irq, litex_mmc_interrupt, 0,
0491                    "litex-mmc", host->mmc);
0492     if (ret < 0) {
0493         dev_warn(dev, "IRQ request error %d, using polling\n", ret);
0494         goto use_polling;
0495     }
0496 
0497     /* Clear & enable card-change interrupts */
0498     litex_write32(host->sdirq + LITEX_IRQ_PENDING, SDIRQ_CARD_DETECT);
0499     litex_write32(host->sdirq + LITEX_IRQ_ENABLE, SDIRQ_CARD_DETECT);
0500 
0501     return 0;
0502 
0503 use_polling:
0504     host->mmc->caps |= MMC_CAP_NEEDS_POLL;
0505     return 0;
0506 }
0507 
0508 static void litex_mmc_free_host_wrapper(void *mmc)
0509 {
0510     mmc_free_host(mmc);
0511 }
0512 
0513 static int litex_mmc_probe(struct platform_device *pdev)
0514 {
0515     struct device *dev = &pdev->dev;
0516     struct litex_mmc_host *host;
0517     struct mmc_host *mmc;
0518     struct clk *clk;
0519     int ret;
0520 
0521     /*
0522      * NOTE: defaults to max_[req,seg]_size=PAGE_SIZE, max_blk_size=512,
0523      * and max_blk_count accordingly set to 8;
0524      * If for some reason we need to modify max_blk_count, we must also
0525      * re-calculate `max_[req,seg]_size = max_blk_size * max_blk_count;`
0526      */
0527     mmc = mmc_alloc_host(sizeof(struct litex_mmc_host), dev);
0528     if (!mmc)
0529         return -ENOMEM;
0530 
0531     ret = devm_add_action_or_reset(dev, litex_mmc_free_host_wrapper, mmc);
0532     if (ret)
0533         return dev_err_probe(dev, ret,
0534                      "Can't register mmc_free_host action\n");
0535 
0536     host = mmc_priv(mmc);
0537     host->mmc = mmc;
0538 
0539     /* Initialize clock source */
0540     clk = devm_clk_get(dev, NULL);
0541     if (IS_ERR(clk))
0542         return dev_err_probe(dev, PTR_ERR(clk), "can't get clock\n");
0543     host->ref_clk = clk_get_rate(clk);
0544     host->sd_clk = 0;
0545 
0546     /*
0547      * LiteSDCard only supports 4-bit bus width; therefore, we MUST inject
0548      * a SET_BUS_WIDTH (acmd6) before the very first data transfer, earlier
0549      * than when the mmc subsystem would normally get around to it!
0550      */
0551     host->is_bus_width_set = false;
0552     host->app_cmd = false;
0553 
0554     /* LiteSDCard can support 64-bit DMA addressing */
0555     ret = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(64));
0556     if (ret)
0557         return ret;
0558 
0559     host->buf_size = mmc->max_req_size * 2;
0560     host->buffer = dmam_alloc_coherent(dev, host->buf_size,
0561                        &host->dma, GFP_KERNEL);
0562     if (host->buffer == NULL)
0563         return -ENOMEM;
0564 
0565     host->sdphy = devm_platform_ioremap_resource_byname(pdev, "phy");
0566     if (IS_ERR(host->sdphy))
0567         return PTR_ERR(host->sdphy);
0568 
0569     host->sdcore = devm_platform_ioremap_resource_byname(pdev, "core");
0570     if (IS_ERR(host->sdcore))
0571         return PTR_ERR(host->sdcore);
0572 
0573     host->sdreader = devm_platform_ioremap_resource_byname(pdev, "reader");
0574     if (IS_ERR(host->sdreader))
0575         return PTR_ERR(host->sdreader);
0576 
0577     host->sdwriter = devm_platform_ioremap_resource_byname(pdev, "writer");
0578     if (IS_ERR(host->sdwriter))
0579         return PTR_ERR(host->sdwriter);
0580 
0581     /* Ensure DMA bus masters are disabled */
0582     litex_write8(host->sdreader + LITEX_BLK2MEM_ENA, 0);
0583     litex_write8(host->sdwriter + LITEX_MEM2BLK_ENA, 0);
0584 
0585     init_completion(&host->cmd_done);
0586     ret = litex_mmc_irq_init(pdev, host);
0587     if (ret)
0588         return ret;
0589 
0590     mmc->ops = &litex_mmc_ops;
0591 
0592     ret = mmc_regulator_get_supply(mmc);
0593     if (ret || mmc->ocr_avail == 0) {
0594         dev_warn(dev, "can't get voltage, defaulting to 3.3V\n");
0595         mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
0596     }
0597 
0598     /*
0599      * Set default sd_clk frequency range based on empirical observations
0600      * of LiteSDCard gateware behavior on typical SDCard media
0601      */
0602     mmc->f_min = 12.5e6;
0603     mmc->f_max = 50e6;
0604 
0605     ret = mmc_of_parse(mmc);
0606     if (ret)
0607         return ret;
0608 
0609     /* Force 4-bit bus_width (only width supported by hardware) */
0610     mmc->caps &= ~MMC_CAP_8_BIT_DATA;
0611     mmc->caps |= MMC_CAP_4_BIT_DATA;
0612 
0613     /* Set default capabilities */
0614     mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY |
0615              MMC_CAP_DRIVER_TYPE_D |
0616              MMC_CAP_CMD23;
0617     mmc->caps2 |= MMC_CAP2_NO_WRITE_PROTECT |
0618               MMC_CAP2_NO_SDIO |
0619               MMC_CAP2_NO_MMC;
0620 
0621     platform_set_drvdata(pdev, host);
0622 
0623     ret = mmc_add_host(mmc);
0624     if (ret)
0625         return ret;
0626 
0627     dev_info(dev, "LiteX MMC controller initialized.\n");
0628     return 0;
0629 }
0630 
0631 static int litex_mmc_remove(struct platform_device *pdev)
0632 {
0633     struct litex_mmc_host *host = platform_get_drvdata(pdev);
0634 
0635     mmc_remove_host(host->mmc);
0636     return 0;
0637 }
0638 
0639 static const struct of_device_id litex_match[] = {
0640     { .compatible = "litex,mmc" },
0641     { }
0642 };
0643 MODULE_DEVICE_TABLE(of, litex_match);
0644 
0645 static struct platform_driver litex_mmc_driver = {
0646     .probe = litex_mmc_probe,
0647     .remove = litex_mmc_remove,
0648     .driver = {
0649         .name = "litex-mmc",
0650         .of_match_table = litex_match,
0651     },
0652 };
0653 module_platform_driver(litex_mmc_driver);
0654 
0655 MODULE_DESCRIPTION("LiteX SDCard driver");
0656 MODULE_AUTHOR("Antmicro <contact@antmicro.com>");
0657 MODULE_AUTHOR("Kamil Rakoczy <krakoczy@antmicro.com>");
0658 MODULE_AUTHOR("Maciej Dudek <mdudek@internships.antmicro.com>");
0659 MODULE_AUTHOR("Paul Mackerras <paulus@ozlabs.org>");
0660 MODULE_AUTHOR("Gabriel Somlo <gsomlo@gmail.com>");
0661 MODULE_LICENSE("GPL v2");
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