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0001 /* SPDX-License-Identifier: GPL-2.0-or-later */
0002 /*
0003  * SN Platform GRU Driver
0004  *
0005  *            GRU DRIVER TABLES, MACROS, externs, etc
0006  *
0007  *  Copyright (c) 2008 Silicon Graphics, Inc.  All Rights Reserved.
0008  */
0009 
0010 #ifndef __GRUTABLES_H__
0011 #define __GRUTABLES_H__
0012 
0013 /*
0014  * GRU Chiplet:
0015  *   The GRU is a user addressible memory accelerator. It provides
0016  *   several forms of load, store, memset, bcopy instructions. In addition, it
0017  *   contains special instructions for AMOs, sending messages to message
0018  *   queues, etc.
0019  *
0020  *   The GRU is an integral part of the node controller. It connects
0021  *   directly to the cpu socket. In its current implementation, there are 2
0022  *   GRU chiplets in the node controller on each blade (~node).
0023  *
0024  *   The entire GRU memory space is fully coherent and cacheable by the cpus.
0025  *
0026  *   Each GRU chiplet has a physical memory map that looks like the following:
0027  *
0028  *      +-----------------+
0029  *      |/////////////////|
0030  *      |/////////////////|
0031  *      |/////////////////|
0032  *      |/////////////////|
0033  *      |/////////////////|
0034  *      |/////////////////|
0035  *      |/////////////////|
0036  *      |/////////////////|
0037  *      +-----------------+
0038  *      |  system control |
0039  *      +-----------------+        _______ +-------------+
0040  *      |/////////////////|       /        |             |
0041  *      |/////////////////|      /         |             |
0042  *      |/////////////////|     /          | instructions|
0043  *      |/////////////////|    /           |             |
0044  *      |/////////////////|   /            |             |
0045  *      |/////////////////|  /             |-------------|
0046  *      |/////////////////| /              |             |
0047  *      +-----------------+                |             |
0048  *      |   context 15    |                |  data       |
0049  *      +-----------------+                |             |
0050  *      |    ......       | \              |             |
0051  *      +-----------------+  \____________ +-------------+
0052  *      |   context 1     |
0053  *      +-----------------+
0054  *      |   context 0     |
0055  *      +-----------------+
0056  *
0057  *   Each of the "contexts" is a chunk of memory that can be mmaped into user
0058  *   space. The context consists of 2 parts:
0059  *
0060  *      - an instruction space that can be directly accessed by the user
0061  *        to issue GRU instructions and to check instruction status.
0062  *
0063  *      - a data area that acts as normal RAM.
0064  *
0065  *   User instructions contain virtual addresses of data to be accessed by the
0066  *   GRU. The GRU contains a TLB that is used to convert these user virtual
0067  *   addresses to physical addresses.
0068  *
0069  *   The "system control" area of the GRU chiplet is used by the kernel driver
0070  *   to manage user contexts and to perform functions such as TLB dropin and
0071  *   purging.
0072  *
0073  *   One context may be reserved for the kernel and used for cross-partition
0074  *   communication. The GRU will also be used to asynchronously zero out
0075  *   large blocks of memory (not currently implemented).
0076  *
0077  *
0078  * Tables:
0079  *
0080  *  VDATA-VMA Data      - Holds a few parameters. Head of linked list of
0081  *                GTS tables for threads using the GSEG
0082  *  GTS - Gru Thread State  - contains info for managing a GSEG context. A
0083  *                GTS is allocated for each thread accessing a
0084  *                GSEG.
0085  *      GTD - GRU Thread Data   - contains shadow copy of GRU data when GSEG is
0086  *                    not loaded into a GRU
0087  *  GMS - GRU Memory Struct - Used to manage TLB shootdowns. Tracks GRUs
0088  *                where a GSEG has been loaded. Similar to
0089  *                an mm_struct but for GRU.
0090  *
0091  *  GS  - GRU State     - Used to manage the state of a GRU chiplet
0092  *  BS  - Blade State   - Used to manage state of all GRU chiplets
0093  *                on a blade
0094  *
0095  *
0096  *  Normal task tables for task using GRU.
0097  *          - 2 threads in process
0098  *          - 2 GSEGs open in process
0099  *          - GSEG1 is being used by both threads
0100  *          - GSEG2 is used only by thread 2
0101  *
0102  *       task -->|
0103  *       task ---+---> mm ->------ (notifier) -------+-> gms
0104  *                     |                             |
0105  *                     |--> vma -> vdata ---> gts--->|      GSEG1 (thread1)
0106  *                     |                  |          |
0107  *                     |                  +-> gts--->|      GSEG1 (thread2)
0108  *                     |                             |
0109  *                     |--> vma -> vdata ---> gts--->|      GSEG2 (thread2)
0110  *                     .
0111  *                     .
0112  *
0113  *  GSEGs are marked DONTCOPY on fork
0114  *
0115  * At open
0116  *  file.private_data -> NULL
0117  *
0118  * At mmap,
0119  *  vma -> vdata
0120  *
0121  * After gseg reference
0122  *  vma -> vdata ->gts
0123  *
0124  * After fork
0125  *   parent
0126  *  vma -> vdata -> gts
0127  *   child
0128  *  (vma is not copied)
0129  *
0130  */
0131 
0132 #include <linux/refcount.h>
0133 #include <linux/rmap.h>
0134 #include <linux/interrupt.h>
0135 #include <linux/mutex.h>
0136 #include <linux/wait.h>
0137 #include <linux/mmu_notifier.h>
0138 #include <linux/mm_types.h>
0139 #include "gru.h"
0140 #include "grulib.h"
0141 #include "gruhandles.h"
0142 
0143 extern struct gru_stats_s gru_stats;
0144 extern struct gru_blade_state *gru_base[];
0145 extern unsigned long gru_start_paddr, gru_end_paddr;
0146 extern void *gru_start_vaddr;
0147 extern unsigned int gru_max_gids;
0148 
0149 #define GRU_MAX_BLADES      MAX_NUMNODES
0150 #define GRU_MAX_GRUS        (GRU_MAX_BLADES * GRU_CHIPLETS_PER_BLADE)
0151 
0152 #define GRU_DRIVER_ID_STR   "SGI GRU Device Driver"
0153 #define GRU_DRIVER_VERSION_STR  "0.85"
0154 
0155 /*
0156  * GRU statistics.
0157  */
0158 struct gru_stats_s {
0159     atomic_long_t vdata_alloc;
0160     atomic_long_t vdata_free;
0161     atomic_long_t gts_alloc;
0162     atomic_long_t gts_free;
0163     atomic_long_t gms_alloc;
0164     atomic_long_t gms_free;
0165     atomic_long_t gts_double_allocate;
0166     atomic_long_t assign_context;
0167     atomic_long_t assign_context_failed;
0168     atomic_long_t free_context;
0169     atomic_long_t load_user_context;
0170     atomic_long_t load_kernel_context;
0171     atomic_long_t lock_kernel_context;
0172     atomic_long_t unlock_kernel_context;
0173     atomic_long_t steal_user_context;
0174     atomic_long_t steal_kernel_context;
0175     atomic_long_t steal_context_failed;
0176     atomic_long_t nopfn;
0177     atomic_long_t asid_new;
0178     atomic_long_t asid_next;
0179     atomic_long_t asid_wrap;
0180     atomic_long_t asid_reuse;
0181     atomic_long_t intr;
0182     atomic_long_t intr_cbr;
0183     atomic_long_t intr_tfh;
0184     atomic_long_t intr_spurious;
0185     atomic_long_t intr_mm_lock_failed;
0186     atomic_long_t call_os;
0187     atomic_long_t call_os_wait_queue;
0188     atomic_long_t user_flush_tlb;
0189     atomic_long_t user_unload_context;
0190     atomic_long_t user_exception;
0191     atomic_long_t set_context_option;
0192     atomic_long_t check_context_retarget_intr;
0193     atomic_long_t check_context_unload;
0194     atomic_long_t tlb_dropin;
0195     atomic_long_t tlb_preload_page;
0196     atomic_long_t tlb_dropin_fail_no_asid;
0197     atomic_long_t tlb_dropin_fail_upm;
0198     atomic_long_t tlb_dropin_fail_invalid;
0199     atomic_long_t tlb_dropin_fail_range_active;
0200     atomic_long_t tlb_dropin_fail_idle;
0201     atomic_long_t tlb_dropin_fail_fmm;
0202     atomic_long_t tlb_dropin_fail_no_exception;
0203     atomic_long_t tfh_stale_on_fault;
0204     atomic_long_t mmu_invalidate_range;
0205     atomic_long_t mmu_invalidate_page;
0206     atomic_long_t flush_tlb;
0207     atomic_long_t flush_tlb_gru;
0208     atomic_long_t flush_tlb_gru_tgh;
0209     atomic_long_t flush_tlb_gru_zero_asid;
0210 
0211     atomic_long_t copy_gpa;
0212     atomic_long_t read_gpa;
0213 
0214     atomic_long_t mesq_receive;
0215     atomic_long_t mesq_receive_none;
0216     atomic_long_t mesq_send;
0217     atomic_long_t mesq_send_failed;
0218     atomic_long_t mesq_noop;
0219     atomic_long_t mesq_send_unexpected_error;
0220     atomic_long_t mesq_send_lb_overflow;
0221     atomic_long_t mesq_send_qlimit_reached;
0222     atomic_long_t mesq_send_amo_nacked;
0223     atomic_long_t mesq_send_put_nacked;
0224     atomic_long_t mesq_page_overflow;
0225     atomic_long_t mesq_qf_locked;
0226     atomic_long_t mesq_qf_noop_not_full;
0227     atomic_long_t mesq_qf_switch_head_failed;
0228     atomic_long_t mesq_qf_unexpected_error;
0229     atomic_long_t mesq_noop_unexpected_error;
0230     atomic_long_t mesq_noop_lb_overflow;
0231     atomic_long_t mesq_noop_qlimit_reached;
0232     atomic_long_t mesq_noop_amo_nacked;
0233     atomic_long_t mesq_noop_put_nacked;
0234     atomic_long_t mesq_noop_page_overflow;
0235 
0236 };
0237 
0238 enum mcs_op {cchop_allocate, cchop_start, cchop_interrupt, cchop_interrupt_sync,
0239     cchop_deallocate, tfhop_write_only, tfhop_write_restart,
0240     tghop_invalidate, mcsop_last};
0241 
0242 struct mcs_op_statistic {
0243     atomic_long_t   count;
0244     atomic_long_t   total;
0245     unsigned long   max;
0246 };
0247 
0248 extern struct mcs_op_statistic mcs_op_statistics[mcsop_last];
0249 
0250 #define OPT_DPRINT      1
0251 #define OPT_STATS       2
0252 
0253 
0254 #define IRQ_GRU         110 /* Starting IRQ number for interrupts */
0255 
0256 /* Delay in jiffies between attempts to assign a GRU context */
0257 #define GRU_ASSIGN_DELAY    ((HZ * 20) / 1000)
0258 
0259 /*
0260  * If a process has it's context stolen, min delay in jiffies before trying to
0261  * steal a context from another process.
0262  */
0263 #define GRU_STEAL_DELAY     ((HZ * 200) / 1000)
0264 
0265 #define STAT(id)    do {                        \
0266                 if (gru_options & OPT_STATS)        \
0267                     atomic_long_inc(&gru_stats.id); \
0268             } while (0)
0269 
0270 #ifdef CONFIG_SGI_GRU_DEBUG
0271 #define gru_dbg(dev, fmt, x...)                     \
0272     do {                                \
0273         if (gru_options & OPT_DPRINT)               \
0274             printk(KERN_DEBUG "GRU:%d %s: " fmt, smp_processor_id(), __func__, x);\
0275     } while (0)
0276 #else
0277 #define gru_dbg(x...)
0278 #endif
0279 
0280 /*-----------------------------------------------------------------------------
0281  * ASID management
0282  */
0283 #define MAX_ASID    0xfffff0
0284 #define MIN_ASID    8
0285 #define ASID_INC    8   /* number of regions */
0286 
0287 /* Generate a GRU asid value from a GRU base asid & a virtual address. */
0288 #define VADDR_HI_BIT        64
0289 #define GRUREGION(addr)     ((addr) >> (VADDR_HI_BIT - 3) & 3)
0290 #define GRUASID(asid, addr) ((asid) + GRUREGION(addr))
0291 
0292 /*------------------------------------------------------------------------------
0293  *  File & VMS Tables
0294  */
0295 
0296 struct gru_state;
0297 
0298 /*
0299  * This structure is pointed to from the mmstruct via the notifier pointer.
0300  * There is one of these per address space.
0301  */
0302 struct gru_mm_tracker {             /* pack to reduce size */
0303     unsigned int        mt_asid_gen:24; /* ASID wrap count */
0304     unsigned int        mt_asid:24; /* current base ASID for gru */
0305     unsigned short      mt_ctxbitmap:16;/* bitmap of contexts using
0306                            asid */
0307 } __attribute__ ((packed));
0308 
0309 struct gru_mm_struct {
0310     struct mmu_notifier ms_notifier;
0311     spinlock_t      ms_asid_lock;   /* protects ASID assignment */
0312     atomic_t        ms_range_active;/* num range_invals active */
0313     wait_queue_head_t   ms_wait_queue;
0314     DECLARE_BITMAP(ms_asidmap, GRU_MAX_GRUS);
0315     struct gru_mm_tracker   ms_asids[GRU_MAX_GRUS];
0316 };
0317 
0318 /*
0319  * One of these structures is allocated when a GSEG is mmaped. The
0320  * structure is pointed to by the vma->vm_private_data field in the vma struct.
0321  */
0322 struct gru_vma_data {
0323     spinlock_t      vd_lock;    /* Serialize access to vma */
0324     struct list_head    vd_head;    /* head of linked list of gts */
0325     long            vd_user_options;/* misc user option flags */
0326     int         vd_cbr_au_count;
0327     int         vd_dsr_au_count;
0328     unsigned char       vd_tlb_preload_count;
0329 };
0330 
0331 /*
0332  * One of these is allocated for each thread accessing a mmaped GRU. A linked
0333  * list of these structure is hung off the struct gru_vma_data in the mm_struct.
0334  */
0335 struct gru_thread_state {
0336     struct list_head    ts_next;    /* list - head at vma-private */
0337     struct mutex        ts_ctxlock; /* load/unload CTX lock */
0338     struct mm_struct    *ts_mm;     /* mm currently mapped to
0339                            context */
0340     struct vm_area_struct   *ts_vma;    /* vma of GRU context */
0341     struct gru_state    *ts_gru;    /* GRU where the context is
0342                            loaded */
0343     struct gru_mm_struct    *ts_gms;    /* asid & ioproc struct */
0344     unsigned char       ts_tlb_preload_count; /* TLB preload pages */
0345     unsigned long       ts_cbr_map; /* map of allocated CBRs */
0346     unsigned long       ts_dsr_map; /* map of allocated DATA
0347                            resources */
0348     unsigned long       ts_steal_jiffies;/* jiffies when context last
0349                             stolen */
0350     long            ts_user_options;/* misc user option flags */
0351     pid_t           ts_tgid_owner;  /* task that is using the
0352                            context - for migration */
0353     short           ts_user_blade_id;/* user selected blade */
0354     char            ts_user_chiplet_id;/* user selected chiplet */
0355     unsigned short      ts_sizeavail;   /* Pagesizes in use */
0356     int         ts_tsid;    /* thread that owns the
0357                            structure */
0358     int         ts_tlb_int_select;/* target cpu if interrupts
0359                              enabled */
0360     int         ts_ctxnum;  /* context number where the
0361                            context is loaded */
0362     refcount_t      ts_refcnt;  /* reference count GTS */
0363     unsigned char       ts_dsr_au_count;/* Number of DSR resources
0364                            required for contest */
0365     unsigned char       ts_cbr_au_count;/* Number of CBR resources
0366                            required for contest */
0367     char            ts_cch_req_slice;/* CCH packet slice */
0368     char            ts_blade;   /* If >= 0, migrate context if
0369                            ref from different blade */
0370     char            ts_force_cch_reload;
0371     char            ts_cbr_idx[GRU_CBR_AU];/* CBR numbers of each
0372                               allocated CB */
0373     int         ts_data_valid;  /* Indicates if ts_gdata has
0374                            valid data */
0375     struct gru_gseg_statistics ustats;  /* User statistics */
0376     unsigned long       ts_gdata[]; /* save area for GRU data (CB,
0377                            DS, CBE) */
0378 };
0379 
0380 /*
0381  * Threaded programs actually allocate an array of GSEGs when a context is
0382  * created. Each thread uses a separate GSEG. TSID is the index into the GSEG
0383  * array.
0384  */
0385 #define TSID(a, v)      (((a) - (v)->vm_start) / GRU_GSEG_PAGESIZE)
0386 #define UGRUADDR(gts)       ((gts)->ts_vma->vm_start +      \
0387                     (gts)->ts_tsid * GRU_GSEG_PAGESIZE)
0388 
0389 #define NULLCTX         (-1)    /* if context not loaded into GRU */
0390 
0391 /*-----------------------------------------------------------------------------
0392  *  GRU State Tables
0393  */
0394 
0395 /*
0396  * One of these exists for each GRU chiplet.
0397  */
0398 struct gru_state {
0399     struct gru_blade_state  *gs_blade;      /* GRU state for entire
0400                                blade */
0401     unsigned long       gs_gru_base_paddr;  /* Physical address of
0402                                gru segments (64) */
0403     void            *gs_gru_base_vaddr; /* Virtual address of
0404                                gru segments (64) */
0405     unsigned short      gs_gid;         /* unique GRU number */
0406     unsigned short      gs_blade_id;        /* blade of GRU */
0407     unsigned char       gs_chiplet_id;      /* blade chiplet of GRU */
0408     unsigned char       gs_tgh_local_shift; /* used to pick TGH for
0409                                local flush */
0410     unsigned char       gs_tgh_first_remote;    /* starting TGH# for
0411                                remote flush */
0412     spinlock_t      gs_asid_lock;       /* lock used for
0413                                assigning asids */
0414     spinlock_t      gs_lock;        /* lock used for
0415                                assigning contexts */
0416 
0417     /* -- the following are protected by the gs_asid_lock spinlock ---- */
0418     unsigned int        gs_asid;        /* Next availe ASID */
0419     unsigned int        gs_asid_limit;      /* Limit of available
0420                                ASIDs */
0421     unsigned int        gs_asid_gen;        /* asid generation.
0422                                Inc on wrap */
0423 
0424     /* --- the following fields are protected by the gs_lock spinlock --- */
0425     unsigned long       gs_context_map;     /* bitmap to manage
0426                                contexts in use */
0427     unsigned long       gs_cbr_map;     /* bitmap to manage CB
0428                                resources */
0429     unsigned long       gs_dsr_map;     /* bitmap used to manage
0430                                DATA resources */
0431     unsigned int        gs_reserved_cbrs;   /* Number of kernel-
0432                                reserved cbrs */
0433     unsigned int        gs_reserved_dsr_bytes;  /* Bytes of kernel-
0434                                reserved dsrs */
0435     unsigned short      gs_active_contexts; /* number of contexts
0436                                in use */
0437     struct gru_thread_state *gs_gts[GRU_NUM_CCH];   /* GTS currently using
0438                                the context */
0439     int         gs_irq[GRU_NUM_TFM];    /* Interrupt irqs */
0440 };
0441 
0442 /*
0443  * This structure contains the GRU state for all the GRUs on a blade.
0444  */
0445 struct gru_blade_state {
0446     void            *kernel_cb;     /* First kernel
0447                                reserved cb */
0448     void            *kernel_dsr;        /* First kernel
0449                                reserved DSR */
0450     struct rw_semaphore bs_kgts_sema;       /* lock for kgts */
0451     struct gru_thread_state *bs_kgts;       /* GTS for kernel use */
0452 
0453     /* ---- the following are used for managing kernel async GRU CBRs --- */
0454     int         bs_async_dsr_bytes; /* DSRs for async */
0455     int         bs_async_cbrs;      /* CBRs AU for async */
0456     struct completion   *bs_async_wq;
0457 
0458     /* ---- the following are protected by the bs_lock spinlock ---- */
0459     spinlock_t      bs_lock;        /* lock used for
0460                                stealing contexts */
0461     int         bs_lru_ctxnum;      /* STEAL - last context
0462                                stolen */
0463     struct gru_state    *bs_lru_gru;        /* STEAL - last gru
0464                                stolen */
0465 
0466     struct gru_state    bs_grus[GRU_CHIPLETS_PER_BLADE];
0467 };
0468 
0469 /*-----------------------------------------------------------------------------
0470  * Address Primitives
0471  */
0472 #define get_tfm_for_cpu(g, c)                       \
0473     ((struct gru_tlb_fault_map *)get_tfm((g)->gs_gru_base_vaddr, (c)))
0474 #define get_tfh_by_index(g, i)                      \
0475     ((struct gru_tlb_fault_handle *)get_tfh((g)->gs_gru_base_vaddr, (i)))
0476 #define get_tgh_by_index(g, i)                      \
0477     ((struct gru_tlb_global_handle *)get_tgh((g)->gs_gru_base_vaddr, (i)))
0478 #define get_cbe_by_index(g, i)                      \
0479     ((struct gru_control_block_extended *)get_cbe((g)->gs_gru_base_vaddr,\
0480             (i)))
0481 
0482 /*-----------------------------------------------------------------------------
0483  * Useful Macros
0484  */
0485 
0486 /* Given a blade# & chiplet#, get a pointer to the GRU */
0487 #define get_gru(b, c)       (&gru_base[b]->bs_grus[c])
0488 
0489 /* Number of bytes to save/restore when unloading/loading GRU contexts */
0490 #define DSR_BYTES(dsr)      ((dsr) * GRU_DSR_AU_BYTES)
0491 #define CBR_BYTES(cbr)      ((cbr) * GRU_HANDLE_BYTES * GRU_CBR_AU_SIZE * 2)
0492 
0493 /* Convert a user CB number to the actual CBRNUM */
0494 #define thread_cbr_number(gts, n) ((gts)->ts_cbr_idx[(n) / GRU_CBR_AU_SIZE] \
0495                   * GRU_CBR_AU_SIZE + (n) % GRU_CBR_AU_SIZE)
0496 
0497 /* Convert a gid to a pointer to the GRU */
0498 #define GID_TO_GRU(gid)                         \
0499     (gru_base[(gid) / GRU_CHIPLETS_PER_BLADE] ?         \
0500         (&gru_base[(gid) / GRU_CHIPLETS_PER_BLADE]->        \
0501             bs_grus[(gid) % GRU_CHIPLETS_PER_BLADE]) :  \
0502      NULL)
0503 
0504 /* Scan all active GRUs in a GRU bitmap */
0505 #define for_each_gru_in_bitmap(gid, map)                \
0506     for_each_set_bit((gid), (map), GRU_MAX_GRUS)
0507 
0508 /* Scan all active GRUs on a specific blade */
0509 #define for_each_gru_on_blade(gru, nid, i)              \
0510     for ((gru) = gru_base[nid]->bs_grus, (i) = 0;           \
0511             (i) < GRU_CHIPLETS_PER_BLADE;           \
0512             (i)++, (gru)++)
0513 
0514 /* Scan all GRUs */
0515 #define foreach_gid(gid)                        \
0516     for ((gid) = 0; (gid) < gru_max_gids; (gid)++)
0517 
0518 /* Scan all active GTSs on a gru. Note: must hold ss_lock to use this macro. */
0519 #define for_each_gts_on_gru(gts, gru, ctxnum)               \
0520     for ((ctxnum) = 0; (ctxnum) < GRU_NUM_CCH; (ctxnum)++)      \
0521         if (((gts) = (gru)->gs_gts[ctxnum]))
0522 
0523 /* Scan each CBR whose bit is set in a TFM (or copy of) */
0524 #define for_each_cbr_in_tfm(i, map)                 \
0525     for_each_set_bit((i), (map), GRU_NUM_CBE)
0526 
0527 /* Scan each CBR in a CBR bitmap. Note: multiple CBRs in an allocation unit */
0528 #define for_each_cbr_in_allocation_map(i, map, k)           \
0529     for_each_set_bit((k), (map), GRU_CBR_AU)            \
0530         for ((i) = (k)*GRU_CBR_AU_SIZE;             \
0531                 (i) < ((k) + 1) * GRU_CBR_AU_SIZE; (i)++)
0532 
0533 #define gseg_physical_address(gru, ctxnum)              \
0534         ((gru)->gs_gru_base_paddr + ctxnum * GRU_GSEG_STRIDE)
0535 #define gseg_virtual_address(gru, ctxnum)               \
0536         ((gru)->gs_gru_base_vaddr + ctxnum * GRU_GSEG_STRIDE)
0537 
0538 /*-----------------------------------------------------------------------------
0539  * Lock / Unlock GRU handles
0540  *  Use the "delresp" bit in the handle as a "lock" bit.
0541  */
0542 
0543 /* Lock hierarchy checking enabled only in emulator */
0544 
0545 /* 0 = lock failed, 1 = locked */
0546 static inline int __trylock_handle(void *h)
0547 {
0548     return !test_and_set_bit(1, h);
0549 }
0550 
0551 static inline void __lock_handle(void *h)
0552 {
0553     while (test_and_set_bit(1, h))
0554         cpu_relax();
0555 }
0556 
0557 static inline void __unlock_handle(void *h)
0558 {
0559     clear_bit(1, h);
0560 }
0561 
0562 static inline int trylock_cch_handle(struct gru_context_configuration_handle *cch)
0563 {
0564     return __trylock_handle(cch);
0565 }
0566 
0567 static inline void lock_cch_handle(struct gru_context_configuration_handle *cch)
0568 {
0569     __lock_handle(cch);
0570 }
0571 
0572 static inline void unlock_cch_handle(struct gru_context_configuration_handle
0573                      *cch)
0574 {
0575     __unlock_handle(cch);
0576 }
0577 
0578 static inline void lock_tgh_handle(struct gru_tlb_global_handle *tgh)
0579 {
0580     __lock_handle(tgh);
0581 }
0582 
0583 static inline void unlock_tgh_handle(struct gru_tlb_global_handle *tgh)
0584 {
0585     __unlock_handle(tgh);
0586 }
0587 
0588 static inline int is_kernel_context(struct gru_thread_state *gts)
0589 {
0590     return !gts->ts_mm;
0591 }
0592 
0593 /*
0594  * The following are for Nehelem-EX. A more general scheme is needed for
0595  * future processors.
0596  */
0597 #define UV_MAX_INT_CORES        8
0598 #define uv_cpu_socket_number(p)     ((cpu_physical_id(p) >> 5) & 1)
0599 #define uv_cpu_ht_number(p)     (cpu_physical_id(p) & 1)
0600 #define uv_cpu_core_number(p)       (((cpu_physical_id(p) >> 2) & 4) |  \
0601                     ((cpu_physical_id(p) >> 1) & 3))
0602 /*-----------------------------------------------------------------------------
0603  * Function prototypes & externs
0604  */
0605 struct gru_unload_context_req;
0606 
0607 extern const struct vm_operations_struct gru_vm_ops;
0608 extern struct device *grudev;
0609 
0610 extern struct gru_vma_data *gru_alloc_vma_data(struct vm_area_struct *vma,
0611                 int tsid);
0612 extern struct gru_thread_state *gru_find_thread_state(struct vm_area_struct
0613                 *vma, int tsid);
0614 extern struct gru_thread_state *gru_alloc_thread_state(struct vm_area_struct
0615                 *vma, int tsid);
0616 extern struct gru_state *gru_assign_gru_context(struct gru_thread_state *gts);
0617 extern void gru_load_context(struct gru_thread_state *gts);
0618 extern void gru_steal_context(struct gru_thread_state *gts);
0619 extern void gru_unload_context(struct gru_thread_state *gts, int savestate);
0620 extern int gru_update_cch(struct gru_thread_state *gts);
0621 extern void gts_drop(struct gru_thread_state *gts);
0622 extern void gru_tgh_flush_init(struct gru_state *gru);
0623 extern int gru_kservices_init(void);
0624 extern void gru_kservices_exit(void);
0625 extern irqreturn_t gru0_intr(int irq, void *dev_id);
0626 extern irqreturn_t gru1_intr(int irq, void *dev_id);
0627 extern irqreturn_t gru_intr_mblade(int irq, void *dev_id);
0628 extern int gru_dump_chiplet_request(unsigned long arg);
0629 extern long gru_get_gseg_statistics(unsigned long arg);
0630 extern int gru_handle_user_call_os(unsigned long address);
0631 extern int gru_user_flush_tlb(unsigned long arg);
0632 extern int gru_user_unload_context(unsigned long arg);
0633 extern int gru_get_exception_detail(unsigned long arg);
0634 extern int gru_set_context_option(unsigned long address);
0635 extern void gru_check_context_placement(struct gru_thread_state *gts);
0636 extern int gru_cpu_fault_map_id(void);
0637 extern struct vm_area_struct *gru_find_vma(unsigned long vaddr);
0638 extern void gru_flush_all_tlb(struct gru_state *gru);
0639 extern int gru_proc_init(void);
0640 extern void gru_proc_exit(void);
0641 
0642 extern struct gru_thread_state *gru_alloc_gts(struct vm_area_struct *vma,
0643         int cbr_au_count, int dsr_au_count,
0644         unsigned char tlb_preload_count, int options, int tsid);
0645 extern unsigned long gru_reserve_cb_resources(struct gru_state *gru,
0646         int cbr_au_count, char *cbmap);
0647 extern unsigned long gru_reserve_ds_resources(struct gru_state *gru,
0648         int dsr_au_count, char *dsmap);
0649 extern vm_fault_t gru_fault(struct vm_fault *vmf);
0650 extern struct gru_mm_struct *gru_register_mmu_notifier(void);
0651 extern void gru_drop_mmu_notifier(struct gru_mm_struct *gms);
0652 
0653 extern int gru_ktest(unsigned long arg);
0654 extern void gru_flush_tlb_range(struct gru_mm_struct *gms, unsigned long start,
0655                     unsigned long len);
0656 
0657 extern unsigned long gru_options;
0658 
0659 #endif /* __GRUTABLES_H__ */
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