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0008 #include <linux/kernel.h>
0009 #include "gru.h"
0010 #include "grulib.h"
0011 #include "grutables.h"
0012
0013
0014 #ifdef CONFIG_IA64
0015 #include <asm/processor.h>
0016 #define GRU_OPERATION_TIMEOUT (((cycles_t) local_cpu_data->itc_freq)*10)
0017 #define CLKS2NSEC(c) ((c) *1000000000 / local_cpu_data->itc_freq)
0018 #else
0019 #include <linux/sync_core.h>
0020 #include <asm/tsc.h>
0021 #define GRU_OPERATION_TIMEOUT ((cycles_t) tsc_khz*10*1000)
0022 #define CLKS2NSEC(c) ((c) * 1000000 / tsc_khz)
0023 #endif
0024
0025
0026 #define GET_MSEG_HANDLE_STATUS(h) (((*(unsigned long *)(h)) >> 16) & 3)
0027
0028 struct mcs_op_statistic mcs_op_statistics[mcsop_last];
0029
0030 static void update_mcs_stats(enum mcs_op op, unsigned long clks)
0031 {
0032 unsigned long nsec;
0033
0034 nsec = CLKS2NSEC(clks);
0035 atomic_long_inc(&mcs_op_statistics[op].count);
0036 atomic_long_add(nsec, &mcs_op_statistics[op].total);
0037 if (mcs_op_statistics[op].max < nsec)
0038 mcs_op_statistics[op].max = nsec;
0039 }
0040
0041 static void start_instruction(void *h)
0042 {
0043 unsigned long *w0 = h;
0044
0045 wmb();
0046 *w0 = *w0 | 0x20001;
0047 gru_flush_cache(h);
0048 }
0049
0050 static void report_instruction_timeout(void *h)
0051 {
0052 unsigned long goff = GSEGPOFF((unsigned long)h);
0053 char *id = "???";
0054
0055 if (TYPE_IS(CCH, goff))
0056 id = "CCH";
0057 else if (TYPE_IS(TGH, goff))
0058 id = "TGH";
0059 else if (TYPE_IS(TFH, goff))
0060 id = "TFH";
0061
0062 panic(KERN_ALERT "GRU %p (%s) is malfunctioning\n", h, id);
0063 }
0064
0065 static int wait_instruction_complete(void *h, enum mcs_op opc)
0066 {
0067 int status;
0068 unsigned long start_time = get_cycles();
0069
0070 while (1) {
0071 cpu_relax();
0072 status = GET_MSEG_HANDLE_STATUS(h);
0073 if (status != CCHSTATUS_ACTIVE)
0074 break;
0075 if (GRU_OPERATION_TIMEOUT < (get_cycles() - start_time)) {
0076 report_instruction_timeout(h);
0077 start_time = get_cycles();
0078 }
0079 }
0080 if (gru_options & OPT_STATS)
0081 update_mcs_stats(opc, get_cycles() - start_time);
0082 return status;
0083 }
0084
0085 int cch_allocate(struct gru_context_configuration_handle *cch)
0086 {
0087 int ret;
0088
0089 cch->opc = CCHOP_ALLOCATE;
0090 start_instruction(cch);
0091 ret = wait_instruction_complete(cch, cchop_allocate);
0092
0093
0094
0095
0096
0097 sync_core();
0098 return ret;
0099 }
0100
0101 int cch_start(struct gru_context_configuration_handle *cch)
0102 {
0103 cch->opc = CCHOP_START;
0104 start_instruction(cch);
0105 return wait_instruction_complete(cch, cchop_start);
0106 }
0107
0108 int cch_interrupt(struct gru_context_configuration_handle *cch)
0109 {
0110 cch->opc = CCHOP_INTERRUPT;
0111 start_instruction(cch);
0112 return wait_instruction_complete(cch, cchop_interrupt);
0113 }
0114
0115 int cch_deallocate(struct gru_context_configuration_handle *cch)
0116 {
0117 int ret;
0118
0119 cch->opc = CCHOP_DEALLOCATE;
0120 start_instruction(cch);
0121 ret = wait_instruction_complete(cch, cchop_deallocate);
0122
0123
0124
0125
0126
0127 sync_core();
0128 return ret;
0129 }
0130
0131 int cch_interrupt_sync(struct gru_context_configuration_handle
0132 *cch)
0133 {
0134 cch->opc = CCHOP_INTERRUPT_SYNC;
0135 start_instruction(cch);
0136 return wait_instruction_complete(cch, cchop_interrupt_sync);
0137 }
0138
0139 int tgh_invalidate(struct gru_tlb_global_handle *tgh,
0140 unsigned long vaddr, unsigned long vaddrmask,
0141 int asid, int pagesize, int global, int n,
0142 unsigned short ctxbitmap)
0143 {
0144 tgh->vaddr = vaddr;
0145 tgh->asid = asid;
0146 tgh->pagesize = pagesize;
0147 tgh->n = n;
0148 tgh->global = global;
0149 tgh->vaddrmask = vaddrmask;
0150 tgh->ctxbitmap = ctxbitmap;
0151 tgh->opc = TGHOP_TLBINV;
0152 start_instruction(tgh);
0153 return wait_instruction_complete(tgh, tghop_invalidate);
0154 }
0155
0156 int tfh_write_only(struct gru_tlb_fault_handle *tfh,
0157 unsigned long paddr, int gaa,
0158 unsigned long vaddr, int asid, int dirty,
0159 int pagesize)
0160 {
0161 tfh->fillasid = asid;
0162 tfh->fillvaddr = vaddr;
0163 tfh->pfn = paddr >> GRU_PADDR_SHIFT;
0164 tfh->gaa = gaa;
0165 tfh->dirty = dirty;
0166 tfh->pagesize = pagesize;
0167 tfh->opc = TFHOP_WRITE_ONLY;
0168 start_instruction(tfh);
0169 return wait_instruction_complete(tfh, tfhop_write_only);
0170 }
0171
0172 void tfh_write_restart(struct gru_tlb_fault_handle *tfh,
0173 unsigned long paddr, int gaa,
0174 unsigned long vaddr, int asid, int dirty,
0175 int pagesize)
0176 {
0177 tfh->fillasid = asid;
0178 tfh->fillvaddr = vaddr;
0179 tfh->pfn = paddr >> GRU_PADDR_SHIFT;
0180 tfh->gaa = gaa;
0181 tfh->dirty = dirty;
0182 tfh->pagesize = pagesize;
0183 tfh->opc = TFHOP_WRITE_RESTART;
0184 start_instruction(tfh);
0185 }
0186
0187 void tfh_user_polling_mode(struct gru_tlb_fault_handle *tfh)
0188 {
0189 tfh->opc = TFHOP_USER_POLLING_MODE;
0190 start_instruction(tfh);
0191 }
0192
0193 void tfh_exception(struct gru_tlb_fault_handle *tfh)
0194 {
0195 tfh->opc = TFHOP_EXCEPTION;
0196 start_instruction(tfh);
0197 }
0198