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0001 /* SPDX-License-Identifier: GPL-2.0 */
0002 /*
0003  * Copyright (c) 2013-2016, Intel Corporation. All rights reserved.
0004  * Intel Management Engine Interface (Intel MEI) Linux driver
0005  */
0006 
0007 #ifndef _MEI_HW_TXE_H_
0008 #define _MEI_HW_TXE_H_
0009 
0010 #include <linux/irqreturn.h>
0011 
0012 #include "hw.h"
0013 #include "hw-txe-regs.h"
0014 
0015 #define MEI_TXI_RPM_TIMEOUT    500 /* ms */
0016 
0017 /* Flatten Hierarchy interrupt cause */
0018 #define TXE_INTR_READINESS_BIT  0 /* HISR_INT_0_STS */
0019 #define TXE_INTR_READINESS      HISR_INT_0_STS
0020 #define TXE_INTR_ALIVENESS_BIT  1 /* HISR_INT_1_STS */
0021 #define TXE_INTR_ALIVENESS      HISR_INT_1_STS
0022 #define TXE_INTR_OUT_DB_BIT     2 /* HISR_INT_2_STS */
0023 #define TXE_INTR_OUT_DB         HISR_INT_2_STS
0024 #define TXE_INTR_IN_READY_BIT   8 /* beyond HISR */
0025 #define TXE_INTR_IN_READY       BIT(8)
0026 
0027 /**
0028  * struct mei_txe_hw - txe hardware specifics
0029  *
0030  * @mem_addr:            SeC and BRIDGE bars
0031  * @aliveness:           aliveness (power gating) state of the hardware
0032  * @readiness:           readiness state of the hardware
0033  * @slots:               number of empty slots
0034  * @wait_aliveness_resp: aliveness wait queue
0035  * @intr_cause:          translated interrupt cause
0036  */
0037 struct mei_txe_hw {
0038     void __iomem * const *mem_addr;
0039     u32 aliveness;
0040     u32 readiness;
0041     u32 slots;
0042 
0043     wait_queue_head_t wait_aliveness_resp;
0044 
0045     unsigned long intr_cause;
0046 };
0047 
0048 #define to_txe_hw(dev) (struct mei_txe_hw *)((dev)->hw)
0049 
0050 static inline struct mei_device *hw_txe_to_mei(struct mei_txe_hw *hw)
0051 {
0052     return container_of((void *)hw, struct mei_device, hw);
0053 }
0054 
0055 struct mei_device *mei_txe_dev_init(struct pci_dev *pdev);
0056 
0057 irqreturn_t mei_txe_irq_quick_handler(int irq, void *dev_id);
0058 irqreturn_t mei_txe_irq_thread_handler(int irq, void *dev_id);
0059 
0060 int mei_txe_aliveness_set_sync(struct mei_device *dev, u32 req);
0061 
0062 int mei_txe_setup_satt2(struct mei_device *dev, phys_addr_t addr, u32 range);
0063 
0064 
0065 #endif /* _MEI_HW_TXE_H_ */