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0001 /* SPDX-License-Identifier: GPL-2.0
0002  *
0003  * Copyright 2016-2018 HabanaLabs, Ltd.
0004  * All Rights Reserved.
0005  *
0006  */
0007 
0008 /************************************
0009  ** This is an auto-generated file **
0010  **       DO NOT EDIT BELOW        **
0011  ************************************/
0012 
0013 #ifndef ASIC_REG_PSOC_GLOBAL_CONF_REGS_H_
0014 #define ASIC_REG_PSOC_GLOBAL_CONF_REGS_H_
0015 
0016 /*
0017  *****************************************
0018  *   PSOC_GLOBAL_CONF (Prototype: GLOBAL_CONF)
0019  *****************************************
0020  */
0021 
0022 #define mmPSOC_GLOBAL_CONF_NON_RST_FLOPS_0                           0xC4B000
0023 
0024 #define mmPSOC_GLOBAL_CONF_NON_RST_FLOPS_1                           0xC4B004
0025 
0026 #define mmPSOC_GLOBAL_CONF_NON_RST_FLOPS_2                           0xC4B008
0027 
0028 #define mmPSOC_GLOBAL_CONF_NON_RST_FLOPS_3                           0xC4B00C
0029 
0030 #define mmPSOC_GLOBAL_CONF_PCI_FW_FSM                                0xC4B020
0031 
0032 #define mmPSOC_GLOBAL_CONF_BOOT_SEQ_RE_START                         0xC4B024
0033 
0034 #define mmPSOC_GLOBAL_CONF_BTM_FSM                                   0xC4B028
0035 
0036 #define mmPSOC_GLOBAL_CONF_SW_BTM_FSM                                0xC4B030
0037 
0038 #define mmPSOC_GLOBAL_CONF_SW_BOOT_SEQ_FSM                           0xC4B034
0039 
0040 #define mmPSOC_GLOBAL_CONF_BOOT_SEQ_TIMEOUT                          0xC4B038
0041 
0042 #define mmPSOC_GLOBAL_CONF_SPI_MEM_EN                                0xC4B040
0043 
0044 #define mmPSOC_GLOBAL_CONF_PRSTN                                     0xC4B044
0045 
0046 #define mmPSOC_GLOBAL_CONF_PCIE_EN                                   0xC4B048
0047 
0048 #define mmPSOC_GLOBAL_CONF_SPI_IMG_STS                               0xC4B050
0049 
0050 #define mmPSOC_GLOBAL_CONF_BOOT_SEQ_FSM                              0xC4B054
0051 
0052 #define mmPSOC_GLOBAL_CONF_SCRATCHPAD_0                              0xC4B100
0053 
0054 #define mmPSOC_GLOBAL_CONF_SCRATCHPAD_1                              0xC4B104
0055 
0056 #define mmPSOC_GLOBAL_CONF_SCRATCHPAD_2                              0xC4B108
0057 
0058 #define mmPSOC_GLOBAL_CONF_SCRATCHPAD_3                              0xC4B10C
0059 
0060 #define mmPSOC_GLOBAL_CONF_SCRATCHPAD_4                              0xC4B110
0061 
0062 #define mmPSOC_GLOBAL_CONF_SCRATCHPAD_5                              0xC4B114
0063 
0064 #define mmPSOC_GLOBAL_CONF_SCRATCHPAD_6                              0xC4B118
0065 
0066 #define mmPSOC_GLOBAL_CONF_SCRATCHPAD_7                              0xC4B11C
0067 
0068 #define mmPSOC_GLOBAL_CONF_SCRATCHPAD_8                              0xC4B120
0069 
0070 #define mmPSOC_GLOBAL_CONF_SCRATCHPAD_9                              0xC4B124
0071 
0072 #define mmPSOC_GLOBAL_CONF_SCRATCHPAD_10                             0xC4B128
0073 
0074 #define mmPSOC_GLOBAL_CONF_SCRATCHPAD_11                             0xC4B12C
0075 
0076 #define mmPSOC_GLOBAL_CONF_SCRATCHPAD_12                             0xC4B130
0077 
0078 #define mmPSOC_GLOBAL_CONF_SCRATCHPAD_13                             0xC4B134
0079 
0080 #define mmPSOC_GLOBAL_CONF_SCRATCHPAD_14                             0xC4B138
0081 
0082 #define mmPSOC_GLOBAL_CONF_SCRATCHPAD_15                             0xC4B13C
0083 
0084 #define mmPSOC_GLOBAL_CONF_SCRATCHPAD_16                             0xC4B140
0085 
0086 #define mmPSOC_GLOBAL_CONF_SCRATCHPAD_17                             0xC4B144
0087 
0088 #define mmPSOC_GLOBAL_CONF_SCRATCHPAD_18                             0xC4B148
0089 
0090 #define mmPSOC_GLOBAL_CONF_SCRATCHPAD_19                             0xC4B14C
0091 
0092 #define mmPSOC_GLOBAL_CONF_SCRATCHPAD_20                             0xC4B150
0093 
0094 #define mmPSOC_GLOBAL_CONF_SCRATCHPAD_21                             0xC4B154
0095 
0096 #define mmPSOC_GLOBAL_CONF_SCRATCHPAD_22                             0xC4B158
0097 
0098 #define mmPSOC_GLOBAL_CONF_SCRATCHPAD_23                             0xC4B15C
0099 
0100 #define mmPSOC_GLOBAL_CONF_SCRATCHPAD_24                             0xC4B160
0101 
0102 #define mmPSOC_GLOBAL_CONF_SCRATCHPAD_25                             0xC4B164
0103 
0104 #define mmPSOC_GLOBAL_CONF_SCRATCHPAD_26                             0xC4B168
0105 
0106 #define mmPSOC_GLOBAL_CONF_SCRATCHPAD_27                             0xC4B16C
0107 
0108 #define mmPSOC_GLOBAL_CONF_SCRATCHPAD_28                             0xC4B170
0109 
0110 #define mmPSOC_GLOBAL_CONF_SCRATCHPAD_29                             0xC4B174
0111 
0112 #define mmPSOC_GLOBAL_CONF_SCRATCHPAD_30                             0xC4B178
0113 
0114 #define mmPSOC_GLOBAL_CONF_SCRATCHPAD_31                             0xC4B17C
0115 
0116 #define mmPSOC_GLOBAL_CONF_SEMAPHORE_0                               0xC4B200
0117 
0118 #define mmPSOC_GLOBAL_CONF_SEMAPHORE_1                               0xC4B204
0119 
0120 #define mmPSOC_GLOBAL_CONF_SEMAPHORE_2                               0xC4B208
0121 
0122 #define mmPSOC_GLOBAL_CONF_SEMAPHORE_3                               0xC4B20C
0123 
0124 #define mmPSOC_GLOBAL_CONF_SEMAPHORE_4                               0xC4B210
0125 
0126 #define mmPSOC_GLOBAL_CONF_SEMAPHORE_5                               0xC4B214
0127 
0128 #define mmPSOC_GLOBAL_CONF_SEMAPHORE_6                               0xC4B218
0129 
0130 #define mmPSOC_GLOBAL_CONF_SEMAPHORE_7                               0xC4B21C
0131 
0132 #define mmPSOC_GLOBAL_CONF_SEMAPHORE_8                               0xC4B220
0133 
0134 #define mmPSOC_GLOBAL_CONF_SEMAPHORE_9                               0xC4B224
0135 
0136 #define mmPSOC_GLOBAL_CONF_SEMAPHORE_10                              0xC4B228
0137 
0138 #define mmPSOC_GLOBAL_CONF_SEMAPHORE_11                              0xC4B22C
0139 
0140 #define mmPSOC_GLOBAL_CONF_SEMAPHORE_12                              0xC4B230
0141 
0142 #define mmPSOC_GLOBAL_CONF_SEMAPHORE_13                              0xC4B234
0143 
0144 #define mmPSOC_GLOBAL_CONF_SEMAPHORE_14                              0xC4B238
0145 
0146 #define mmPSOC_GLOBAL_CONF_SEMAPHORE_15                              0xC4B23C
0147 
0148 #define mmPSOC_GLOBAL_CONF_SEMAPHORE_16                              0xC4B240
0149 
0150 #define mmPSOC_GLOBAL_CONF_SEMAPHORE_17                              0xC4B244
0151 
0152 #define mmPSOC_GLOBAL_CONF_SEMAPHORE_18                              0xC4B248
0153 
0154 #define mmPSOC_GLOBAL_CONF_SEMAPHORE_19                              0xC4B24C
0155 
0156 #define mmPSOC_GLOBAL_CONF_SEMAPHORE_20                              0xC4B250
0157 
0158 #define mmPSOC_GLOBAL_CONF_SEMAPHORE_21                              0xC4B254
0159 
0160 #define mmPSOC_GLOBAL_CONF_SEMAPHORE_22                              0xC4B258
0161 
0162 #define mmPSOC_GLOBAL_CONF_SEMAPHORE_23                              0xC4B25C
0163 
0164 #define mmPSOC_GLOBAL_CONF_SEMAPHORE_24                              0xC4B260
0165 
0166 #define mmPSOC_GLOBAL_CONF_SEMAPHORE_25                              0xC4B264
0167 
0168 #define mmPSOC_GLOBAL_CONF_SEMAPHORE_26                              0xC4B268
0169 
0170 #define mmPSOC_GLOBAL_CONF_SEMAPHORE_27                              0xC4B26C
0171 
0172 #define mmPSOC_GLOBAL_CONF_SEMAPHORE_28                              0xC4B270
0173 
0174 #define mmPSOC_GLOBAL_CONF_SEMAPHORE_29                              0xC4B274
0175 
0176 #define mmPSOC_GLOBAL_CONF_SEMAPHORE_30                              0xC4B278
0177 
0178 #define mmPSOC_GLOBAL_CONF_SEMAPHORE_31                              0xC4B27C
0179 
0180 #define mmPSOC_GLOBAL_CONF_WARM_REBOOT                               0xC4B300
0181 
0182 #define mmPSOC_GLOBAL_CONF_UBOOT_MAGIC                               0xC4B304
0183 
0184 #define mmPSOC_GLOBAL_CONF_SPL_SOURCE                                0xC4B308
0185 
0186 #define mmPSOC_GLOBAL_CONF_I2C_MSTR1_DBG                             0xC4B30C
0187 
0188 #define mmPSOC_GLOBAL_CONF_I2C_SLV                                   0xC4B310
0189 
0190 #define mmPSOC_GLOBAL_CONF_I2C_SLV_INTR_MASK                         0xC4B314
0191 
0192 #define mmPSOC_GLOBAL_CONF_APP_STATUS                                0xC4B320
0193 
0194 #define mmPSOC_GLOBAL_CONF_BTL_STS                                   0xC4B340
0195 
0196 #define mmPSOC_GLOBAL_CONF_TIMEOUT_INTR                              0xC4B350
0197 
0198 #define mmPSOC_GLOBAL_CONF_COMB_TIMEOUT_INTR                         0xC4B354
0199 
0200 #define mmPSOC_GLOBAL_CONF_PERIPH_INTR                               0xC4B358
0201 
0202 #define mmPSOC_GLOBAL_CONF_COMB_PERIPH_INTR                          0xC4B35C
0203 
0204 #define mmPSOC_GLOBAL_CONF_AXI_ERR_INTR                              0xC4B360
0205 
0206 #define mmPSOC_GLOBAL_CONF_TARGETID                                  0xC4B400
0207 
0208 #define mmPSOC_GLOBAL_CONF_EMMC_INT_VOL_STABLE                       0xC4B420
0209 
0210 #define mmPSOC_GLOBAL_CONF_MII_ADDR                                  0xC4B424
0211 
0212 #define mmPSOC_GLOBAL_CONF_MII_SPEED                                 0xC4B428
0213 
0214 #define mmPSOC_GLOBAL_CONF_BOOT_STRAP_PINS                           0xC4B430
0215 
0216 #define mmPSOC_GLOBAL_CONF_MEM_REPAIR_CTRL                           0xC4B450
0217 
0218 #define mmPSOC_GLOBAL_CONF_MEM_REPAIR_STS                            0xC4B454
0219 
0220 #define mmPSOC_GLOBAL_CONF_OUTSTANT_TRANS                            0xC4B458
0221 
0222 #define mmPSOC_GLOBAL_CONF_MASK_REQ                                  0xC4B45C
0223 
0224 #define mmPSOC_GLOBAL_CONF_PRSTN_RST_CFG                             0xC4B470
0225 
0226 #define mmPSOC_GLOBAL_CONF_SW_ALL_RST_CFG                            0xC4B474
0227 
0228 #define mmPSOC_GLOBAL_CONF_WD_RST_CFG                                0xC4B478
0229 
0230 #define mmPSOC_GLOBAL_CONF_MNL_RST_CFG                               0xC4B47C
0231 
0232 #define mmPSOC_GLOBAL_CONF_UNIT_RST_N                                0xC4B480
0233 
0234 #define mmPSOC_GLOBAL_CONF_PRSTN_MASK                                0xC4B484
0235 
0236 #define mmPSOC_GLOBAL_CONF_WD_MASK                                   0xC4B488
0237 
0238 #define mmPSOC_GLOBAL_CONF_RST_SRC                                   0xC4B490
0239 
0240 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_0                             0xC4B500
0241 
0242 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_1                             0xC4B504
0243 
0244 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_2                             0xC4B508
0245 
0246 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_3                             0xC4B50C
0247 
0248 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_4                             0xC4B510
0249 
0250 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_5                             0xC4B514
0251 
0252 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_6                             0xC4B518
0253 
0254 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_7                             0xC4B51C
0255 
0256 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_8                             0xC4B520
0257 
0258 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_9                             0xC4B524
0259 
0260 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_10                            0xC4B528
0261 
0262 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_11                            0xC4B52C
0263 
0264 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_12                            0xC4B530
0265 
0266 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_13                            0xC4B534
0267 
0268 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_14                            0xC4B538
0269 
0270 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_15                            0xC4B53C
0271 
0272 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_16                            0xC4B540
0273 
0274 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_17                            0xC4B544
0275 
0276 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_18                            0xC4B548
0277 
0278 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_19                            0xC4B54C
0279 
0280 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_20                            0xC4B550
0281 
0282 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_21                            0xC4B554
0283 
0284 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_22                            0xC4B558
0285 
0286 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_23                            0xC4B55C
0287 
0288 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_24                            0xC4B560
0289 
0290 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_25                            0xC4B564
0291 
0292 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_26                            0xC4B568
0293 
0294 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_27                            0xC4B56C
0295 
0296 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_28                            0xC4B570
0297 
0298 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_29                            0xC4B574
0299 
0300 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_30                            0xC4B578
0301 
0302 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_31                            0xC4B57C
0303 
0304 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_32                            0xC4B580
0305 
0306 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_33                            0xC4B584
0307 
0308 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_34                            0xC4B588
0309 
0310 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_35                            0xC4B58C
0311 
0312 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_36                            0xC4B590
0313 
0314 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_37                            0xC4B594
0315 
0316 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_38                            0xC4B598
0317 
0318 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_39                            0xC4B59C
0319 
0320 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_40                            0xC4B5A0
0321 
0322 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_41                            0xC4B5A4
0323 
0324 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_42                            0xC4B5A8
0325 
0326 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_43                            0xC4B5AC
0327 
0328 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_44                            0xC4B5B0
0329 
0330 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_45                            0xC4B5B4
0331 
0332 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_46                            0xC4B5B8
0333 
0334 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_47                            0xC4B5BC
0335 
0336 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_48                            0xC4B5C0
0337 
0338 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_49                            0xC4B5C4
0339 
0340 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_50                            0xC4B5C8
0341 
0342 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_51                            0xC4B5CC
0343 
0344 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_52                            0xC4B5D0
0345 
0346 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_53                            0xC4B5D4
0347 
0348 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_54                            0xC4B5D8
0349 
0350 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_55                            0xC4B5DC
0351 
0352 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_56                            0xC4B5E0
0353 
0354 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_57                            0xC4B5E4
0355 
0356 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_58                            0xC4B5E8
0357 
0358 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_59                            0xC4B5EC
0359 
0360 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_60                            0xC4B5F0
0361 
0362 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_61                            0xC4B5F4
0363 
0364 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_62                            0xC4B5F8
0365 
0366 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_63                            0xC4B5FC
0367 
0368 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_64                            0xC4B600
0369 
0370 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_65                            0xC4B604
0371 
0372 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_66                            0xC4B608
0373 
0374 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_67                            0xC4B60C
0375 
0376 #define mmPSOC_GLOBAL_CONF_PAD_1V8_CFG_68                            0xC4B610
0377 
0378 #define mmPSOC_GLOBAL_CONF_PAD_3V3_CFG_0                             0xC4B640
0379 
0380 #define mmPSOC_GLOBAL_CONF_PAD_3V3_CFG_1                             0xC4B644
0381 
0382 #define mmPSOC_GLOBAL_CONF_PAD_3V3_CFG_2                             0xC4B648
0383 
0384 #define mmPSOC_GLOBAL_CONF_PAD_3V3_CFG_3                             0xC4B64C
0385 
0386 #define mmPSOC_GLOBAL_CONF_PAD_3V3_CFG_4                             0xC4B650
0387 
0388 #define mmPSOC_GLOBAL_CONF_PAD_3V3_CFG_5                             0xC4B654
0389 
0390 #define mmPSOC_GLOBAL_CONF_PAD_3V3_CFG_6                             0xC4B658
0391 
0392 #define mmPSOC_GLOBAL_CONF_PAD_3V3_CFG_7                             0xC4B65C
0393 
0394 #define mmPSOC_GLOBAL_CONF_PAD_3V3_CFG_8                             0xC4B660
0395 
0396 #define mmPSOC_GLOBAL_CONF_PAD_3V3_CFG_9                             0xC4B664
0397 
0398 #define mmPSOC_GLOBAL_CONF_PAD_3V3_CFG_10                            0xC4B668
0399 
0400 #define mmPSOC_GLOBAL_CONF_PAD_3V3_CFG_11                            0xC4B66C
0401 
0402 #define mmPSOC_GLOBAL_CONF_PAD_1V8_INPUT_0                           0xC4B680
0403 
0404 #define mmPSOC_GLOBAL_CONF_PAD_1V8_INPUT_1                           0xC4B684
0405 
0406 #define mmPSOC_GLOBAL_CONF_PAD_1V8_INPUT_2                           0xC4B688
0407 
0408 #define mmPSOC_GLOBAL_CONF_PAD_1V8_INPUT_3                           0xC4B68C
0409 
0410 #define mmPSOC_GLOBAL_CONF_PAD_1V8_INPUT_4                           0xC4B690
0411 
0412 #define mmPSOC_GLOBAL_CONF_PAD_1V8_INPUT_5                           0xC4B694
0413 
0414 #define mmPSOC_GLOBAL_CONF_BNK3V3_MS                                 0xC4B6E0
0415 
0416 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_0                             0xC4B700
0417 
0418 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_1                             0xC4B704
0419 
0420 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_2                             0xC4B708
0421 
0422 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_3                             0xC4B70C
0423 
0424 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_4                             0xC4B710
0425 
0426 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_5                             0xC4B714
0427 
0428 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_6                             0xC4B718
0429 
0430 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_7                             0xC4B71C
0431 
0432 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_8                             0xC4B720
0433 
0434 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_9                             0xC4B724
0435 
0436 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_10                            0xC4B728
0437 
0438 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_11                            0xC4B72C
0439 
0440 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_12                            0xC4B730
0441 
0442 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_13                            0xC4B734
0443 
0444 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_14                            0xC4B738
0445 
0446 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_15                            0xC4B73C
0447 
0448 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_16                            0xC4B740
0449 
0450 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_17                            0xC4B744
0451 
0452 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_18                            0xC4B748
0453 
0454 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_19                            0xC4B74C
0455 
0456 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_20                            0xC4B750
0457 
0458 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_21                            0xC4B754
0459 
0460 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_22                            0xC4B758
0461 
0462 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_23                            0xC4B75C
0463 
0464 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_24                            0xC4B760
0465 
0466 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_25                            0xC4B764
0467 
0468 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_26                            0xC4B768
0469 
0470 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_27                            0xC4B76C
0471 
0472 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_28                            0xC4B770
0473 
0474 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_29                            0xC4B774
0475 
0476 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_30                            0xC4B778
0477 
0478 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_31                            0xC4B77C
0479 
0480 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_32                            0xC4B780
0481 
0482 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_33                            0xC4B784
0483 
0484 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_34                            0xC4B788
0485 
0486 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_35                            0xC4B78C
0487 
0488 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_36                            0xC4B790
0489 
0490 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_37                            0xC4B794
0491 
0492 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_38                            0xC4B798
0493 
0494 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_39                            0xC4B79C
0495 
0496 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_40                            0xC4B7A0
0497 
0498 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_41                            0xC4B7A4
0499 
0500 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_42                            0xC4B7A8
0501 
0502 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_43                            0xC4B7AC
0503 
0504 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_44                            0xC4B7B0
0505 
0506 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_45                            0xC4B7B4
0507 
0508 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_46                            0xC4B7B8
0509 
0510 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_47                            0xC4B7BC
0511 
0512 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_48                            0xC4B7C0
0513 
0514 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_49                            0xC4B7C4
0515 
0516 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_50                            0xC4B7C8
0517 
0518 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_51                            0xC4B7CC
0519 
0520 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_52                            0xC4B7D0
0521 
0522 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_53                            0xC4B7D4
0523 
0524 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_54                            0xC4B7D8
0525 
0526 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_55                            0xC4B7DC
0527 
0528 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_56                            0xC4B7E0
0529 
0530 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_57                            0xC4B7E4
0531 
0532 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_58                            0xC4B7E8
0533 
0534 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_59                            0xC4B7EC
0535 
0536 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_60                            0xC4B7F0
0537 
0538 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_61                            0xC4B7F4
0539 
0540 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_62                            0xC4B7F8
0541 
0542 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_63                            0xC4B7FC
0543 
0544 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_64                            0xC4B800
0545 
0546 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_65                            0xC4B804
0547 
0548 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_66                            0xC4B808
0549 
0550 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_67                            0xC4B80C
0551 
0552 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_68                            0xC4B810
0553 
0554 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_69                            0xC4B814
0555 
0556 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_70                            0xC4B818
0557 
0558 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_71                            0xC4B81C
0559 
0560 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_72                            0xC4B820
0561 
0562 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_73                            0xC4B824
0563 
0564 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_74                            0xC4B828
0565 
0566 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_75                            0xC4B82C
0567 
0568 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_76                            0xC4B830
0569 
0570 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_77                            0xC4B834
0571 
0572 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_78                            0xC4B838
0573 
0574 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_79                            0xC4B83C
0575 
0576 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_80                            0xC4B840
0577 
0578 #define mmPSOC_GLOBAL_CONF_PAD_DEFAULT_81                            0xC4B844
0579 
0580 #define mmPSOC_GLOBAL_CONF_PAD_SEL_0                                 0xC4B900
0581 
0582 #define mmPSOC_GLOBAL_CONF_PAD_SEL_1                                 0xC4B904
0583 
0584 #define mmPSOC_GLOBAL_CONF_PAD_SEL_2                                 0xC4B908
0585 
0586 #define mmPSOC_GLOBAL_CONF_PAD_SEL_3                                 0xC4B90C
0587 
0588 #define mmPSOC_GLOBAL_CONF_PAD_SEL_4                                 0xC4B910
0589 
0590 #define mmPSOC_GLOBAL_CONF_PAD_SEL_5                                 0xC4B914
0591 
0592 #define mmPSOC_GLOBAL_CONF_PAD_SEL_6                                 0xC4B918
0593 
0594 #define mmPSOC_GLOBAL_CONF_PAD_SEL_7                                 0xC4B91C
0595 
0596 #define mmPSOC_GLOBAL_CONF_PAD_SEL_8                                 0xC4B920
0597 
0598 #define mmPSOC_GLOBAL_CONF_PAD_SEL_9                                 0xC4B924
0599 
0600 #define mmPSOC_GLOBAL_CONF_PAD_SEL_10                                0xC4B928
0601 
0602 #define mmPSOC_GLOBAL_CONF_PAD_SEL_11                                0xC4B92C
0603 
0604 #define mmPSOC_GLOBAL_CONF_PAD_SEL_12                                0xC4B930
0605 
0606 #define mmPSOC_GLOBAL_CONF_PAD_SEL_13                                0xC4B934
0607 
0608 #define mmPSOC_GLOBAL_CONF_PAD_SEL_14                                0xC4B938
0609 
0610 #define mmPSOC_GLOBAL_CONF_PAD_SEL_15                                0xC4B93C
0611 
0612 #define mmPSOC_GLOBAL_CONF_PAD_SEL_16                                0xC4B940
0613 
0614 #define mmPSOC_GLOBAL_CONF_PAD_SEL_17                                0xC4B944
0615 
0616 #define mmPSOC_GLOBAL_CONF_PAD_SEL_18                                0xC4B948
0617 
0618 #define mmPSOC_GLOBAL_CONF_PAD_SEL_19                                0xC4B94C
0619 
0620 #define mmPSOC_GLOBAL_CONF_PAD_SEL_20                                0xC4B950
0621 
0622 #define mmPSOC_GLOBAL_CONF_PAD_SEL_21                                0xC4B954
0623 
0624 #define mmPSOC_GLOBAL_CONF_PAD_SEL_22                                0xC4B958
0625 
0626 #define mmPSOC_GLOBAL_CONF_PAD_SEL_23                                0xC4B95C
0627 
0628 #define mmPSOC_GLOBAL_CONF_PAD_SEL_24                                0xC4B960
0629 
0630 #define mmPSOC_GLOBAL_CONF_PAD_SEL_25                                0xC4B964
0631 
0632 #define mmPSOC_GLOBAL_CONF_PAD_SEL_26                                0xC4B968
0633 
0634 #define mmPSOC_GLOBAL_CONF_PAD_SEL_27                                0xC4B96C
0635 
0636 #define mmPSOC_GLOBAL_CONF_PAD_SEL_28                                0xC4B970
0637 
0638 #define mmPSOC_GLOBAL_CONF_PAD_SEL_29                                0xC4B974
0639 
0640 #define mmPSOC_GLOBAL_CONF_PAD_SEL_30                                0xC4B978
0641 
0642 #define mmPSOC_GLOBAL_CONF_PAD_SEL_31                                0xC4B97C
0643 
0644 #define mmPSOC_GLOBAL_CONF_PAD_SEL_32                                0xC4B980
0645 
0646 #define mmPSOC_GLOBAL_CONF_PAD_SEL_33                                0xC4B984
0647 
0648 #define mmPSOC_GLOBAL_CONF_PAD_SEL_34                                0xC4B988
0649 
0650 #define mmPSOC_GLOBAL_CONF_PAD_SEL_35                                0xC4B98C
0651 
0652 #define mmPSOC_GLOBAL_CONF_PAD_SEL_36                                0xC4B990
0653 
0654 #define mmPSOC_GLOBAL_CONF_PAD_SEL_37                                0xC4B994
0655 
0656 #define mmPSOC_GLOBAL_CONF_PAD_SEL_38                                0xC4B998
0657 
0658 #define mmPSOC_GLOBAL_CONF_PAD_SEL_39                                0xC4B99C
0659 
0660 #define mmPSOC_GLOBAL_CONF_PAD_SEL_40                                0xC4B9A0
0661 
0662 #define mmPSOC_GLOBAL_CONF_PAD_SEL_41                                0xC4B9A4
0663 
0664 #define mmPSOC_GLOBAL_CONF_PAD_SEL_42                                0xC4B9A8
0665 
0666 #define mmPSOC_GLOBAL_CONF_PAD_SEL_43                                0xC4B9AC
0667 
0668 #define mmPSOC_GLOBAL_CONF_PAD_SEL_44                                0xC4B9B0
0669 
0670 #define mmPSOC_GLOBAL_CONF_PAD_SEL_45                                0xC4B9B4
0671 
0672 #define mmPSOC_GLOBAL_CONF_PAD_SEL_46                                0xC4B9B8
0673 
0674 #define mmPSOC_GLOBAL_CONF_PAD_SEL_47                                0xC4B9BC
0675 
0676 #define mmPSOC_GLOBAL_CONF_PAD_SEL_48                                0xC4B9C0
0677 
0678 #define mmPSOC_GLOBAL_CONF_PAD_SEL_49                                0xC4B9C4
0679 
0680 #define mmPSOC_GLOBAL_CONF_PAD_SEL_50                                0xC4B9C8
0681 
0682 #define mmPSOC_GLOBAL_CONF_PAD_SEL_51                                0xC4B9CC
0683 
0684 #define mmPSOC_GLOBAL_CONF_PAD_SEL_52                                0xC4B9D0
0685 
0686 #define mmPSOC_GLOBAL_CONF_PAD_SEL_53                                0xC4B9D4
0687 
0688 #define mmPSOC_GLOBAL_CONF_PAD_SEL_54                                0xC4B9D8
0689 
0690 #define mmPSOC_GLOBAL_CONF_PAD_SEL_55                                0xC4B9DC
0691 
0692 #define mmPSOC_GLOBAL_CONF_PAD_SEL_56                                0xC4B9E0
0693 
0694 #define mmPSOC_GLOBAL_CONF_PAD_SEL_57                                0xC4B9E4
0695 
0696 #define mmPSOC_GLOBAL_CONF_PAD_SEL_58                                0xC4B9E8
0697 
0698 #define mmPSOC_GLOBAL_CONF_PAD_SEL_59                                0xC4B9EC
0699 
0700 #define mmPSOC_GLOBAL_CONF_PAD_SEL_60                                0xC4B9F0
0701 
0702 #define mmPSOC_GLOBAL_CONF_PAD_SEL_61                                0xC4B9F4
0703 
0704 #define mmPSOC_GLOBAL_CONF_PAD_SEL_62                                0xC4B9F8
0705 
0706 #define mmPSOC_GLOBAL_CONF_PAD_SEL_63                                0xC4B9FC
0707 
0708 #define mmPSOC_GLOBAL_CONF_PAD_SEL_64                                0xC4BA00
0709 
0710 #define mmPSOC_GLOBAL_CONF_PAD_SEL_65                                0xC4BA04
0711 
0712 #define mmPSOC_GLOBAL_CONF_PAD_SEL_66                                0xC4BA08
0713 
0714 #define mmPSOC_GLOBAL_CONF_PAD_SEL_67                                0xC4BA0C
0715 
0716 #define mmPSOC_GLOBAL_CONF_PAD_SEL_68                                0xC4BA10
0717 
0718 #define mmPSOC_GLOBAL_CONF_PAD_SEL_69                                0xC4BA14
0719 
0720 #define mmPSOC_GLOBAL_CONF_PAD_SEL_70                                0xC4BA18
0721 
0722 #define mmPSOC_GLOBAL_CONF_PAD_SEL_71                                0xC4BA1C
0723 
0724 #define mmPSOC_GLOBAL_CONF_PAD_SEL_72                                0xC4BA20
0725 
0726 #define mmPSOC_GLOBAL_CONF_PAD_SEL_73                                0xC4BA24
0727 
0728 #define mmPSOC_GLOBAL_CONF_PAD_SEL_74                                0xC4BA28
0729 
0730 #define mmPSOC_GLOBAL_CONF_PAD_SEL_75                                0xC4BA2C
0731 
0732 #define mmPSOC_GLOBAL_CONF_PAD_SEL_76                                0xC4BA30
0733 
0734 #define mmPSOC_GLOBAL_CONF_PAD_SEL_77                                0xC4BA34
0735 
0736 #define mmPSOC_GLOBAL_CONF_PAD_SEL_78                                0xC4BA38
0737 
0738 #define mmPSOC_GLOBAL_CONF_PAD_SEL_79                                0xC4BA3C
0739 
0740 #define mmPSOC_GLOBAL_CONF_PAD_SEL_80                                0xC4BA40
0741 
0742 #define mmPSOC_GLOBAL_CONF_PAD_SEL_81                                0xC4BA44
0743 
0744 #endif /* ASIC_REG_PSOC_GLOBAL_CONF_REGS_H_ */