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0013 #ifndef ASIC_REG_PSOC_EMMC_PLL_REGS_H_
0014 #define ASIC_REG_PSOC_EMMC_PLL_REGS_H_
0015
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0021
0022 #define mmPSOC_EMMC_PLL_NR 0xC70100
0023
0024 #define mmPSOC_EMMC_PLL_NF 0xC70104
0025
0026 #define mmPSOC_EMMC_PLL_OD 0xC70108
0027
0028 #define mmPSOC_EMMC_PLL_NB 0xC7010C
0029
0030 #define mmPSOC_EMMC_PLL_CFG 0xC70110
0031
0032 #define mmPSOC_EMMC_PLL_LOSE_MASK 0xC70120
0033
0034 #define mmPSOC_EMMC_PLL_LOCK_INTR 0xC70128
0035
0036 #define mmPSOC_EMMC_PLL_LOCK_BYPASS 0xC7012C
0037
0038 #define mmPSOC_EMMC_PLL_DATA_CHNG 0xC70130
0039
0040 #define mmPSOC_EMMC_PLL_RST 0xC70134
0041
0042 #define mmPSOC_EMMC_PLL_SLIP_WD_CNTR 0xC70150
0043
0044 #define mmPSOC_EMMC_PLL_DIV_FACTOR_0 0xC70200
0045
0046 #define mmPSOC_EMMC_PLL_DIV_FACTOR_1 0xC70204
0047
0048 #define mmPSOC_EMMC_PLL_DIV_FACTOR_2 0xC70208
0049
0050 #define mmPSOC_EMMC_PLL_DIV_FACTOR_3 0xC7020C
0051
0052 #define mmPSOC_EMMC_PLL_DIV_FACTOR_CMD_0 0xC70220
0053
0054 #define mmPSOC_EMMC_PLL_DIV_FACTOR_CMD_1 0xC70224
0055
0056 #define mmPSOC_EMMC_PLL_DIV_FACTOR_CMD_2 0xC70228
0057
0058 #define mmPSOC_EMMC_PLL_DIV_FACTOR_CMD_3 0xC7022C
0059
0060 #define mmPSOC_EMMC_PLL_DIV_SEL_0 0xC70280
0061
0062 #define mmPSOC_EMMC_PLL_DIV_SEL_1 0xC70284
0063
0064 #define mmPSOC_EMMC_PLL_DIV_SEL_2 0xC70288
0065
0066 #define mmPSOC_EMMC_PLL_DIV_SEL_3 0xC7028C
0067
0068 #define mmPSOC_EMMC_PLL_DIV_EN_0 0xC702A0
0069
0070 #define mmPSOC_EMMC_PLL_DIV_EN_1 0xC702A4
0071
0072 #define mmPSOC_EMMC_PLL_DIV_EN_2 0xC702A8
0073
0074 #define mmPSOC_EMMC_PLL_DIV_EN_3 0xC702AC
0075
0076 #define mmPSOC_EMMC_PLL_DIV_FACTOR_BUSY_0 0xC702C0
0077
0078 #define mmPSOC_EMMC_PLL_DIV_FACTOR_BUSY_1 0xC702C4
0079
0080 #define mmPSOC_EMMC_PLL_DIV_FACTOR_BUSY_2 0xC702C8
0081
0082 #define mmPSOC_EMMC_PLL_DIV_FACTOR_BUSY_3 0xC702CC
0083
0084 #define mmPSOC_EMMC_PLL_CLK_GATER 0xC70300
0085
0086 #define mmPSOC_EMMC_PLL_CLK_RLX_0 0xC70310
0087
0088 #define mmPSOC_EMMC_PLL_CLK_RLX_1 0xC70314
0089
0090 #define mmPSOC_EMMC_PLL_CLK_RLX_2 0xC70318
0091
0092 #define mmPSOC_EMMC_PLL_CLK_RLX_3 0xC7031C
0093
0094 #define mmPSOC_EMMC_PLL_REF_CNTR_PERIOD 0xC70400
0095
0096 #define mmPSOC_EMMC_PLL_REF_LOW_THRESHOLD 0xC70410
0097
0098 #define mmPSOC_EMMC_PLL_REF_HIGH_THRESHOLD 0xC70420
0099
0100 #define mmPSOC_EMMC_PLL_PLL_NOT_STABLE 0xC70430
0101
0102 #define mmPSOC_EMMC_PLL_FREQ_CALC_EN 0xC70440
0103
0104 #endif