OSCL-LXR linux-6.0.1/​drivers/​misc/​habanalabs/​include/​goya/​asic_reg/​mme2_rtr_regs.h	Source navigation Diff markup Identifier search General search
	Version: linux-6.0.1 spark-3.0.0 hadoop-3.2.0-src hadoop-3.3.0-src spark-2.4.7 linux-4.15.13 hadoop-2.7.4-src Revert   Change

 /* SPDX-License-Identifier: GPL-2.0
  *
  * Copyright 2016-2018 HabanaLabs, Ltd.
  * All Rights Reserved.
  *
  */
 
 /************************************
  ** This is an auto-generated file **
  **       DO NOT EDIT BELOW        **
  ************************************/
 
 #ifndef ASIC_REG_MME2_RTR_REGS_H_
 #define ASIC_REG_MME2_RTR_REGS_H_
 
 /*
  *****************************************
  *   MME2_RTR (Prototype: MME_RTR)
  *****************************************
  */
 
 #define mmMME2_RTR_HBW_RD_RQ_E_ARB                                   0x80100
 
 #define mmMME2_RTR_HBW_RD_RQ_W_ARB                                   0x80104
 
 #define mmMME2_RTR_HBW_RD_RQ_N_ARB                                   0x80108
 
 #define mmMME2_RTR_HBW_RD_RQ_S_ARB                                   0x8010C
 
 #define mmMME2_RTR_HBW_RD_RQ_L_ARB                                   0x80110
 
 #define mmMME2_RTR_HBW_E_ARB_MAX                                     0x80120
 
 #define mmMME2_RTR_HBW_W_ARB_MAX                                     0x80124
 
 #define mmMME2_RTR_HBW_N_ARB_MAX                                     0x80128
 
 #define mmMME2_RTR_HBW_S_ARB_MAX                                     0x8012C
 
 #define mmMME2_RTR_HBW_L_ARB_MAX                                     0x80130
 
 #define mmMME2_RTR_HBW_RD_RS_MAX_CREDIT                              0x80140
 
 #define mmMME2_RTR_HBW_WR_RQ_MAX_CREDIT                              0x80144
 
 #define mmMME2_RTR_HBW_RD_RQ_MAX_CREDIT                              0x80148
 
 #define mmMME2_RTR_HBW_RD_RS_E_ARB                                   0x80150
 
 #define mmMME2_RTR_HBW_RD_RS_W_ARB                                   0x80154
 
 #define mmMME2_RTR_HBW_RD_RS_N_ARB                                   0x80158
 
 #define mmMME2_RTR_HBW_RD_RS_S_ARB                                   0x8015C
 
 #define mmMME2_RTR_HBW_RD_RS_L_ARB                                   0x80160
 
 #define mmMME2_RTR_HBW_WR_RQ_E_ARB                                   0x80170
 
 #define mmMME2_RTR_HBW_WR_RQ_W_ARB                                   0x80174
 
 #define mmMME2_RTR_HBW_WR_RQ_N_ARB                                   0x80178
 
 #define mmMME2_RTR_HBW_WR_RQ_S_ARB                                   0x8017C
 
 #define mmMME2_RTR_HBW_WR_RQ_L_ARB                                   0x80180
 
 #define mmMME2_RTR_HBW_WR_RS_E_ARB                                   0x80190
 
 #define mmMME2_RTR_HBW_WR_RS_W_ARB                                   0x80194
 
 #define mmMME2_RTR_HBW_WR_RS_N_ARB                                   0x80198
 
 #define mmMME2_RTR_HBW_WR_RS_S_ARB                                   0x8019C
 
 #define mmMME2_RTR_HBW_WR_RS_L_ARB                                   0x801A0
 
 #define mmMME2_RTR_LBW_RD_RQ_E_ARB                                   0x80200
 
 #define mmMME2_RTR_LBW_RD_RQ_W_ARB                                   0x80204
 
 #define mmMME2_RTR_LBW_RD_RQ_N_ARB                                   0x80208
 
 #define mmMME2_RTR_LBW_RD_RQ_S_ARB                                   0x8020C
 
 #define mmMME2_RTR_LBW_RD_RQ_L_ARB                                   0x80210
 
 #define mmMME2_RTR_LBW_E_ARB_MAX                                     0x80220
 
 #define mmMME2_RTR_LBW_W_ARB_MAX                                     0x80224
 
 #define mmMME2_RTR_LBW_N_ARB_MAX                                     0x80228
 
 #define mmMME2_RTR_LBW_S_ARB_MAX                                     0x8022C
 
 #define mmMME2_RTR_LBW_L_ARB_MAX                                     0x80230
 
 #define mmMME2_RTR_LBW_SRAM_MAX_CREDIT                               0x80240
 
 #define mmMME2_RTR_LBW_RD_RS_E_ARB                                   0x80250
 
 #define mmMME2_RTR_LBW_RD_RS_W_ARB                                   0x80254
 
 #define mmMME2_RTR_LBW_RD_RS_N_ARB                                   0x80258
 
 #define mmMME2_RTR_LBW_RD_RS_S_ARB                                   0x8025C
 
 #define mmMME2_RTR_LBW_RD_RS_L_ARB                                   0x80260
 
 #define mmMME2_RTR_LBW_WR_RQ_E_ARB                                   0x80270
 
 #define mmMME2_RTR_LBW_WR_RQ_W_ARB                                   0x80274
 
 #define mmMME2_RTR_LBW_WR_RQ_N_ARB                                   0x80278
 
 #define mmMME2_RTR_LBW_WR_RQ_S_ARB                                   0x8027C
 
 #define mmMME2_RTR_LBW_WR_RQ_L_ARB                                   0x80280
 
 #define mmMME2_RTR_LBW_WR_RS_E_ARB                                   0x80290
 
 #define mmMME2_RTR_LBW_WR_RS_W_ARB                                   0x80294
 
 #define mmMME2_RTR_LBW_WR_RS_N_ARB                                   0x80298
 
 #define mmMME2_RTR_LBW_WR_RS_S_ARB                                   0x8029C
 
 #define mmMME2_RTR_LBW_WR_RS_L_ARB                                   0x802A0
 
 #define mmMME2_RTR_DBG_E_ARB                                         0x80300
 
 #define mmMME2_RTR_DBG_W_ARB                                         0x80304
 
 #define mmMME2_RTR_DBG_N_ARB                                         0x80308
 
 #define mmMME2_RTR_DBG_S_ARB                                         0x8030C
 
 #define mmMME2_RTR_DBG_L_ARB                                         0x80310
 
 #define mmMME2_RTR_DBG_E_ARB_MAX                                     0x80320
 
 #define mmMME2_RTR_DBG_W_ARB_MAX                                     0x80324
 
 #define mmMME2_RTR_DBG_N_ARB_MAX                                     0x80328
 
 #define mmMME2_RTR_DBG_S_ARB_MAX                                     0x8032C
 
 #define mmMME2_RTR_DBG_L_ARB_MAX                                     0x80330
 
 #define mmMME2_RTR_SPLIT_COEF_0                                      0x80400
 
 #define mmMME2_RTR_SPLIT_COEF_1                                      0x80404
 
 #define mmMME2_RTR_SPLIT_COEF_2                                      0x80408
 
 #define mmMME2_RTR_SPLIT_COEF_3                                      0x8040C
 
 #define mmMME2_RTR_SPLIT_COEF_4                                      0x80410
 
 #define mmMME2_RTR_SPLIT_COEF_5                                      0x80414
 
 #define mmMME2_RTR_SPLIT_COEF_6                                      0x80418
 
 #define mmMME2_RTR_SPLIT_COEF_7                                      0x8041C
 
 #define mmMME2_RTR_SPLIT_COEF_8                                      0x80420
 
 #define mmMME2_RTR_SPLIT_COEF_9                                      0x80424
 
 #define mmMME2_RTR_SPLIT_CFG                                         0x80440
 
 #define mmMME2_RTR_SPLIT_RD_SAT                                      0x80444
 
 #define mmMME2_RTR_SPLIT_RD_RST_TOKEN                                0x80448
 
 #define mmMME2_RTR_SPLIT_RD_TIMEOUT_0                                0x8044C
 
 #define mmMME2_RTR_SPLIT_RD_TIMEOUT_1                                0x80450
 
 #define mmMME2_RTR_SPLIT_WR_SAT                                      0x80454
 
 #define mmMME2_RTR_WPLIT_WR_TST_TOLEN                                0x80458
 
 #define mmMME2_RTR_SPLIT_WR_TIMEOUT_0                                0x8045C
 
 #define mmMME2_RTR_SPLIT_WR_TIMEOUT_1                                0x80460
 
 #define mmMME2_RTR_HBW_RANGE_HIT                                     0x80470
 
 #define mmMME2_RTR_HBW_RANGE_MASK_L_0                                0x80480
 
 #define mmMME2_RTR_HBW_RANGE_MASK_L_1                                0x80484
 
 #define mmMME2_RTR_HBW_RANGE_MASK_L_2                                0x80488
 
 #define mmMME2_RTR_HBW_RANGE_MASK_L_3                                0x8048C
 
 #define mmMME2_RTR_HBW_RANGE_MASK_L_4                                0x80490
 
 #define mmMME2_RTR_HBW_RANGE_MASK_L_5                                0x80494
 
 #define mmMME2_RTR_HBW_RANGE_MASK_L_6                                0x80498
 
 #define mmMME2_RTR_HBW_RANGE_MASK_L_7                                0x8049C
 
 #define mmMME2_RTR_HBW_RANGE_MASK_H_0                                0x804A0
 
 #define mmMME2_RTR_HBW_RANGE_MASK_H_1                                0x804A4
 
 #define mmMME2_RTR_HBW_RANGE_MASK_H_2                                0x804A8
 
 #define mmMME2_RTR_HBW_RANGE_MASK_H_3                                0x804AC
 
 #define mmMME2_RTR_HBW_RANGE_MASK_H_4                                0x804B0
 
 #define mmMME2_RTR_HBW_RANGE_MASK_H_5                                0x804B4
 
 #define mmMME2_RTR_HBW_RANGE_MASK_H_6                                0x804B8
 
 #define mmMME2_RTR_HBW_RANGE_MASK_H_7                                0x804BC
 
 #define mmMME2_RTR_HBW_RANGE_BASE_L_0                                0x804C0
 
 #define mmMME2_RTR_HBW_RANGE_BASE_L_1                                0x804C4
 
 #define mmMME2_RTR_HBW_RANGE_BASE_L_2                                0x804C8
 
 #define mmMME2_RTR_HBW_RANGE_BASE_L_3                                0x804CC
 
 #define mmMME2_RTR_HBW_RANGE_BASE_L_4                                0x804D0
 
 #define mmMME2_RTR_HBW_RANGE_BASE_L_5                                0x804D4
 
 #define mmMME2_RTR_HBW_RANGE_BASE_L_6                                0x804D8
 
 #define mmMME2_RTR_HBW_RANGE_BASE_L_7                                0x804DC
 
 #define mmMME2_RTR_HBW_RANGE_BASE_H_0                                0x804E0
 
 #define mmMME2_RTR_HBW_RANGE_BASE_H_1                                0x804E4
 
 #define mmMME2_RTR_HBW_RANGE_BASE_H_2                                0x804E8
 
 #define mmMME2_RTR_HBW_RANGE_BASE_H_3                                0x804EC
 
 #define mmMME2_RTR_HBW_RANGE_BASE_H_4                                0x804F0
 
 #define mmMME2_RTR_HBW_RANGE_BASE_H_5                                0x804F4
 
 #define mmMME2_RTR_HBW_RANGE_BASE_H_6                                0x804F8
 
 #define mmMME2_RTR_HBW_RANGE_BASE_H_7                                0x804FC
 
 #define mmMME2_RTR_LBW_RANGE_HIT                                     0x80500
 
 #define mmMME2_RTR_LBW_RANGE_MASK_0                                  0x80510
 
 #define mmMME2_RTR_LBW_RANGE_MASK_1                                  0x80514
 
 #define mmMME2_RTR_LBW_RANGE_MASK_2                                  0x80518
 
 #define mmMME2_RTR_LBW_RANGE_MASK_3                                  0x8051C
 
 #define mmMME2_RTR_LBW_RANGE_MASK_4                                  0x80520
 
 #define mmMME2_RTR_LBW_RANGE_MASK_5                                  0x80524
 
 #define mmMME2_RTR_LBW_RANGE_MASK_6                                  0x80528
 
 #define mmMME2_RTR_LBW_RANGE_MASK_7                                  0x8052C
 
 #define mmMME2_RTR_LBW_RANGE_MASK_8                                  0x80530
 
 #define mmMME2_RTR_LBW_RANGE_MASK_9                                  0x80534
 
 #define mmMME2_RTR_LBW_RANGE_MASK_10                                 0x80538
 
 #define mmMME2_RTR_LBW_RANGE_MASK_11                                 0x8053C
 
 #define mmMME2_RTR_LBW_RANGE_MASK_12                                 0x80540
 
 #define mmMME2_RTR_LBW_RANGE_MASK_13                                 0x80544
 
 #define mmMME2_RTR_LBW_RANGE_MASK_14                                 0x80548
 
 #define mmMME2_RTR_LBW_RANGE_MASK_15                                 0x8054C
 
 #define mmMME2_RTR_LBW_RANGE_BASE_0                                  0x80550
 
 #define mmMME2_RTR_LBW_RANGE_BASE_1                                  0x80554
 
 #define mmMME2_RTR_LBW_RANGE_BASE_2                                  0x80558
 
 #define mmMME2_RTR_LBW_RANGE_BASE_3                                  0x8055C
 
 #define mmMME2_RTR_LBW_RANGE_BASE_4                                  0x80560
 
 #define mmMME2_RTR_LBW_RANGE_BASE_5                                  0x80564
 
 #define mmMME2_RTR_LBW_RANGE_BASE_6                                  0x80568
 
 #define mmMME2_RTR_LBW_RANGE_BASE_7                                  0x8056C
 
 #define mmMME2_RTR_LBW_RANGE_BASE_8                                  0x80570
 
 #define mmMME2_RTR_LBW_RANGE_BASE_9                                  0x80574
 
 #define mmMME2_RTR_LBW_RANGE_BASE_10                                 0x80578
 
 #define mmMME2_RTR_LBW_RANGE_BASE_11                                 0x8057C
 
 #define mmMME2_RTR_LBW_RANGE_BASE_12                                 0x80580
 
 #define mmMME2_RTR_LBW_RANGE_BASE_13                                 0x80584
 
 #define mmMME2_RTR_LBW_RANGE_BASE_14                                 0x80588
 
 #define mmMME2_RTR_LBW_RANGE_BASE_15                                 0x8058C
 
 #define mmMME2_RTR_RGLTR                                             0x80590
 
 #define mmMME2_RTR_RGLTR_WR_RESULT                                   0x80594
 
 #define mmMME2_RTR_RGLTR_RD_RESULT                                   0x80598
 
 #define mmMME2_RTR_SCRAMB_EN                                         0x80600
 
 #define mmMME2_RTR_NON_LIN_SCRAMB                                    0x80604
 
 #endif /* ASIC_REG_MME2_RTR_REGS_H_ */

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