include/gaudi2/gaudi2_packets.h

0001 /* SPDX-License-Identifier: GPL-2.0
0002  *
0003  * Copyright 2020 HabanaLabs, Ltd.
0004  * All Rights Reserved.
0005  *
0006  */
0007
0008 #ifndef GAUDI2_PACKETS_H
0009 #define GAUDI2_PACKETS_H
0010
0011 #include <linux/types.h>
0012
0013 #define PACKET_HEADER_PACKET_ID_SHIFT       56
0014 #define PACKET_HEADER_PACKET_ID_MASK        0x1F00000000000000ull
0015
0016 enum packet_id {
0017     PACKET_WREG_32 = 0x1,
0018     PACKET_WREG_BULK = 0x2,
0019     PACKET_MSG_LONG = 0x3,
0020     PACKET_MSG_SHORT = 0x4,
0021     PACKET_CP_DMA = 0x5,
0022     PACKET_REPEAT = 0x6,
0023     PACKET_MSG_PROT = 0x7,
0024     PACKET_FENCE = 0x8,
0025     PACKET_LIN_DMA = 0x9,
0026     PACKET_NOP = 0xA,
0027     PACKET_STOP = 0xB,
0028     PACKET_ARB_POINT = 0xC,
0029     PACKET_WAIT = 0xD,
0030     PACKET_CB_LIST = 0xE,
0031     PACKET_LOAD_AND_EXE = 0xF,
0032     PACKET_WRITE_ARC_STREAM = 0x10,
0033     PACKET_LAST_READ_FROM_ARC = 0x11,
0034     PACKET_WREG_64_SHORT = 0x12,
0035     PACKET_WREG_64_LONG = 0x13,
0036     MAX_PACKET_ID = (PACKET_HEADER_PACKET_ID_MASK >>
0037                 PACKET_HEADER_PACKET_ID_SHIFT) + 1
0038 };
0039
0040 #define GAUDI2_PKT_CTL_OPCODE_SHIFT 24
0041 #define GAUDI2_PKT_CTL_OPCODE_MASK  0x1F000000
0042
0043 #define GAUDI2_PKT_CTL_EB_SHIFT     29
0044 #define GAUDI2_PKT_CTL_EB_MASK      0x20000000
0045
0046 #define GAUDI2_PKT_CTL_RB_SHIFT     30
0047 #define GAUDI2_PKT_CTL_RB_MASK      0x40000000
0048
0049 #define GAUDI2_PKT_CTL_MB_SHIFT     31
0050 #define GAUDI2_PKT_CTL_MB_MASK      0x80000000
0051
0052 /* All packets have, at least, an 8-byte header, which contains
0053  * the packet type. The kernel driver uses the packet header for packet
0054  * validation and to perform any necessary required preparation before
0055  * sending them off to the hardware.
0056  */
0057 struct gaudi2_packet {
0058     __le64 header;
0059     /* The rest of the packet data follows. Use the corresponding
0060      * packet_XXX struct to deference the data, based on packet type
0061      */
0062     u8 contents[0];
0063 };
0064
0065 struct packet_nop {
0066     __le32 reserved;
0067     __le32 ctl;
0068 };
0069
0070 struct packet_stop {
0071     __le32 reserved;
0072     __le32 ctl;
0073 };
0074
0075 struct packet_wreg32 {
0076     __le32 value;
0077     __le32 ctl;
0078 };
0079
0080 struct packet_wreg_bulk {
0081     __le32 size64;
0082     __le32 ctl;
0083     __le64 values[0]; /* data starts here */
0084 };
0085
0086 struct packet_msg_long {
0087     __le32 value;
0088     __le32 ctl;
0089     __le64 addr;
0090 };
0091
0092 #define GAUDI2_PKT_SHORT_VAL_SOB_SYNC_VAL_SHIFT 0
0093 #define GAUDI2_PKT_SHORT_VAL_SOB_SYNC_VAL_MASK  0x00007FFF
0094
0095 #define GAUDI2_PKT_SHORT_VAL_SOB_MOD_SHIFT  31
0096 #define GAUDI2_PKT_SHORT_VAL_SOB_MOD_MASK   0x80000000
0097
0098 #define GAUDI2_PKT_SHORT_VAL_MON_SYNC_GID_SHIFT 0
0099 #define GAUDI2_PKT_SHORT_VAL_MON_SYNC_GID_MASK  0x000000FF
0100
0101 #define GAUDI2_PKT_SHORT_VAL_MON_MASK_SHIFT 8
0102 #define GAUDI2_PKT_SHORT_VAL_MON_MASK_MASK  0x0000FF00
0103
0104 #define GAUDI2_PKT_SHORT_VAL_MON_MODE_SHIFT 16
0105 #define GAUDI2_PKT_SHORT_VAL_MON_MODE_MASK  0x00010000
0106
0107 #define GAUDI2_PKT_SHORT_VAL_MON_SYNC_VAL_SHIFT 17
0108 #define GAUDI2_PKT_SHORT_VAL_MON_SYNC_VAL_MASK  0xFFFE0000
0109
0110 #define GAUDI2_PKT_SHORT_CTL_ADDR_SHIFT     0
0111 #define GAUDI2_PKT_SHORT_CTL_ADDR_MASK      0x0000FFFF
0112
0113 #define GAUDI2_PKT_SHORT_CTL_BASE_SHIFT     22
0114 #define GAUDI2_PKT_SHORT_CTL_BASE_MASK      0x00C00000
0115
0116 struct packet_msg_short {
0117     __le32 value;
0118     __le32 ctl;
0119 };
0120
0121 struct packet_msg_prot {
0122     __le32 value;
0123     __le32 ctl;
0124     __le64 addr;
0125 };
0126
0127 #define GAUDI2_PKT_FENCE_CFG_DEC_VAL_SHIFT  0
0128 #define GAUDI2_PKT_FENCE_CFG_DEC_VAL_MASK   0x0000000F
0129
0130 #define GAUDI2_PKT_FENCE_CFG_TARGET_VAL_SHIFT   16
0131 #define GAUDI2_PKT_FENCE_CFG_TARGET_VAL_MASK    0x00FF0000
0132
0133 #define GAUDI2_PKT_FENCE_CFG_ID_SHIFT       30
0134 #define GAUDI2_PKT_FENCE_CFG_ID_MASK        0xC0000000
0135
0136 #define GAUDI2_PKT_FENCE_CTL_PRED_SHIFT     0
0137 #define GAUDI2_PKT_FENCE_CTL_PRED_MASK      0x0000001F
0138
0139 struct packet_fence {
0140     __le32 cfg;
0141     __le32 ctl;
0142 };
0143
0144 #define GAUDI2_PKT_LIN_DMA_CTL_WRCOMP_SHIFT 0
0145 #define GAUDI2_PKT_LIN_DMA_CTL_WRCOMP_MASK  0x00000001
0146
0147 #define GAUDI2_PKT_LIN_DMA_CTL_ENDIAN_SHIFT 1
0148 #define GAUDI2_PKT_LIN_DMA_CTL_ENDIAN_MASK  0x00000006
0149
0150 #define GAUDI2_PKT_LIN_DMA_CTL_MEMSET_SHIFT 4
0151 #define GAUDI2_PKT_LIN_DMA_CTL_MEMSET_MASK  0x00000010
0152
0153 #define GAUDI2_PKT_LIN_DMA_CTL_CONTEXT_ID_SHIFT 8
0154 #define GAUDI2_PKT_LIN_DMA_CTL_CONTEXT_ID_MASK  0x00FFFF00
0155
0156 struct packet_lin_dma {
0157     __le32 tsize;
0158     __le32 ctl;
0159     __le64 src_addr;
0160     __le64 dst_addr;
0161 };
0162
0163 struct packet_arb_point {
0164     __le32 cfg;
0165     __le32 ctl;
0166 };
0167
0168 struct packet_repeat {
0169     __le32 cfg;
0170     __le32 ctl;
0171 };
0172
0173 struct packet_wait {
0174     __le32 cfg;
0175     __le32 ctl;
0176 };
0177
0178 struct packet_cb_list {
0179     __le32 reserved;
0180     __le32 ctl;
0181     __le64 index_addr;
0182     __le64 table_addr;
0183 };
0184
0185 struct packet_load_and_exe {
0186     __le32 cfg;
0187     __le32 ctl;
0188     __le64 src_addr;
0189 };
0190
0191 struct packet_cp_dma {
0192     __le32 tsize;
0193     __le32 ctl;
0194     __le64 src_addr;
0195 };
0196
0197 #endif /* GAUDI2_PACKETS_H */