include/gaudi2/gaudi2_coresight.h

0001 /* SPDX-License-Identifier: GPL-2.0
0002  *
0003  * Copyright 2016-2020 HabanaLabs, Ltd.
0004  * All Rights Reserved.
0005  *
0006  */
0007
0008 /************************************
0009  ** This is an auto-generated file **
0010  **       DO NOT EDIT BELOW        **
0011  ************************************/
0012
0013 #ifndef GAUDI2_CORESIGHT_H
0014 #define GAUDI2_CORESIGHT_H
0015
0016 enum gaudi2_debug_stm_regs_index {
0017     GAUDI2_STM_FIRST = 0,
0018     GAUDI2_STM_DCORE0_TPC0_EML = GAUDI2_STM_FIRST,
0019     GAUDI2_STM_DCORE0_TPC1_EML,
0020     GAUDI2_STM_DCORE0_TPC2_EML,
0021     GAUDI2_STM_DCORE0_TPC3_EML,
0022     GAUDI2_STM_DCORE0_TPC4_EML,
0023     GAUDI2_STM_DCORE0_TPC5_EML,
0024     GAUDI2_STM_DCORE0_TPC6_EML,
0025     GAUDI2_STM_DCORE1_TPC0_EML,
0026     GAUDI2_STM_DCORE1_TPC1_EML,
0027     GAUDI2_STM_DCORE1_TPC2_EML,
0028     GAUDI2_STM_DCORE1_TPC3_EML,
0029     GAUDI2_STM_DCORE1_TPC4_EML,
0030     GAUDI2_STM_DCORE1_TPC5_EML,
0031     GAUDI2_STM_DCORE2_TPC0_EML,
0032     GAUDI2_STM_DCORE2_TPC1_EML,
0033     GAUDI2_STM_DCORE2_TPC2_EML,
0034     GAUDI2_STM_DCORE2_TPC3_EML,
0035     GAUDI2_STM_DCORE2_TPC4_EML,
0036     GAUDI2_STM_DCORE2_TPC5_EML,
0037     GAUDI2_STM_DCORE3_TPC0_EML,
0038     GAUDI2_STM_DCORE3_TPC1_EML,
0039     GAUDI2_STM_DCORE3_TPC2_EML,
0040     GAUDI2_STM_DCORE3_TPC3_EML,
0041     GAUDI2_STM_DCORE3_TPC4_EML,
0042     GAUDI2_STM_DCORE3_TPC5_EML,
0043     GAUDI2_STM_DCORE0_HMMU0_CS,
0044     GAUDI2_STM_DCORE0_HMMU1_CS,
0045     GAUDI2_STM_DCORE0_HMMU2_CS,
0046     GAUDI2_STM_DCORE0_HMMU3_CS,
0047     GAUDI2_STM_DCORE0_MME_CTRL,
0048     GAUDI2_STM_DCORE0_MME_SBTE0,
0049     GAUDI2_STM_DCORE0_MME_SBTE1,
0050     GAUDI2_STM_DCORE0_MME_SBTE2,
0051     GAUDI2_STM_DCORE0_MME_SBTE3,
0052     GAUDI2_STM_DCORE0_MME_SBTE4,
0053     GAUDI2_STM_DCORE0_MME_ACC,
0054     GAUDI2_STM_DCORE0_SM,
0055     GAUDI2_STM_DCORE0_EDMA0_CS,
0056     GAUDI2_STM_DCORE0_EDMA1_CS,
0057     GAUDI2_STM_DCORE0_VDEC0_CS,
0058     GAUDI2_STM_DCORE0_VDEC1_CS,
0059     GAUDI2_STM_DCORE1_HMMU0_CS,
0060     GAUDI2_STM_DCORE1_HMMU1_CS,
0061     GAUDI2_STM_DCORE1_HMMU2_CS,
0062     GAUDI2_STM_DCORE1_HMMU3_CS,
0063     GAUDI2_STM_DCORE1_MME_CTRL,
0064     GAUDI2_STM_DCORE1_MME_SBTE0,
0065     GAUDI2_STM_DCORE1_MME_SBTE1,
0066     GAUDI2_STM_DCORE1_MME_SBTE2,
0067     GAUDI2_STM_DCORE1_MME_SBTE3,
0068     GAUDI2_STM_DCORE1_MME_SBTE4,
0069     GAUDI2_STM_DCORE1_MME_ACC,
0070     GAUDI2_STM_DCORE1_SM,
0071     GAUDI2_STM_DCORE1_EDMA0_CS,
0072     GAUDI2_STM_DCORE1_EDMA1_CS,
0073     GAUDI2_STM_DCORE1_VDEC0_CS,
0074     GAUDI2_STM_DCORE1_VDEC1_CS,
0075     GAUDI2_STM_DCORE2_HMMU0_CS,
0076     GAUDI2_STM_DCORE2_HMMU1_CS,
0077     GAUDI2_STM_DCORE2_HMMU2_CS,
0078     GAUDI2_STM_DCORE2_HMMU3_CS,
0079     GAUDI2_STM_DCORE2_MME_CTRL,
0080     GAUDI2_STM_DCORE2_MME_SBTE0,
0081     GAUDI2_STM_DCORE2_MME_SBTE1,
0082     GAUDI2_STM_DCORE2_MME_SBTE2,
0083     GAUDI2_STM_DCORE2_MME_SBTE3,
0084     GAUDI2_STM_DCORE2_MME_SBTE4,
0085     GAUDI2_STM_DCORE2_MME_ACC,
0086     GAUDI2_STM_DCORE2_SM,
0087     GAUDI2_STM_DCORE2_EDMA0_CS,
0088     GAUDI2_STM_DCORE2_EDMA1_CS,
0089     GAUDI2_STM_DCORE2_VDEC0_CS,
0090     GAUDI2_STM_DCORE2_VDEC1_CS,
0091     GAUDI2_STM_DCORE3_HMMU0_CS,
0092     GAUDI2_STM_DCORE3_HMMU1_CS,
0093     GAUDI2_STM_DCORE3_HMMU2_CS,
0094     GAUDI2_STM_DCORE3_HMMU3_CS,
0095     GAUDI2_STM_DCORE3_MME_CTRL,
0096     GAUDI2_STM_DCORE3_MME_SBTE0,
0097     GAUDI2_STM_DCORE3_MME_SBTE1,
0098     GAUDI2_STM_DCORE3_MME_SBTE2,
0099     GAUDI2_STM_DCORE3_MME_SBTE3,
0100     GAUDI2_STM_DCORE3_MME_SBTE4,
0101     GAUDI2_STM_DCORE3_MME_ACC,
0102     GAUDI2_STM_DCORE3_SM,
0103     GAUDI2_STM_DCORE3_EDMA0_CS,
0104     GAUDI2_STM_DCORE3_EDMA1_CS,
0105     GAUDI2_STM_DCORE3_VDEC0_CS,
0106     GAUDI2_STM_DCORE3_VDEC1_CS,
0107     GAUDI2_STM_PCIE,
0108     GAUDI2_STM_PSOC,
0109     GAUDI2_STM_PSOC_ARC0_CS,
0110     GAUDI2_STM_PSOC_ARC1_CS,
0111     GAUDI2_STM_PDMA0_CS,
0112     GAUDI2_STM_PDMA1_CS,
0113     GAUDI2_STM_CPU,
0114     GAUDI2_STM_PMMU_CS,
0115     GAUDI2_STM_ROT0_CS,
0116     GAUDI2_STM_ROT1_CS,
0117     GAUDI2_STM_ARC_FARM_CS,
0118     GAUDI2_STM_KDMA_CS,
0119     GAUDI2_STM_PCIE_VDEC0_CS,
0120     GAUDI2_STM_PCIE_VDEC1_CS,
0121     GAUDI2_STM_HBM0_MC0_CS,
0122     GAUDI2_STM_HBM0_MC1_CS,
0123     GAUDI2_STM_HBM1_MC0_CS,
0124     GAUDI2_STM_HBM1_MC1_CS,
0125     GAUDI2_STM_HBM2_MC0_CS,
0126     GAUDI2_STM_HBM2_MC1_CS,
0127     GAUDI2_STM_HBM3_MC0_CS,
0128     GAUDI2_STM_HBM3_MC1_CS,
0129     GAUDI2_STM_HBM4_MC0_CS,
0130     GAUDI2_STM_HBM4_MC1_CS,
0131     GAUDI2_STM_HBM5_MC0_CS,
0132     GAUDI2_STM_HBM5_MC1_CS,
0133     GAUDI2_STM_NIC0_DBG_0,
0134     GAUDI2_STM_NIC0_DBG_1,
0135     GAUDI2_STM_NIC1_DBG_0,
0136     GAUDI2_STM_NIC1_DBG_1,
0137     GAUDI2_STM_NIC2_DBG_0,
0138     GAUDI2_STM_NIC2_DBG_1,
0139     GAUDI2_STM_NIC3_DBG_0,
0140     GAUDI2_STM_NIC3_DBG_1,
0141     GAUDI2_STM_NIC4_DBG_0,
0142     GAUDI2_STM_NIC4_DBG_1,
0143     GAUDI2_STM_NIC5_DBG_0,
0144     GAUDI2_STM_NIC5_DBG_1,
0145     GAUDI2_STM_NIC6_DBG_0,
0146     GAUDI2_STM_NIC6_DBG_1,
0147     GAUDI2_STM_NIC7_DBG_0,
0148     GAUDI2_STM_NIC7_DBG_1,
0149     GAUDI2_STM_NIC8_DBG_0,
0150     GAUDI2_STM_NIC8_DBG_1,
0151     GAUDI2_STM_NIC9_DBG_0,
0152     GAUDI2_STM_NIC9_DBG_1,
0153     GAUDI2_STM_NIC10_DBG_0,
0154     GAUDI2_STM_NIC10_DBG_1,
0155     GAUDI2_STM_NIC11_DBG_0,
0156     GAUDI2_STM_NIC11_DBG_1,
0157     GAUDI2_STM_LAST = GAUDI2_STM_NIC11_DBG_1
0158 };
0159
0160 enum gaudi2_debug_etf_regs_index {
0161     GAUDI2_ETF_FIRST = 0,
0162     GAUDI2_ETF_DCORE0_TPC0_EML = GAUDI2_ETF_FIRST,
0163     GAUDI2_ETF_DCORE0_TPC1_EML,
0164     GAUDI2_ETF_DCORE0_TPC2_EML,
0165     GAUDI2_ETF_DCORE0_TPC3_EML,
0166     GAUDI2_ETF_DCORE0_TPC4_EML,
0167     GAUDI2_ETF_DCORE0_TPC5_EML,
0168     GAUDI2_ETF_DCORE0_TPC6_EML,
0169     GAUDI2_ETF_DCORE1_TPC0_EML,
0170     GAUDI2_ETF_DCORE1_TPC1_EML,
0171     GAUDI2_ETF_DCORE1_TPC2_EML,
0172     GAUDI2_ETF_DCORE1_TPC3_EML,
0173     GAUDI2_ETF_DCORE1_TPC4_EML,
0174     GAUDI2_ETF_DCORE1_TPC5_EML,
0175     GAUDI2_ETF_DCORE2_TPC0_EML,
0176     GAUDI2_ETF_DCORE2_TPC1_EML,
0177     GAUDI2_ETF_DCORE2_TPC2_EML,
0178     GAUDI2_ETF_DCORE2_TPC3_EML,
0179     GAUDI2_ETF_DCORE2_TPC4_EML,
0180     GAUDI2_ETF_DCORE2_TPC5_EML,
0181     GAUDI2_ETF_DCORE3_TPC0_EML,
0182     GAUDI2_ETF_DCORE3_TPC1_EML,
0183     GAUDI2_ETF_DCORE3_TPC2_EML,
0184     GAUDI2_ETF_DCORE3_TPC3_EML,
0185     GAUDI2_ETF_DCORE3_TPC4_EML,
0186     GAUDI2_ETF_DCORE3_TPC5_EML,
0187     GAUDI2_ETF_DCORE0_HMMU0_CS,
0188     GAUDI2_ETF_DCORE0_HMMU1_CS,
0189     GAUDI2_ETF_DCORE0_HMMU2_CS,
0190     GAUDI2_ETF_DCORE0_HMMU3_CS,
0191     GAUDI2_ETF_DCORE0_MME_CTRL,
0192     GAUDI2_ETF_DCORE0_MME_SBTE0,
0193     GAUDI2_ETF_DCORE0_MME_SBTE1,
0194     GAUDI2_ETF_DCORE0_MME_SBTE2,
0195     GAUDI2_ETF_DCORE0_MME_SBTE3,
0196     GAUDI2_ETF_DCORE0_MME_SBTE4,
0197     GAUDI2_ETF_DCORE0_MME_ACC,
0198     GAUDI2_ETF_DCORE0_SM,
0199     GAUDI2_ETF_DCORE0_EDMA0_CS,
0200     GAUDI2_ETF_DCORE0_EDMA1_CS,
0201     GAUDI2_ETF_DCORE0_VDEC0_CS,
0202     GAUDI2_ETF_DCORE0_VDEC1_CS,
0203     GAUDI2_ETF_DCORE1_HMMU0_CS,
0204     GAUDI2_ETF_DCORE1_HMMU1_CS,
0205     GAUDI2_ETF_DCORE1_HMMU2_CS,
0206     GAUDI2_ETF_DCORE1_HMMU3_CS,
0207     GAUDI2_ETF_DCORE1_MME_CTRL,
0208     GAUDI2_ETF_DCORE1_MME_SBTE0,
0209     GAUDI2_ETF_DCORE1_MME_SBTE1,
0210     GAUDI2_ETF_DCORE1_MME_SBTE2,
0211     GAUDI2_ETF_DCORE1_MME_SBTE3,
0212     GAUDI2_ETF_DCORE1_MME_SBTE4,
0213     GAUDI2_ETF_DCORE1_MME_ACC,
0214     GAUDI2_ETF_DCORE1_SM,
0215     GAUDI2_ETF_DCORE1_EDMA0_CS,
0216     GAUDI2_ETF_DCORE1_EDMA1_CS,
0217     GAUDI2_ETF_DCORE1_VDEC0_CS,
0218     GAUDI2_ETF_DCORE1_VDEC1_CS,
0219     GAUDI2_ETF_DCORE2_HMMU0_CS,
0220     GAUDI2_ETF_DCORE2_HMMU1_CS,
0221     GAUDI2_ETF_DCORE2_HMMU2_CS,
0222     GAUDI2_ETF_DCORE2_HMMU3_CS,
0223     GAUDI2_ETF_DCORE2_MME_CTRL,
0224     GAUDI2_ETF_DCORE2_MME_SBTE0,
0225     GAUDI2_ETF_DCORE2_MME_SBTE1,
0226     GAUDI2_ETF_DCORE2_MME_SBTE2,
0227     GAUDI2_ETF_DCORE2_MME_SBTE3,
0228     GAUDI2_ETF_DCORE2_MME_SBTE4,
0229     GAUDI2_ETF_DCORE2_MME_ACC,
0230     GAUDI2_ETF_DCORE2_SM,
0231     GAUDI2_ETF_DCORE2_EDMA0_CS,
0232     GAUDI2_ETF_DCORE2_EDMA1_CS,
0233     GAUDI2_ETF_DCORE2_VDEC0_CS,
0234     GAUDI2_ETF_DCORE2_VDEC1_CS,
0235     GAUDI2_ETF_DCORE3_HMMU0_CS,
0236     GAUDI2_ETF_DCORE3_HMMU1_CS,
0237     GAUDI2_ETF_DCORE3_HMMU2_CS,
0238     GAUDI2_ETF_DCORE3_HMMU3_CS,
0239     GAUDI2_ETF_DCORE3_MME_CTRL,
0240     GAUDI2_ETF_DCORE3_MME_SBTE0,
0241     GAUDI2_ETF_DCORE3_MME_SBTE1,
0242     GAUDI2_ETF_DCORE3_MME_SBTE2,
0243     GAUDI2_ETF_DCORE3_MME_SBTE3,
0244     GAUDI2_ETF_DCORE3_MME_SBTE4,
0245     GAUDI2_ETF_DCORE3_MME_ACC,
0246     GAUDI2_ETF_DCORE3_SM,
0247     GAUDI2_ETF_DCORE3_EDMA0_CS,
0248     GAUDI2_ETF_DCORE3_EDMA1_CS,
0249     GAUDI2_ETF_DCORE3_VDEC0_CS,
0250     GAUDI2_ETF_DCORE3_VDEC1_CS,
0251     GAUDI2_ETF_PCIE,
0252     GAUDI2_ETF_PSOC,
0253     GAUDI2_ETF_PSOC_ARC0_CS,
0254     GAUDI2_ETF_PSOC_ARC1_CS,
0255     GAUDI2_ETF_PDMA0_CS,
0256     GAUDI2_ETF_PDMA1_CS,
0257     GAUDI2_ETF_CPU_0,
0258     GAUDI2_ETF_CPU_1,
0259     GAUDI2_ETF_CPU_TRACE,
0260     GAUDI2_ETF_PMMU_CS,
0261     GAUDI2_ETF_ROT0_CS,
0262     GAUDI2_ETF_ROT1_CS,
0263     GAUDI2_ETF_ARC_FARM_CS,
0264     GAUDI2_ETF_KDMA_CS,
0265     GAUDI2_ETF_PCIE_VDEC0_CS,
0266     GAUDI2_ETF_PCIE_VDEC1_CS,
0267     GAUDI2_ETF_HBM0_MC0_CS,
0268     GAUDI2_ETF_HBM0_MC1_CS,
0269     GAUDI2_ETF_HBM1_MC0_CS,
0270     GAUDI2_ETF_HBM1_MC1_CS,
0271     GAUDI2_ETF_HBM2_MC0_CS,
0272     GAUDI2_ETF_HBM2_MC1_CS,
0273     GAUDI2_ETF_HBM3_MC0_CS,
0274     GAUDI2_ETF_HBM3_MC1_CS,
0275     GAUDI2_ETF_HBM4_MC0_CS,
0276     GAUDI2_ETF_HBM4_MC1_CS,
0277     GAUDI2_ETF_HBM5_MC0_CS,
0278     GAUDI2_ETF_HBM5_MC1_CS,
0279     GAUDI2_ETF_NIC0_DBG_0,
0280     GAUDI2_ETF_NIC0_DBG_1,
0281     GAUDI2_ETF_NIC1_DBG_0,
0282     GAUDI2_ETF_NIC1_DBG_1,
0283     GAUDI2_ETF_NIC2_DBG_0,
0284     GAUDI2_ETF_NIC2_DBG_1,
0285     GAUDI2_ETF_NIC3_DBG_0,
0286     GAUDI2_ETF_NIC3_DBG_1,
0287     GAUDI2_ETF_NIC4_DBG_0,
0288     GAUDI2_ETF_NIC4_DBG_1,
0289     GAUDI2_ETF_NIC5_DBG_0,
0290     GAUDI2_ETF_NIC5_DBG_1,
0291     GAUDI2_ETF_NIC6_DBG_0,
0292     GAUDI2_ETF_NIC6_DBG_1,
0293     GAUDI2_ETF_NIC7_DBG_0,
0294     GAUDI2_ETF_NIC7_DBG_1,
0295     GAUDI2_ETF_NIC8_DBG_0,
0296     GAUDI2_ETF_NIC8_DBG_1,
0297     GAUDI2_ETF_NIC9_DBG_0,
0298     GAUDI2_ETF_NIC9_DBG_1,
0299     GAUDI2_ETF_NIC10_DBG_0,
0300     GAUDI2_ETF_NIC10_DBG_1,
0301     GAUDI2_ETF_NIC11_DBG_0,
0302     GAUDI2_ETF_NIC11_DBG_1,
0303     GAUDI2_ETF_LAST = GAUDI2_ETF_NIC11_DBG_1
0304 };
0305
0306 enum gaudi2_debug_funnel_regs_index {
0307     GAUDI2_FUNNEL_FIRST = 0,
0308     GAUDI2_FUNNEL_DCORE0_TPC0_EML = GAUDI2_FUNNEL_FIRST,
0309     GAUDI2_FUNNEL_DCORE0_TPC1_EML,
0310     GAUDI2_FUNNEL_DCORE0_TPC2_EML,
0311     GAUDI2_FUNNEL_DCORE0_TPC3_EML,
0312     GAUDI2_FUNNEL_DCORE0_TPC4_EML,
0313     GAUDI2_FUNNEL_DCORE0_TPC5_EML,
0314     GAUDI2_FUNNEL_DCORE0_TPC6_EML,
0315     GAUDI2_FUNNEL_DCORE1_TPC0_EML,
0316     GAUDI2_FUNNEL_DCORE1_TPC1_EML,
0317     GAUDI2_FUNNEL_DCORE1_TPC2_EML,
0318     GAUDI2_FUNNEL_DCORE1_TPC3_EML,
0319     GAUDI2_FUNNEL_DCORE1_TPC4_EML,
0320     GAUDI2_FUNNEL_DCORE1_TPC5_EML,
0321     GAUDI2_FUNNEL_DCORE2_TPC0_EML,
0322     GAUDI2_FUNNEL_DCORE2_TPC1_EML,
0323     GAUDI2_FUNNEL_DCORE2_TPC2_EML,
0324     GAUDI2_FUNNEL_DCORE2_TPC3_EML,
0325     GAUDI2_FUNNEL_DCORE2_TPC4_EML,
0326     GAUDI2_FUNNEL_DCORE2_TPC5_EML,
0327     GAUDI2_FUNNEL_DCORE3_TPC0_EML,
0328     GAUDI2_FUNNEL_DCORE3_TPC1_EML,
0329     GAUDI2_FUNNEL_DCORE3_TPC2_EML,
0330     GAUDI2_FUNNEL_DCORE3_TPC3_EML,
0331     GAUDI2_FUNNEL_DCORE3_TPC4_EML,
0332     GAUDI2_FUNNEL_DCORE3_TPC5_EML,
0333     GAUDI2_FUNNEL_DCORE0_XFT,
0334     GAUDI2_FUNNEL_DCORE0_TFT0,
0335     GAUDI2_FUNNEL_DCORE0_TFT1,
0336     GAUDI2_FUNNEL_DCORE0_TFT2,
0337     GAUDI2_FUNNEL_DCORE0_RTR0,
0338     GAUDI2_FUNNEL_DCORE0_RTR1,
0339     GAUDI2_FUNNEL_DCORE0_RTR2,
0340     GAUDI2_FUNNEL_DCORE0_RTR3,
0341     GAUDI2_FUNNEL_DCORE0_RTR4,
0342     GAUDI2_FUNNEL_DCORE0_MIF0,
0343     GAUDI2_FUNNEL_DCORE0_RTR5,
0344     GAUDI2_FUNNEL_DCORE0_MIF1,
0345     GAUDI2_FUNNEL_DCORE0_RTR6,
0346     GAUDI2_FUNNEL_DCORE0_MIF2,
0347     GAUDI2_FUNNEL_DCORE0_RTR7,
0348     GAUDI2_FUNNEL_DCORE0_MIF3,
0349     GAUDI2_FUNNEL_DCORE1_XFT,
0350     GAUDI2_FUNNEL_DCORE1_TFT0,
0351     GAUDI2_FUNNEL_DCORE1_TFT1,
0352     GAUDI2_FUNNEL_DCORE1_TFT2,
0353     GAUDI2_FUNNEL_DCORE1_RTR0,
0354     GAUDI2_FUNNEL_DCORE1_MIF0,
0355     GAUDI2_FUNNEL_DCORE1_RTR1,
0356     GAUDI2_FUNNEL_DCORE1_MIF1,
0357     GAUDI2_FUNNEL_DCORE1_RTR2,
0358     GAUDI2_FUNNEL_DCORE1_MIF2,
0359     GAUDI2_FUNNEL_DCORE1_RTR3,
0360     GAUDI2_FUNNEL_DCORE1_MIF3,
0361     GAUDI2_FUNNEL_DCORE1_RTR4,
0362     GAUDI2_FUNNEL_DCORE1_RTR5,
0363     GAUDI2_FUNNEL_DCORE1_RTR6,
0364     GAUDI2_FUNNEL_DCORE1_RTR7,
0365     GAUDI2_FUNNEL_DCORE2_XFT,
0366     GAUDI2_FUNNEL_DCORE2_TFT0,
0367     GAUDI2_FUNNEL_DCORE2_TFT1,
0368     GAUDI2_FUNNEL_DCORE2_TFT2,
0369     GAUDI2_FUNNEL_DCORE2_RTR0,
0370     GAUDI2_FUNNEL_DCORE2_RTR1,
0371     GAUDI2_FUNNEL_DCORE2_RTR2,
0372     GAUDI2_FUNNEL_DCORE2_RTR3,
0373     GAUDI2_FUNNEL_DCORE2_RTR4,
0374     GAUDI2_FUNNEL_DCORE2_MIF0,
0375     GAUDI2_FUNNEL_DCORE2_RTR5,
0376     GAUDI2_FUNNEL_DCORE2_MIF1,
0377     GAUDI2_FUNNEL_DCORE2_RTR6,
0378     GAUDI2_FUNNEL_DCORE2_MIF2,
0379     GAUDI2_FUNNEL_DCORE2_RTR7,
0380     GAUDI2_FUNNEL_DCORE2_MIF3,
0381     GAUDI2_FUNNEL_DCORE3_XFT,
0382     GAUDI2_FUNNEL_DCORE3_TFT0,
0383     GAUDI2_FUNNEL_DCORE3_TFT1,
0384     GAUDI2_FUNNEL_DCORE3_TFT2,
0385     GAUDI2_FUNNEL_DCORE3_RTR0,
0386     GAUDI2_FUNNEL_DCORE3_MIF0,
0387     GAUDI2_FUNNEL_DCORE3_RTR1,
0388     GAUDI2_FUNNEL_DCORE3_MIF1,
0389     GAUDI2_FUNNEL_DCORE3_RTR2,
0390     GAUDI2_FUNNEL_DCORE3_MIF2,
0391     GAUDI2_FUNNEL_DCORE3_RTR3,
0392     GAUDI2_FUNNEL_DCORE3_MIF3,
0393     GAUDI2_FUNNEL_DCORE3_RTR4,
0394     GAUDI2_FUNNEL_DCORE3_RTR5,
0395     GAUDI2_FUNNEL_DCORE3_RTR6,
0396     GAUDI2_FUNNEL_DCORE3_RTR7,
0397     GAUDI2_FUNNEL_PSOC,
0398     GAUDI2_FUNNEL_PSOC_ARC0,
0399     GAUDI2_FUNNEL_PSOC_ARC1,
0400     GAUDI2_FUNNEL_XDMA,
0401     GAUDI2_FUNNEL_CPU,
0402     GAUDI2_FUNNEL_PMMU,
0403     GAUDI2_FUNNEL_PMMU_DEC,
0404     GAUDI2_FUNNEL_DCORE0_XBAR_MID,
0405     GAUDI2_FUNNEL_DCORE0_XBAR_EDGE,
0406     GAUDI2_FUNNEL_DCORE1_XBAR_MID,
0407     GAUDI2_FUNNEL_DCORE1_XBAR_EDGE,
0408     GAUDI2_FUNNEL_DCORE2_XBAR_MID,
0409     GAUDI2_FUNNEL_DCORE2_XBAR_EDGE,
0410     GAUDI2_FUNNEL_DCORE3_XBAR_MID,
0411     GAUDI2_FUNNEL_DCORE3_XBAR_EDGE,
0412     GAUDI2_FUNNEL_ARC_FARM,
0413     GAUDI2_FUNNEL_HBM0_MC0,
0414     GAUDI2_FUNNEL_HBM0_MC1,
0415     GAUDI2_FUNNEL_HBM1_MC0,
0416     GAUDI2_FUNNEL_HBM1_MC1,
0417     GAUDI2_FUNNEL_HBM2_MC0,
0418     GAUDI2_FUNNEL_HBM2_MC1,
0419     GAUDI2_FUNNEL_HBM3_MC0,
0420     GAUDI2_FUNNEL_HBM3_MC1,
0421     GAUDI2_FUNNEL_HBM4_MC0,
0422     GAUDI2_FUNNEL_HBM4_MC1,
0423     GAUDI2_FUNNEL_HBM5_MC0,
0424     GAUDI2_FUNNEL_HBM5_MC1,
0425     GAUDI2_FUNNEL_NIC0_DBG_TX,
0426     GAUDI2_FUNNEL_NIC0_DBG_NCH,
0427     GAUDI2_FUNNEL_NIC1_DBG_TX,
0428     GAUDI2_FUNNEL_NIC1_DBG_NCH,
0429     GAUDI2_FUNNEL_NIC2_DBG_TX,
0430     GAUDI2_FUNNEL_NIC2_DBG_NCH,
0431     GAUDI2_FUNNEL_NIC3_DBG_TX,
0432     GAUDI2_FUNNEL_NIC3_DBG_NCH,
0433     GAUDI2_FUNNEL_NIC4_DBG_TX,
0434     GAUDI2_FUNNEL_NIC4_DBG_NCH,
0435     GAUDI2_FUNNEL_NIC5_DBG_TX,
0436     GAUDI2_FUNNEL_NIC5_DBG_NCH,
0437     GAUDI2_FUNNEL_NIC6_DBG_TX,
0438     GAUDI2_FUNNEL_NIC6_DBG_NCH,
0439     GAUDI2_FUNNEL_NIC7_DBG_TX,
0440     GAUDI2_FUNNEL_NIC7_DBG_NCH,
0441     GAUDI2_FUNNEL_NIC8_DBG_TX,
0442     GAUDI2_FUNNEL_NIC8_DBG_NCH,
0443     GAUDI2_FUNNEL_NIC9_DBG_TX,
0444     GAUDI2_FUNNEL_NIC9_DBG_NCH,
0445     GAUDI2_FUNNEL_NIC10_DBG_TX,
0446     GAUDI2_FUNNEL_NIC10_DBG_NCH,
0447     GAUDI2_FUNNEL_NIC11_DBG_TX,
0448     GAUDI2_FUNNEL_NIC11_DBG_NCH,
0449     GAUDI2_FUNNEL_LAST = GAUDI2_FUNNEL_NIC11_DBG_NCH
0450 };
0451
0452 enum gaudi2_debug_bmon_regs_index {
0453     GAUDI2_BMON_FIRST = 0,
0454     GAUDI2_BMON_DCORE0_TPC0_EML_0 = GAUDI2_BMON_FIRST,
0455     GAUDI2_BMON_DCORE0_TPC0_EML_1,
0456     GAUDI2_BMON_DCORE0_TPC0_EML_2,
0457     GAUDI2_BMON_DCORE0_TPC0_EML_3,
0458     GAUDI2_BMON_DCORE0_TPC1_EML_0,
0459     GAUDI2_BMON_DCORE0_TPC1_EML_1,
0460     GAUDI2_BMON_DCORE0_TPC1_EML_2,
0461     GAUDI2_BMON_DCORE0_TPC1_EML_3,
0462     GAUDI2_BMON_DCORE0_TPC2_EML_0,
0463     GAUDI2_BMON_DCORE0_TPC2_EML_1,
0464     GAUDI2_BMON_DCORE0_TPC2_EML_2,
0465     GAUDI2_BMON_DCORE0_TPC2_EML_3,
0466     GAUDI2_BMON_DCORE0_TPC3_EML_0,
0467     GAUDI2_BMON_DCORE0_TPC3_EML_1,
0468     GAUDI2_BMON_DCORE0_TPC3_EML_2,
0469     GAUDI2_BMON_DCORE0_TPC3_EML_3,
0470     GAUDI2_BMON_DCORE0_TPC4_EML_0,
0471     GAUDI2_BMON_DCORE0_TPC4_EML_1,
0472     GAUDI2_BMON_DCORE0_TPC4_EML_2,
0473     GAUDI2_BMON_DCORE0_TPC4_EML_3,
0474     GAUDI2_BMON_DCORE0_TPC5_EML_0,
0475     GAUDI2_BMON_DCORE0_TPC5_EML_1,
0476     GAUDI2_BMON_DCORE0_TPC5_EML_2,
0477     GAUDI2_BMON_DCORE0_TPC5_EML_3,
0478     GAUDI2_BMON_DCORE0_TPC6_EML_0,
0479     GAUDI2_BMON_DCORE0_TPC6_EML_1,
0480     GAUDI2_BMON_DCORE0_TPC6_EML_2,
0481     GAUDI2_BMON_DCORE0_TPC6_EML_3,
0482     GAUDI2_BMON_DCORE1_TPC0_EML_0,
0483     GAUDI2_BMON_DCORE1_TPC0_EML_1,
0484     GAUDI2_BMON_DCORE1_TPC0_EML_2,
0485     GAUDI2_BMON_DCORE1_TPC0_EML_3,
0486     GAUDI2_BMON_DCORE1_TPC1_EML_0,
0487     GAUDI2_BMON_DCORE1_TPC1_EML_1,
0488     GAUDI2_BMON_DCORE1_TPC1_EML_2,
0489     GAUDI2_BMON_DCORE1_TPC1_EML_3,
0490     GAUDI2_BMON_DCORE1_TPC2_EML_0,
0491     GAUDI2_BMON_DCORE1_TPC2_EML_1,
0492     GAUDI2_BMON_DCORE1_TPC2_EML_2,
0493     GAUDI2_BMON_DCORE1_TPC2_EML_3,
0494     GAUDI2_BMON_DCORE1_TPC3_EML_0,
0495     GAUDI2_BMON_DCORE1_TPC3_EML_1,
0496     GAUDI2_BMON_DCORE1_TPC3_EML_2,
0497     GAUDI2_BMON_DCORE1_TPC3_EML_3,
0498     GAUDI2_BMON_DCORE1_TPC4_EML_0,
0499     GAUDI2_BMON_DCORE1_TPC4_EML_1,
0500     GAUDI2_BMON_DCORE1_TPC4_EML_2,
0501     GAUDI2_BMON_DCORE1_TPC4_EML_3,
0502     GAUDI2_BMON_DCORE1_TPC5_EML_0,
0503     GAUDI2_BMON_DCORE1_TPC5_EML_1,
0504     GAUDI2_BMON_DCORE1_TPC5_EML_2,
0505     GAUDI2_BMON_DCORE1_TPC5_EML_3,
0506     GAUDI2_BMON_DCORE2_TPC0_EML_0,
0507     GAUDI2_BMON_DCORE2_TPC0_EML_1,
0508     GAUDI2_BMON_DCORE2_TPC0_EML_2,
0509     GAUDI2_BMON_DCORE2_TPC0_EML_3,
0510     GAUDI2_BMON_DCORE2_TPC1_EML_0,
0511     GAUDI2_BMON_DCORE2_TPC1_EML_1,
0512     GAUDI2_BMON_DCORE2_TPC1_EML_2,
0513     GAUDI2_BMON_DCORE2_TPC1_EML_3,
0514     GAUDI2_BMON_DCORE2_TPC2_EML_0,
0515     GAUDI2_BMON_DCORE2_TPC2_EML_1,
0516     GAUDI2_BMON_DCORE2_TPC2_EML_2,
0517     GAUDI2_BMON_DCORE2_TPC2_EML_3,
0518     GAUDI2_BMON_DCORE2_TPC3_EML_0,
0519     GAUDI2_BMON_DCORE2_TPC3_EML_1,
0520     GAUDI2_BMON_DCORE2_TPC3_EML_2,
0521     GAUDI2_BMON_DCORE2_TPC3_EML_3,
0522     GAUDI2_BMON_DCORE2_TPC4_EML_0,
0523     GAUDI2_BMON_DCORE2_TPC4_EML_1,
0524     GAUDI2_BMON_DCORE2_TPC4_EML_2,
0525     GAUDI2_BMON_DCORE2_TPC4_EML_3,
0526     GAUDI2_BMON_DCORE2_TPC5_EML_0,
0527     GAUDI2_BMON_DCORE2_TPC5_EML_1,
0528     GAUDI2_BMON_DCORE2_TPC5_EML_2,
0529     GAUDI2_BMON_DCORE2_TPC5_EML_3,
0530     GAUDI2_BMON_DCORE3_TPC0_EML_0,
0531     GAUDI2_BMON_DCORE3_TPC0_EML_1,
0532     GAUDI2_BMON_DCORE3_TPC0_EML_2,
0533     GAUDI2_BMON_DCORE3_TPC0_EML_3,
0534     GAUDI2_BMON_DCORE3_TPC1_EML_0,
0535     GAUDI2_BMON_DCORE3_TPC1_EML_1,
0536     GAUDI2_BMON_DCORE3_TPC1_EML_2,
0537     GAUDI2_BMON_DCORE3_TPC1_EML_3,
0538     GAUDI2_BMON_DCORE3_TPC2_EML_0,
0539     GAUDI2_BMON_DCORE3_TPC2_EML_1,
0540     GAUDI2_BMON_DCORE3_TPC2_EML_2,
0541     GAUDI2_BMON_DCORE3_TPC2_EML_3,
0542     GAUDI2_BMON_DCORE3_TPC3_EML_0,
0543     GAUDI2_BMON_DCORE3_TPC3_EML_1,
0544     GAUDI2_BMON_DCORE3_TPC3_EML_2,
0545     GAUDI2_BMON_DCORE3_TPC3_EML_3,
0546     GAUDI2_BMON_DCORE3_TPC4_EML_0,
0547     GAUDI2_BMON_DCORE3_TPC4_EML_1,
0548     GAUDI2_BMON_DCORE3_TPC4_EML_2,
0549     GAUDI2_BMON_DCORE3_TPC4_EML_3,
0550     GAUDI2_BMON_DCORE3_TPC5_EML_0,
0551     GAUDI2_BMON_DCORE3_TPC5_EML_1,
0552     GAUDI2_BMON_DCORE3_TPC5_EML_2,
0553     GAUDI2_BMON_DCORE3_TPC5_EML_3,
0554     GAUDI2_BMON_DCORE0_HMMU0_0,
0555     GAUDI2_BMON_DCORE0_HMMU0_1,
0556     GAUDI2_BMON_DCORE0_HMMU0_3,
0557     GAUDI2_BMON_DCORE0_HMMU0_2,
0558     GAUDI2_BMON_DCORE0_HMMU0_4,
0559     GAUDI2_BMON_DCORE0_HMMU1_0,
0560     GAUDI2_BMON_DCORE0_HMMU1_1,
0561     GAUDI2_BMON_DCORE0_HMMU1_3,
0562     GAUDI2_BMON_DCORE0_HMMU1_2,
0563     GAUDI2_BMON_DCORE0_HMMU1_4,
0564     GAUDI2_BMON_DCORE0_HMMU2_0,
0565     GAUDI2_BMON_DCORE0_HMMU2_1,
0566     GAUDI2_BMON_DCORE0_HMMU2_3,
0567     GAUDI2_BMON_DCORE0_HMMU2_2,
0568     GAUDI2_BMON_DCORE0_HMMU2_4,
0569     GAUDI2_BMON_DCORE0_HMMU3_0,
0570     GAUDI2_BMON_DCORE0_HMMU3_1,
0571     GAUDI2_BMON_DCORE0_HMMU3_3,
0572     GAUDI2_BMON_DCORE0_HMMU3_2,
0573     GAUDI2_BMON_DCORE0_HMMU3_4,
0574     GAUDI2_BMON_DCORE0_MME_CTRL_0,
0575     GAUDI2_BMON_DCORE0_MME_CTRL_1,
0576     GAUDI2_BMON_DCORE0_MME_CTRL_2,
0577     GAUDI2_BMON_DCORE0_MME_CTRL_3,
0578     GAUDI2_BMON_DCORE0_MME_SBTE0_0,
0579     GAUDI2_BMON_DCORE0_MME_SBTE1_0,
0580     GAUDI2_BMON_DCORE0_MME_SBTE2_0,
0581     GAUDI2_BMON_DCORE0_MME_SBTE3_0,
0582     GAUDI2_BMON_DCORE0_MME_SBTE4_0,
0583     GAUDI2_BMON_DCORE0_MME_ACC_0,
0584     GAUDI2_BMON_DCORE0_MME_ACC_1,
0585     GAUDI2_BMON_DCORE0_SM,
0586     GAUDI2_BMON_DCORE0_SM_1,
0587     GAUDI2_BMON_DCORE0_EDMA0_0,
0588     GAUDI2_BMON_DCORE0_EDMA0_1,
0589     GAUDI2_BMON_DCORE0_EDMA1_0,
0590     GAUDI2_BMON_DCORE0_EDMA1_1,
0591     GAUDI2_BMON_DCORE0_VDEC0_0,
0592     GAUDI2_BMON_DCORE0_VDEC0_1,
0593     GAUDI2_BMON_DCORE0_VDEC0_2,
0594     GAUDI2_BMON_DCORE0_VDEC1_0,
0595     GAUDI2_BMON_DCORE0_VDEC1_1,
0596     GAUDI2_BMON_DCORE0_VDEC1_2,
0597     GAUDI2_BMON_DCORE1_HMMU0_0,
0598     GAUDI2_BMON_DCORE1_HMMU0_1,
0599     GAUDI2_BMON_DCORE1_HMMU0_3,
0600     GAUDI2_BMON_DCORE1_HMMU0_2,
0601     GAUDI2_BMON_DCORE1_HMMU0_4,
0602     GAUDI2_BMON_DCORE1_HMMU1_0,
0603     GAUDI2_BMON_DCORE1_HMMU1_1,
0604     GAUDI2_BMON_DCORE1_HMMU1_3,
0605     GAUDI2_BMON_DCORE1_HMMU1_2,
0606     GAUDI2_BMON_DCORE1_HMMU1_4,
0607     GAUDI2_BMON_DCORE1_HMMU2_0,
0608     GAUDI2_BMON_DCORE1_HMMU2_1,
0609     GAUDI2_BMON_DCORE1_HMMU2_3,
0610     GAUDI2_BMON_DCORE1_HMMU2_2,
0611     GAUDI2_BMON_DCORE1_HMMU2_4,
0612     GAUDI2_BMON_DCORE1_HMMU3_0,
0613     GAUDI2_BMON_DCORE1_HMMU3_1,
0614     GAUDI2_BMON_DCORE1_HMMU3_3,
0615     GAUDI2_BMON_DCORE1_HMMU3_2,
0616     GAUDI2_BMON_DCORE1_HMMU3_4,
0617     GAUDI2_BMON_DCORE1_MME_CTRL_0,
0618     GAUDI2_BMON_DCORE1_MME_CTRL_1,
0619     GAUDI2_BMON_DCORE1_MME_CTRL_2,
0620     GAUDI2_BMON_DCORE1_MME_CTRL_3,
0621     GAUDI2_BMON_DCORE1_MME_SBTE0_0,
0622     GAUDI2_BMON_DCORE1_MME_SBTE1_0,
0623     GAUDI2_BMON_DCORE1_MME_SBTE2_0,
0624     GAUDI2_BMON_DCORE1_MME_SBTE3_0,
0625     GAUDI2_BMON_DCORE1_MME_SBTE4_0,
0626     GAUDI2_BMON_DCORE1_MME_ACC_0,
0627     GAUDI2_BMON_DCORE1_MME_ACC_1,
0628     GAUDI2_BMON_DCORE1_SM,
0629     GAUDI2_BMON_DCORE1_SM_1,
0630     GAUDI2_BMON_DCORE1_EDMA0_0,
0631     GAUDI2_BMON_DCORE1_EDMA0_1,
0632     GAUDI2_BMON_DCORE1_EDMA1_0,
0633     GAUDI2_BMON_DCORE1_EDMA1_1,
0634     GAUDI2_BMON_DCORE1_VDEC0_0,
0635     GAUDI2_BMON_DCORE1_VDEC0_1,
0636     GAUDI2_BMON_DCORE1_VDEC0_2,
0637     GAUDI2_BMON_DCORE1_VDEC1_0,
0638     GAUDI2_BMON_DCORE1_VDEC1_1,
0639     GAUDI2_BMON_DCORE1_VDEC1_2,
0640     GAUDI2_BMON_DCORE2_HMMU0_0,
0641     GAUDI2_BMON_DCORE2_HMMU0_1,
0642     GAUDI2_BMON_DCORE2_HMMU0_3,
0643     GAUDI2_BMON_DCORE2_HMMU0_2,
0644     GAUDI2_BMON_DCORE2_HMMU0_4,
0645     GAUDI2_BMON_DCORE2_HMMU1_0,
0646     GAUDI2_BMON_DCORE2_HMMU1_1,
0647     GAUDI2_BMON_DCORE2_HMMU1_3,
0648     GAUDI2_BMON_DCORE2_HMMU1_2,
0649     GAUDI2_BMON_DCORE2_HMMU1_4,
0650     GAUDI2_BMON_DCORE2_HMMU2_0,
0651     GAUDI2_BMON_DCORE2_HMMU2_1,
0652     GAUDI2_BMON_DCORE2_HMMU2_3,
0653     GAUDI2_BMON_DCORE2_HMMU2_2,
0654     GAUDI2_BMON_DCORE2_HMMU2_4,
0655     GAUDI2_BMON_DCORE2_HMMU3_0,
0656     GAUDI2_BMON_DCORE2_HMMU3_1,
0657     GAUDI2_BMON_DCORE2_HMMU3_3,
0658     GAUDI2_BMON_DCORE2_HMMU3_2,
0659     GAUDI2_BMON_DCORE2_HMMU3_4,
0660     GAUDI2_BMON_DCORE2_MME_CTRL_0,
0661     GAUDI2_BMON_DCORE2_MME_CTRL_1,
0662     GAUDI2_BMON_DCORE2_MME_CTRL_2,
0663     GAUDI2_BMON_DCORE2_MME_CTRL_3,
0664     GAUDI2_BMON_DCORE2_MME_SBTE0_0,
0665     GAUDI2_BMON_DCORE2_MME_SBTE1_0,
0666     GAUDI2_BMON_DCORE2_MME_SBTE2_0,
0667     GAUDI2_BMON_DCORE2_MME_SBTE3_0,
0668     GAUDI2_BMON_DCORE2_MME_SBTE4_0,
0669     GAUDI2_BMON_DCORE2_MME_ACC_0,
0670     GAUDI2_BMON_DCORE2_MME_ACC_1,
0671     GAUDI2_BMON_DCORE2_SM,
0672     GAUDI2_BMON_DCORE2_SM_1,
0673     GAUDI2_BMON_DCORE2_EDMA0_0,
0674     GAUDI2_BMON_DCORE2_EDMA0_1,
0675     GAUDI2_BMON_DCORE2_EDMA1_0,
0676     GAUDI2_BMON_DCORE2_EDMA1_1,
0677     GAUDI2_BMON_DCORE2_VDEC0_0,
0678     GAUDI2_BMON_DCORE2_VDEC0_1,
0679     GAUDI2_BMON_DCORE2_VDEC0_2,
0680     GAUDI2_BMON_DCORE2_VDEC1_0,
0681     GAUDI2_BMON_DCORE2_VDEC1_1,
0682     GAUDI2_BMON_DCORE2_VDEC1_2,
0683     GAUDI2_BMON_DCORE3_HMMU0_0,
0684     GAUDI2_BMON_DCORE3_HMMU0_1,
0685     GAUDI2_BMON_DCORE3_HMMU0_3,
0686     GAUDI2_BMON_DCORE3_HMMU0_2,
0687     GAUDI2_BMON_DCORE3_HMMU0_4,
0688     GAUDI2_BMON_DCORE3_HMMU1_0,
0689     GAUDI2_BMON_DCORE3_HMMU1_1,
0690     GAUDI2_BMON_DCORE3_HMMU1_3,
0691     GAUDI2_BMON_DCORE3_HMMU1_2,
0692     GAUDI2_BMON_DCORE3_HMMU1_4,
0693     GAUDI2_BMON_DCORE3_HMMU2_0,
0694     GAUDI2_BMON_DCORE3_HMMU2_1,
0695     GAUDI2_BMON_DCORE3_HMMU2_3,
0696     GAUDI2_BMON_DCORE3_HMMU2_2,
0697     GAUDI2_BMON_DCORE3_HMMU2_4,
0698     GAUDI2_BMON_DCORE3_HMMU3_0,
0699     GAUDI2_BMON_DCORE3_HMMU3_1,
0700     GAUDI2_BMON_DCORE3_HMMU3_3,
0701     GAUDI2_BMON_DCORE3_HMMU3_2,
0702     GAUDI2_BMON_DCORE3_HMMU3_4,
0703     GAUDI2_BMON_DCORE3_MME_CTRL_0,
0704     GAUDI2_BMON_DCORE3_MME_CTRL_1,
0705     GAUDI2_BMON_DCORE3_MME_CTRL_2,
0706     GAUDI2_BMON_DCORE3_MME_CTRL_3,
0707     GAUDI2_BMON_DCORE3_MME_SBTE0_0,
0708     GAUDI2_BMON_DCORE3_MME_SBTE1_0,
0709     GAUDI2_BMON_DCORE3_MME_SBTE2_0,
0710     GAUDI2_BMON_DCORE3_MME_SBTE3_0,
0711     GAUDI2_BMON_DCORE3_MME_SBTE4_0,
0712     GAUDI2_BMON_DCORE3_MME_ACC_0,
0713     GAUDI2_BMON_DCORE3_MME_ACC_1,
0714     GAUDI2_BMON_DCORE3_SM,
0715     GAUDI2_BMON_DCORE3_SM_1,
0716     GAUDI2_BMON_DCORE3_EDMA0_0,
0717     GAUDI2_BMON_DCORE3_EDMA0_1,
0718     GAUDI2_BMON_DCORE3_EDMA1_0,
0719     GAUDI2_BMON_DCORE3_EDMA1_1,
0720     GAUDI2_BMON_DCORE3_VDEC0_0,
0721     GAUDI2_BMON_DCORE3_VDEC0_1,
0722     GAUDI2_BMON_DCORE3_VDEC0_2,
0723     GAUDI2_BMON_DCORE3_VDEC1_0,
0724     GAUDI2_BMON_DCORE3_VDEC1_1,
0725     GAUDI2_BMON_DCORE3_VDEC1_2,
0726     GAUDI2_BMON_PCIE_MSTR_WR,
0727     GAUDI2_BMON_PCIE_MSTR_RD,
0728     GAUDI2_BMON_PCIE_SLV_WR,
0729     GAUDI2_BMON_PCIE_SLV_RD,
0730     GAUDI2_BMON_PSOC_ARC0_0,
0731     GAUDI2_BMON_PSOC_ARC0_1,
0732     GAUDI2_BMON_PSOC_ARC1_0,
0733     GAUDI2_BMON_PSOC_ARC1_1,
0734     GAUDI2_BMON_PDMA0_0,
0735     GAUDI2_BMON_PDMA0_1,
0736     GAUDI2_BMON_PDMA1_0,
0737     GAUDI2_BMON_PDMA1_1,
0738     GAUDI2_BMON_CPU_WR,
0739     GAUDI2_BMON_CPU_RD,
0740     GAUDI2_BMON_PMMU_0,
0741     GAUDI2_BMON_PMMU_1,
0742     GAUDI2_BMON_PMMU_2,
0743     GAUDI2_BMON_PMMU_3,
0744     GAUDI2_BMON_PMMU_4,
0745     GAUDI2_BMON_ROT0_0,
0746     GAUDI2_BMON_ROT0_1,
0747     GAUDI2_BMON_ROT0_2,
0748     GAUDI2_BMON_ROT0_3,
0749     GAUDI2_BMON_ROT1_0,
0750     GAUDI2_BMON_ROT1_1,
0751     GAUDI2_BMON_ROT1_2,
0752     GAUDI2_BMON_ROT1_3,
0753     GAUDI2_BMON_ARC_FARM_0,
0754     GAUDI2_BMON_ARC_FARM_1,
0755     GAUDI2_BMON_ARC_FARM_2,
0756     GAUDI2_BMON_ARC_FARM_3,
0757     GAUDI2_BMON_KDMA_0,
0758     GAUDI2_BMON_KDMA_1,
0759     GAUDI2_BMON_KDMA_2,
0760     GAUDI2_BMON_KDMA_3,
0761     GAUDI2_BMON_PCIE_VDEC0_0,
0762     GAUDI2_BMON_PCIE_VDEC0_1,
0763     GAUDI2_BMON_PCIE_VDEC0_2,
0764     GAUDI2_BMON_PCIE_VDEC1_0,
0765     GAUDI2_BMON_PCIE_VDEC1_1,
0766     GAUDI2_BMON_PCIE_VDEC1_2,
0767     GAUDI2_BMON_NIC0_DBG_0_0,
0768     GAUDI2_BMON_NIC0_DBG_1_0,
0769     GAUDI2_BMON_NIC0_DBG_2_0,
0770     GAUDI2_BMON_NIC0_DBG_0_1,
0771     GAUDI2_BMON_NIC0_DBG_1_1,
0772     GAUDI2_BMON_NIC0_DBG_2_1,
0773     GAUDI2_BMON_NIC1_DBG_0_0,
0774     GAUDI2_BMON_NIC1_DBG_1_0,
0775     GAUDI2_BMON_NIC1_DBG_2_0,
0776     GAUDI2_BMON_NIC1_DBG_0_1,
0777     GAUDI2_BMON_NIC1_DBG_1_1,
0778     GAUDI2_BMON_NIC1_DBG_2_1,
0779     GAUDI2_BMON_NIC2_DBG_0_0,
0780     GAUDI2_BMON_NIC2_DBG_1_0,
0781     GAUDI2_BMON_NIC2_DBG_2_0,
0782     GAUDI2_BMON_NIC2_DBG_0_1,
0783     GAUDI2_BMON_NIC2_DBG_1_1,
0784     GAUDI2_BMON_NIC2_DBG_2_1,
0785     GAUDI2_BMON_NIC3_DBG_0_0,
0786     GAUDI2_BMON_NIC3_DBG_1_0,
0787     GAUDI2_BMON_NIC3_DBG_2_0,
0788     GAUDI2_BMON_NIC3_DBG_0_1,
0789     GAUDI2_BMON_NIC3_DBG_1_1,
0790     GAUDI2_BMON_NIC3_DBG_2_1,
0791     GAUDI2_BMON_NIC4_DBG_0_0,
0792     GAUDI2_BMON_NIC4_DBG_1_0,
0793     GAUDI2_BMON_NIC4_DBG_2_0,
0794     GAUDI2_BMON_NIC4_DBG_0_1,
0795     GAUDI2_BMON_NIC4_DBG_1_1,
0796     GAUDI2_BMON_NIC4_DBG_2_1,
0797     GAUDI2_BMON_NIC5_DBG_0_0,
0798     GAUDI2_BMON_NIC5_DBG_1_0,
0799     GAUDI2_BMON_NIC5_DBG_2_0,
0800     GAUDI2_BMON_NIC5_DBG_0_1,
0801     GAUDI2_BMON_NIC5_DBG_1_1,
0802     GAUDI2_BMON_NIC5_DBG_2_1,
0803     GAUDI2_BMON_NIC6_DBG_0_0,
0804     GAUDI2_BMON_NIC6_DBG_1_0,
0805     GAUDI2_BMON_NIC6_DBG_2_0,
0806     GAUDI2_BMON_NIC6_DBG_0_1,
0807     GAUDI2_BMON_NIC6_DBG_1_1,
0808     GAUDI2_BMON_NIC6_DBG_2_1,
0809     GAUDI2_BMON_NIC7_DBG_0_0,
0810     GAUDI2_BMON_NIC7_DBG_1_0,
0811     GAUDI2_BMON_NIC7_DBG_2_0,
0812     GAUDI2_BMON_NIC7_DBG_0_1,
0813     GAUDI2_BMON_NIC7_DBG_1_1,
0814     GAUDI2_BMON_NIC7_DBG_2_1,
0815     GAUDI2_BMON_NIC8_DBG_0_0,
0816     GAUDI2_BMON_NIC8_DBG_1_0,
0817     GAUDI2_BMON_NIC8_DBG_2_0,
0818     GAUDI2_BMON_NIC8_DBG_0_1,
0819     GAUDI2_BMON_NIC8_DBG_1_1,
0820     GAUDI2_BMON_NIC8_DBG_2_1,
0821     GAUDI2_BMON_NIC9_DBG_0_0,
0822     GAUDI2_BMON_NIC9_DBG_1_0,
0823     GAUDI2_BMON_NIC9_DBG_2_0,
0824     GAUDI2_BMON_NIC9_DBG_0_1,
0825     GAUDI2_BMON_NIC9_DBG_1_1,
0826     GAUDI2_BMON_NIC9_DBG_2_1,
0827     GAUDI2_BMON_NIC10_DBG_0_0,
0828     GAUDI2_BMON_NIC10_DBG_1_0,
0829     GAUDI2_BMON_NIC10_DBG_2_0,
0830     GAUDI2_BMON_NIC10_DBG_0_1,
0831     GAUDI2_BMON_NIC10_DBG_1_1,
0832     GAUDI2_BMON_NIC10_DBG_2_1,
0833     GAUDI2_BMON_NIC11_DBG_0_0,
0834     GAUDI2_BMON_NIC11_DBG_1_0,
0835     GAUDI2_BMON_NIC11_DBG_2_0,
0836     GAUDI2_BMON_NIC11_DBG_0_1,
0837     GAUDI2_BMON_NIC11_DBG_1_1,
0838     GAUDI2_BMON_NIC11_DBG_2_1,
0839     GAUDI2_BMON_LAST = GAUDI2_BMON_NIC11_DBG_2_1
0840 };
0841
0842 enum gaudi2_debug_spmu_regs_index {
0843     GAUDI2_SPMU_FIRST = 0,
0844     GAUDI2_SPMU_DCORE0_TPC0_EML = GAUDI2_SPMU_FIRST,
0845     GAUDI2_SPMU_DCORE0_TPC1_EML,
0846     GAUDI2_SPMU_DCORE0_TPC2_EML,
0847     GAUDI2_SPMU_DCORE0_TPC3_EML,
0848     GAUDI2_SPMU_DCORE0_TPC4_EML,
0849     GAUDI2_SPMU_DCORE0_TPC5_EML,
0850     GAUDI2_SPMU_DCORE0_TPC6_EML,
0851     GAUDI2_SPMU_DCORE1_TPC0_EML,
0852     GAUDI2_SPMU_DCORE1_TPC1_EML,
0853     GAUDI2_SPMU_DCORE1_TPC2_EML,
0854     GAUDI2_SPMU_DCORE1_TPC3_EML,
0855     GAUDI2_SPMU_DCORE1_TPC4_EML,
0856     GAUDI2_SPMU_DCORE1_TPC5_EML,
0857     GAUDI2_SPMU_DCORE2_TPC0_EML,
0858     GAUDI2_SPMU_DCORE2_TPC1_EML,
0859     GAUDI2_SPMU_DCORE2_TPC2_EML,
0860     GAUDI2_SPMU_DCORE2_TPC3_EML,
0861     GAUDI2_SPMU_DCORE2_TPC4_EML,
0862     GAUDI2_SPMU_DCORE2_TPC5_EML,
0863     GAUDI2_SPMU_DCORE3_TPC0_EML,
0864     GAUDI2_SPMU_DCORE3_TPC1_EML,
0865     GAUDI2_SPMU_DCORE3_TPC2_EML,
0866     GAUDI2_SPMU_DCORE3_TPC3_EML,
0867     GAUDI2_SPMU_DCORE3_TPC4_EML,
0868     GAUDI2_SPMU_DCORE3_TPC5_EML,
0869     GAUDI2_SPMU_DCORE0_HMMU0_CS,
0870     GAUDI2_SPMU_DCORE0_HMMU1_CS,
0871     GAUDI2_SPMU_DCORE0_HMMU2_CS,
0872     GAUDI2_SPMU_DCORE0_HMMU3_CS,
0873     GAUDI2_SPMU_DCORE0_MME_CTRL,
0874     GAUDI2_SPMU_DCORE0_MME_SBTE0,
0875     GAUDI2_SPMU_DCORE0_MME_SBTE1,
0876     GAUDI2_SPMU_DCORE0_MME_SBTE2,
0877     GAUDI2_SPMU_DCORE0_MME_SBTE3,
0878     GAUDI2_SPMU_DCORE0_MME_SBTE4,
0879     GAUDI2_SPMU_DCORE0_MME_ACC,
0880     GAUDI2_SPMU_DCORE0_SM,
0881     GAUDI2_SPMU_DCORE0_EDMA0_CS,
0882     GAUDI2_SPMU_DCORE0_EDMA1_CS,
0883     GAUDI2_SPMU_DCORE0_VDEC0_CS,
0884     GAUDI2_SPMU_DCORE0_VDEC1_CS,
0885     GAUDI2_SPMU_DCORE1_HMMU0_CS,
0886     GAUDI2_SPMU_DCORE1_HMMU1_CS,
0887     GAUDI2_SPMU_DCORE1_HMMU2_CS,
0888     GAUDI2_SPMU_DCORE1_HMMU3_CS,
0889     GAUDI2_SPMU_DCORE1_MME_CTRL,
0890     GAUDI2_SPMU_DCORE1_MME_SBTE0,
0891     GAUDI2_SPMU_DCORE1_MME_SBTE1,
0892     GAUDI2_SPMU_DCORE1_MME_SBTE2,
0893     GAUDI2_SPMU_DCORE1_MME_SBTE3,
0894     GAUDI2_SPMU_DCORE1_MME_SBTE4,
0895     GAUDI2_SPMU_DCORE1_MME_ACC,
0896     GAUDI2_SPMU_DCORE1_SM,
0897     GAUDI2_SPMU_DCORE1_EDMA0_CS,
0898     GAUDI2_SPMU_DCORE1_EDMA1_CS,
0899     GAUDI2_SPMU_DCORE1_VDEC0_CS,
0900     GAUDI2_SPMU_DCORE1_VDEC1_CS,
0901     GAUDI2_SPMU_DCORE2_HMMU0_CS,
0902     GAUDI2_SPMU_DCORE2_HMMU1_CS,
0903     GAUDI2_SPMU_DCORE2_HMMU2_CS,
0904     GAUDI2_SPMU_DCORE2_HMMU3_CS,
0905     GAUDI2_SPMU_DCORE2_MME_CTRL,
0906     GAUDI2_SPMU_DCORE2_MME_SBTE0,
0907     GAUDI2_SPMU_DCORE2_MME_SBTE1,
0908     GAUDI2_SPMU_DCORE2_MME_SBTE2,
0909     GAUDI2_SPMU_DCORE2_MME_SBTE3,
0910     GAUDI2_SPMU_DCORE2_MME_SBTE4,
0911     GAUDI2_SPMU_DCORE2_MME_ACC,
0912     GAUDI2_SPMU_DCORE2_SM,
0913     GAUDI2_SPMU_DCORE2_EDMA0_CS,
0914     GAUDI2_SPMU_DCORE2_EDMA1_CS,
0915     GAUDI2_SPMU_DCORE2_VDEC0_CS,
0916     GAUDI2_SPMU_DCORE2_VDEC1_CS,
0917     GAUDI2_SPMU_DCORE3_HMMU0_CS,
0918     GAUDI2_SPMU_DCORE3_HMMU1_CS,
0919     GAUDI2_SPMU_DCORE3_HMMU2_CS,
0920     GAUDI2_SPMU_DCORE3_HMMU3_CS,
0921     GAUDI2_SPMU_DCORE3_MME_CTRL,
0922     GAUDI2_SPMU_DCORE3_MME_SBTE0,
0923     GAUDI2_SPMU_DCORE3_MME_SBTE1,
0924     GAUDI2_SPMU_DCORE3_MME_SBTE2,
0925     GAUDI2_SPMU_DCORE3_MME_SBTE3,
0926     GAUDI2_SPMU_DCORE3_MME_SBTE4,
0927     GAUDI2_SPMU_DCORE3_MME_ACC,
0928     GAUDI2_SPMU_DCORE3_SM,
0929     GAUDI2_SPMU_DCORE3_EDMA0_CS,
0930     GAUDI2_SPMU_DCORE3_EDMA1_CS,
0931     GAUDI2_SPMU_DCORE3_VDEC0_CS,
0932     GAUDI2_SPMU_DCORE3_VDEC1_CS,
0933     GAUDI2_SPMU_PCIE,
0934     GAUDI2_SPMU_PSOC_ARC0_CS,
0935     GAUDI2_SPMU_PSOC_ARC1_CS,
0936     GAUDI2_SPMU_PDMA0_CS,
0937     GAUDI2_SPMU_PDMA1_CS,
0938     GAUDI2_SPMU_PMMU_CS,
0939     GAUDI2_SPMU_ROT0_CS,
0940     GAUDI2_SPMU_ROT1_CS,
0941     GAUDI2_SPMU_ARC_FARM_CS,
0942     GAUDI2_SPMU_KDMA_CS,
0943     GAUDI2_SPMU_PCIE_VDEC0_CS,
0944     GAUDI2_SPMU_PCIE_VDEC1_CS,
0945     GAUDI2_SPMU_HBM0_MC0_CS,
0946     GAUDI2_SPMU_HBM0_MC1_CS,
0947     GAUDI2_SPMU_HBM1_MC0_CS,
0948     GAUDI2_SPMU_HBM1_MC1_CS,
0949     GAUDI2_SPMU_HBM2_MC0_CS,
0950     GAUDI2_SPMU_HBM2_MC1_CS,
0951     GAUDI2_SPMU_HBM3_MC0_CS,
0952     GAUDI2_SPMU_HBM3_MC1_CS,
0953     GAUDI2_SPMU_HBM4_MC0_CS,
0954     GAUDI2_SPMU_HBM4_MC1_CS,
0955     GAUDI2_SPMU_HBM5_MC0_CS,
0956     GAUDI2_SPMU_HBM5_MC1_CS,
0957     GAUDI2_SPMU_NIC0_DBG_0,
0958     GAUDI2_SPMU_NIC0_DBG_1,
0959     GAUDI2_SPMU_NIC1_DBG_0,
0960     GAUDI2_SPMU_NIC1_DBG_1,
0961     GAUDI2_SPMU_NIC2_DBG_0,
0962     GAUDI2_SPMU_NIC2_DBG_1,
0963     GAUDI2_SPMU_NIC3_DBG_0,
0964     GAUDI2_SPMU_NIC3_DBG_1,
0965     GAUDI2_SPMU_NIC4_DBG_0,
0966     GAUDI2_SPMU_NIC4_DBG_1,
0967     GAUDI2_SPMU_NIC5_DBG_0,
0968     GAUDI2_SPMU_NIC5_DBG_1,
0969     GAUDI2_SPMU_NIC6_DBG_0,
0970     GAUDI2_SPMU_NIC6_DBG_1,
0971     GAUDI2_SPMU_NIC7_DBG_0,
0972     GAUDI2_SPMU_NIC7_DBG_1,
0973     GAUDI2_SPMU_NIC8_DBG_0,
0974     GAUDI2_SPMU_NIC8_DBG_1,
0975     GAUDI2_SPMU_NIC9_DBG_0,
0976     GAUDI2_SPMU_NIC9_DBG_1,
0977     GAUDI2_SPMU_NIC10_DBG_0,
0978     GAUDI2_SPMU_NIC10_DBG_1,
0979     GAUDI2_SPMU_NIC11_DBG_0,
0980     GAUDI2_SPMU_NIC11_DBG_1,
0981     GAUDI2_SPMU_LAST = GAUDI2_SPMU_NIC11_DBG_1
0982 };
0983
0984 #endif /* GAUDI2_CORESIGHT_H */