gaudi/asic_reg/stlb_regs.h

0001 /* SPDX-License-Identifier: GPL-2.0
0002  *
0003  * Copyright 2016-2018 HabanaLabs, Ltd.
0004  * All Rights Reserved.
0005  *
0006  */
0007
0008 /************************************
0009  ** This is an auto-generated file **
0010  **       DO NOT EDIT BELOW        **
0011  ************************************/
0012
0013 #ifndef ASIC_REG_STLB_REGS_H_
0014 #define ASIC_REG_STLB_REGS_H_
0015
0016 /*
0017  *****************************************
0018  *   STLB (Prototype: STLB)
0019  *****************************************
0020  */
0021
0022 #define mmSTLB_CACHE_INV                                             0xC12010
0023
0024 #define mmSTLB_CACHE_INV_BASE_39_8                                   0xC12014
0025
0026 #define mmSTLB_CACHE_INV_BASE_49_40                                  0xC12018
0027
0028 #define mmSTLB_STLB_FEATURE_EN                                       0xC1201C
0029
0030 #define mmSTLB_STLB_AXI_CACHE                                        0xC12020
0031
0032 #define mmSTLB_HOP_CONFIGURATION                                     0xC12024
0033
0034 #define mmSTLB_LINK_LIST_LOOKUP_MASK_49_32                           0xC12028
0035
0036 #define mmSTLB_LINK_LIST_LOOKUP_MASK_31_0                            0xC1202C
0037
0038 #define mmSTLB_LINK_LIST                                             0xC12030
0039
0040 #define mmSTLB_INV_ALL_START                                         0xC12034
0041
0042 #define mmSTLB_INV_ALL_SET                                           0xC12038
0043
0044 #define mmSTLB_INV_PS                                                0xC1203C
0045
0046 #define mmSTLB_INV_CONSUMER_INDEX                                    0xC12040
0047
0048 #define mmSTLB_INV_HIT_COUNT                                         0xC12044
0049
0050 #define mmSTLB_INV_SET                                               0xC12048
0051
0052 #define mmSTLB_SRAM_INIT                                             0xC1204C
0053
0054 #define mmSTLB_MEM_CACHE_INVALIDATION                                0xC12050
0055
0056 #define mmSTLB_MEM_CACHE_INV_STATUS                                  0xC12054
0057
0058 #define mmSTLB_MEM_CACHE_BASE_38_7                                   0xC12058
0059
0060 #define mmSTLB_MEM_CACHE_BASE_49_39                                  0xC1205C
0061
0062 #define mmSTLB_MEM_CACHE_CONFIG                                      0xC12060
0063
0064 #define mmSTLB_SET_THRESHOLD_HOP4                                    0xC12064
0065
0066 #define mmSTLB_SET_THRESHOLD_HOP3                                    0xC12068
0067
0068 #define mmSTLB_SET_THRESHOLD_HOP2                                    0xC1206C
0069
0070 #define mmSTLB_SET_THRESHOLD_HOP1                                    0xC12070
0071
0072 #define mmSTLB_SET_THRESHOLD_HOP0                                    0xC12074
0073
0074 #define mmSTLB_MULTI_HIT_INTERRUPT_CLR                               0xC12078
0075
0076 #define mmSTLB_MULTI_HIT_INTERRUPT_MASK                              0xC1207C
0077
0078 #define mmSTLB_MEM_L0_CACHE_CFG                                      0xC12080
0079
0080 #define mmSTLB_MEM_READ_ARPROT                                       0xC12084
0081
0082 #endif /* ASIC_REG_STLB_REGS_H_ */