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0001 /* SPDX-License-Identifier: GPL-2.0
0002  *
0003  * Copyright 2016-2018 HabanaLabs, Ltd.
0004  * All Rights Reserved.
0005  *
0006  */
0007 
0008 /************************************
0009  ** This is an auto-generated file **
0010  **       DO NOT EDIT BELOW        **
0011  ************************************/
0012 
0013 #ifndef ASIC_REG_NIC4_QM1_REGS_H_
0014 #define ASIC_REG_NIC4_QM1_REGS_H_
0015 
0016 /*
0017  *****************************************
0018  *   NIC4_QM1 (Prototype: QMAN)
0019  *****************************************
0020  */
0021 
0022 #define mmNIC4_QM1_GLBL_CFG0                                         0xDE2000
0023 
0024 #define mmNIC4_QM1_GLBL_CFG1                                         0xDE2004
0025 
0026 #define mmNIC4_QM1_GLBL_PROT                                         0xDE2008
0027 
0028 #define mmNIC4_QM1_GLBL_ERR_CFG                                      0xDE200C
0029 
0030 #define mmNIC4_QM1_GLBL_SECURE_PROPS_0                               0xDE2010
0031 
0032 #define mmNIC4_QM1_GLBL_SECURE_PROPS_1                               0xDE2014
0033 
0034 #define mmNIC4_QM1_GLBL_SECURE_PROPS_2                               0xDE2018
0035 
0036 #define mmNIC4_QM1_GLBL_SECURE_PROPS_3                               0xDE201C
0037 
0038 #define mmNIC4_QM1_GLBL_SECURE_PROPS_4                               0xDE2020
0039 
0040 #define mmNIC4_QM1_GLBL_NON_SECURE_PROPS_0                           0xDE2024
0041 
0042 #define mmNIC4_QM1_GLBL_NON_SECURE_PROPS_1                           0xDE2028
0043 
0044 #define mmNIC4_QM1_GLBL_NON_SECURE_PROPS_2                           0xDE202C
0045 
0046 #define mmNIC4_QM1_GLBL_NON_SECURE_PROPS_3                           0xDE2030
0047 
0048 #define mmNIC4_QM1_GLBL_NON_SECURE_PROPS_4                           0xDE2034
0049 
0050 #define mmNIC4_QM1_GLBL_STS0                                         0xDE2038
0051 
0052 #define mmNIC4_QM1_GLBL_STS1_0                                       0xDE2040
0053 
0054 #define mmNIC4_QM1_GLBL_STS1_1                                       0xDE2044
0055 
0056 #define mmNIC4_QM1_GLBL_STS1_2                                       0xDE2048
0057 
0058 #define mmNIC4_QM1_GLBL_STS1_3                                       0xDE204C
0059 
0060 #define mmNIC4_QM1_GLBL_STS1_4                                       0xDE2050
0061 
0062 #define mmNIC4_QM1_GLBL_MSG_EN_0                                     0xDE2054
0063 
0064 #define mmNIC4_QM1_GLBL_MSG_EN_1                                     0xDE2058
0065 
0066 #define mmNIC4_QM1_GLBL_MSG_EN_2                                     0xDE205C
0067 
0068 #define mmNIC4_QM1_GLBL_MSG_EN_3                                     0xDE2060
0069 
0070 #define mmNIC4_QM1_GLBL_MSG_EN_4                                     0xDE2068
0071 
0072 #define mmNIC4_QM1_PQ_BASE_LO_0                                      0xDE2070
0073 
0074 #define mmNIC4_QM1_PQ_BASE_LO_1                                      0xDE2074
0075 
0076 #define mmNIC4_QM1_PQ_BASE_LO_2                                      0xDE2078
0077 
0078 #define mmNIC4_QM1_PQ_BASE_LO_3                                      0xDE207C
0079 
0080 #define mmNIC4_QM1_PQ_BASE_HI_0                                      0xDE2080
0081 
0082 #define mmNIC4_QM1_PQ_BASE_HI_1                                      0xDE2084
0083 
0084 #define mmNIC4_QM1_PQ_BASE_HI_2                                      0xDE2088
0085 
0086 #define mmNIC4_QM1_PQ_BASE_HI_3                                      0xDE208C
0087 
0088 #define mmNIC4_QM1_PQ_SIZE_0                                         0xDE2090
0089 
0090 #define mmNIC4_QM1_PQ_SIZE_1                                         0xDE2094
0091 
0092 #define mmNIC4_QM1_PQ_SIZE_2                                         0xDE2098
0093 
0094 #define mmNIC4_QM1_PQ_SIZE_3                                         0xDE209C
0095 
0096 #define mmNIC4_QM1_PQ_PI_0                                           0xDE20A0
0097 
0098 #define mmNIC4_QM1_PQ_PI_1                                           0xDE20A4
0099 
0100 #define mmNIC4_QM1_PQ_PI_2                                           0xDE20A8
0101 
0102 #define mmNIC4_QM1_PQ_PI_3                                           0xDE20AC
0103 
0104 #define mmNIC4_QM1_PQ_CI_0                                           0xDE20B0
0105 
0106 #define mmNIC4_QM1_PQ_CI_1                                           0xDE20B4
0107 
0108 #define mmNIC4_QM1_PQ_CI_2                                           0xDE20B8
0109 
0110 #define mmNIC4_QM1_PQ_CI_3                                           0xDE20BC
0111 
0112 #define mmNIC4_QM1_PQ_CFG0_0                                         0xDE20C0
0113 
0114 #define mmNIC4_QM1_PQ_CFG0_1                                         0xDE20C4
0115 
0116 #define mmNIC4_QM1_PQ_CFG0_2                                         0xDE20C8
0117 
0118 #define mmNIC4_QM1_PQ_CFG0_3                                         0xDE20CC
0119 
0120 #define mmNIC4_QM1_PQ_CFG1_0                                         0xDE20D0
0121 
0122 #define mmNIC4_QM1_PQ_CFG1_1                                         0xDE20D4
0123 
0124 #define mmNIC4_QM1_PQ_CFG1_2                                         0xDE20D8
0125 
0126 #define mmNIC4_QM1_PQ_CFG1_3                                         0xDE20DC
0127 
0128 #define mmNIC4_QM1_PQ_ARUSER_31_11_0                                 0xDE20E0
0129 
0130 #define mmNIC4_QM1_PQ_ARUSER_31_11_1                                 0xDE20E4
0131 
0132 #define mmNIC4_QM1_PQ_ARUSER_31_11_2                                 0xDE20E8
0133 
0134 #define mmNIC4_QM1_PQ_ARUSER_31_11_3                                 0xDE20EC
0135 
0136 #define mmNIC4_QM1_PQ_STS0_0                                         0xDE20F0
0137 
0138 #define mmNIC4_QM1_PQ_STS0_1                                         0xDE20F4
0139 
0140 #define mmNIC4_QM1_PQ_STS0_2                                         0xDE20F8
0141 
0142 #define mmNIC4_QM1_PQ_STS0_3                                         0xDE20FC
0143 
0144 #define mmNIC4_QM1_PQ_STS1_0                                         0xDE2100
0145 
0146 #define mmNIC4_QM1_PQ_STS1_1                                         0xDE2104
0147 
0148 #define mmNIC4_QM1_PQ_STS1_2                                         0xDE2108
0149 
0150 #define mmNIC4_QM1_PQ_STS1_3                                         0xDE210C
0151 
0152 #define mmNIC4_QM1_CQ_CFG0_0                                         0xDE2110
0153 
0154 #define mmNIC4_QM1_CQ_CFG0_1                                         0xDE2114
0155 
0156 #define mmNIC4_QM1_CQ_CFG0_2                                         0xDE2118
0157 
0158 #define mmNIC4_QM1_CQ_CFG0_3                                         0xDE211C
0159 
0160 #define mmNIC4_QM1_CQ_CFG0_4                                         0xDE2120
0161 
0162 #define mmNIC4_QM1_CQ_CFG1_0                                         0xDE2124
0163 
0164 #define mmNIC4_QM1_CQ_CFG1_1                                         0xDE2128
0165 
0166 #define mmNIC4_QM1_CQ_CFG1_2                                         0xDE212C
0167 
0168 #define mmNIC4_QM1_CQ_CFG1_3                                         0xDE2130
0169 
0170 #define mmNIC4_QM1_CQ_CFG1_4                                         0xDE2134
0171 
0172 #define mmNIC4_QM1_CQ_ARUSER_31_11_0                                 0xDE2138
0173 
0174 #define mmNIC4_QM1_CQ_ARUSER_31_11_1                                 0xDE213C
0175 
0176 #define mmNIC4_QM1_CQ_ARUSER_31_11_2                                 0xDE2140
0177 
0178 #define mmNIC4_QM1_CQ_ARUSER_31_11_3                                 0xDE2144
0179 
0180 #define mmNIC4_QM1_CQ_ARUSER_31_11_4                                 0xDE2148
0181 
0182 #define mmNIC4_QM1_CQ_STS0_0                                         0xDE214C
0183 
0184 #define mmNIC4_QM1_CQ_STS0_1                                         0xDE2150
0185 
0186 #define mmNIC4_QM1_CQ_STS0_2                                         0xDE2154
0187 
0188 #define mmNIC4_QM1_CQ_STS0_3                                         0xDE2158
0189 
0190 #define mmNIC4_QM1_CQ_STS0_4                                         0xDE215C
0191 
0192 #define mmNIC4_QM1_CQ_STS1_0                                         0xDE2160
0193 
0194 #define mmNIC4_QM1_CQ_STS1_1                                         0xDE2164
0195 
0196 #define mmNIC4_QM1_CQ_STS1_2                                         0xDE2168
0197 
0198 #define mmNIC4_QM1_CQ_STS1_3                                         0xDE216C
0199 
0200 #define mmNIC4_QM1_CQ_STS1_4                                         0xDE2170
0201 
0202 #define mmNIC4_QM1_CQ_PTR_LO_0                                       0xDE2174
0203 
0204 #define mmNIC4_QM1_CQ_PTR_HI_0                                       0xDE2178
0205 
0206 #define mmNIC4_QM1_CQ_TSIZE_0                                        0xDE217C
0207 
0208 #define mmNIC4_QM1_CQ_CTL_0                                          0xDE2180
0209 
0210 #define mmNIC4_QM1_CQ_PTR_LO_1                                       0xDE2184
0211 
0212 #define mmNIC4_QM1_CQ_PTR_HI_1                                       0xDE2188
0213 
0214 #define mmNIC4_QM1_CQ_TSIZE_1                                        0xDE218C
0215 
0216 #define mmNIC4_QM1_CQ_CTL_1                                          0xDE2190
0217 
0218 #define mmNIC4_QM1_CQ_PTR_LO_2                                       0xDE2194
0219 
0220 #define mmNIC4_QM1_CQ_PTR_HI_2                                       0xDE2198
0221 
0222 #define mmNIC4_QM1_CQ_TSIZE_2                                        0xDE219C
0223 
0224 #define mmNIC4_QM1_CQ_CTL_2                                          0xDE21A0
0225 
0226 #define mmNIC4_QM1_CQ_PTR_LO_3                                       0xDE21A4
0227 
0228 #define mmNIC4_QM1_CQ_PTR_HI_3                                       0xDE21A8
0229 
0230 #define mmNIC4_QM1_CQ_TSIZE_3                                        0xDE21AC
0231 
0232 #define mmNIC4_QM1_CQ_CTL_3                                          0xDE21B0
0233 
0234 #define mmNIC4_QM1_CQ_PTR_LO_4                                       0xDE21B4
0235 
0236 #define mmNIC4_QM1_CQ_PTR_HI_4                                       0xDE21B8
0237 
0238 #define mmNIC4_QM1_CQ_TSIZE_4                                        0xDE21BC
0239 
0240 #define mmNIC4_QM1_CQ_CTL_4                                          0xDE21C0
0241 
0242 #define mmNIC4_QM1_CQ_PTR_LO_STS_0                                   0xDE21C4
0243 
0244 #define mmNIC4_QM1_CQ_PTR_LO_STS_1                                   0xDE21C8
0245 
0246 #define mmNIC4_QM1_CQ_PTR_LO_STS_2                                   0xDE21CC
0247 
0248 #define mmNIC4_QM1_CQ_PTR_LO_STS_3                                   0xDE21D0
0249 
0250 #define mmNIC4_QM1_CQ_PTR_LO_STS_4                                   0xDE21D4
0251 
0252 #define mmNIC4_QM1_CQ_PTR_HI_STS_0                                   0xDE21D8
0253 
0254 #define mmNIC4_QM1_CQ_PTR_HI_STS_1                                   0xDE21DC
0255 
0256 #define mmNIC4_QM1_CQ_PTR_HI_STS_2                                   0xDE21E0
0257 
0258 #define mmNIC4_QM1_CQ_PTR_HI_STS_3                                   0xDE21E4
0259 
0260 #define mmNIC4_QM1_CQ_PTR_HI_STS_4                                   0xDE21E8
0261 
0262 #define mmNIC4_QM1_CQ_TSIZE_STS_0                                    0xDE21EC
0263 
0264 #define mmNIC4_QM1_CQ_TSIZE_STS_1                                    0xDE21F0
0265 
0266 #define mmNIC4_QM1_CQ_TSIZE_STS_2                                    0xDE21F4
0267 
0268 #define mmNIC4_QM1_CQ_TSIZE_STS_3                                    0xDE21F8
0269 
0270 #define mmNIC4_QM1_CQ_TSIZE_STS_4                                    0xDE21FC
0271 
0272 #define mmNIC4_QM1_CQ_CTL_STS_0                                      0xDE2200
0273 
0274 #define mmNIC4_QM1_CQ_CTL_STS_1                                      0xDE2204
0275 
0276 #define mmNIC4_QM1_CQ_CTL_STS_2                                      0xDE2208
0277 
0278 #define mmNIC4_QM1_CQ_CTL_STS_3                                      0xDE220C
0279 
0280 #define mmNIC4_QM1_CQ_CTL_STS_4                                      0xDE2210
0281 
0282 #define mmNIC4_QM1_CQ_IFIFO_CNT_0                                    0xDE2214
0283 
0284 #define mmNIC4_QM1_CQ_IFIFO_CNT_1                                    0xDE2218
0285 
0286 #define mmNIC4_QM1_CQ_IFIFO_CNT_2                                    0xDE221C
0287 
0288 #define mmNIC4_QM1_CQ_IFIFO_CNT_3                                    0xDE2220
0289 
0290 #define mmNIC4_QM1_CQ_IFIFO_CNT_4                                    0xDE2224
0291 
0292 #define mmNIC4_QM1_CP_MSG_BASE0_ADDR_LO_0                            0xDE2228
0293 
0294 #define mmNIC4_QM1_CP_MSG_BASE0_ADDR_LO_1                            0xDE222C
0295 
0296 #define mmNIC4_QM1_CP_MSG_BASE0_ADDR_LO_2                            0xDE2230
0297 
0298 #define mmNIC4_QM1_CP_MSG_BASE0_ADDR_LO_3                            0xDE2234
0299 
0300 #define mmNIC4_QM1_CP_MSG_BASE0_ADDR_LO_4                            0xDE2238
0301 
0302 #define mmNIC4_QM1_CP_MSG_BASE0_ADDR_HI_0                            0xDE223C
0303 
0304 #define mmNIC4_QM1_CP_MSG_BASE0_ADDR_HI_1                            0xDE2240
0305 
0306 #define mmNIC4_QM1_CP_MSG_BASE0_ADDR_HI_2                            0xDE2244
0307 
0308 #define mmNIC4_QM1_CP_MSG_BASE0_ADDR_HI_3                            0xDE2248
0309 
0310 #define mmNIC4_QM1_CP_MSG_BASE0_ADDR_HI_4                            0xDE224C
0311 
0312 #define mmNIC4_QM1_CP_MSG_BASE1_ADDR_LO_0                            0xDE2250
0313 
0314 #define mmNIC4_QM1_CP_MSG_BASE1_ADDR_LO_1                            0xDE2254
0315 
0316 #define mmNIC4_QM1_CP_MSG_BASE1_ADDR_LO_2                            0xDE2258
0317 
0318 #define mmNIC4_QM1_CP_MSG_BASE1_ADDR_LO_3                            0xDE225C
0319 
0320 #define mmNIC4_QM1_CP_MSG_BASE1_ADDR_LO_4                            0xDE2260
0321 
0322 #define mmNIC4_QM1_CP_MSG_BASE1_ADDR_HI_0                            0xDE2264
0323 
0324 #define mmNIC4_QM1_CP_MSG_BASE1_ADDR_HI_1                            0xDE2268
0325 
0326 #define mmNIC4_QM1_CP_MSG_BASE1_ADDR_HI_2                            0xDE226C
0327 
0328 #define mmNIC4_QM1_CP_MSG_BASE1_ADDR_HI_3                            0xDE2270
0329 
0330 #define mmNIC4_QM1_CP_MSG_BASE1_ADDR_HI_4                            0xDE2274
0331 
0332 #define mmNIC4_QM1_CP_MSG_BASE2_ADDR_LO_0                            0xDE2278
0333 
0334 #define mmNIC4_QM1_CP_MSG_BASE2_ADDR_LO_1                            0xDE227C
0335 
0336 #define mmNIC4_QM1_CP_MSG_BASE2_ADDR_LO_2                            0xDE2280
0337 
0338 #define mmNIC4_QM1_CP_MSG_BASE2_ADDR_LO_3                            0xDE2284
0339 
0340 #define mmNIC4_QM1_CP_MSG_BASE2_ADDR_LO_4                            0xDE2288
0341 
0342 #define mmNIC4_QM1_CP_MSG_BASE2_ADDR_HI_0                            0xDE228C
0343 
0344 #define mmNIC4_QM1_CP_MSG_BASE2_ADDR_HI_1                            0xDE2290
0345 
0346 #define mmNIC4_QM1_CP_MSG_BASE2_ADDR_HI_2                            0xDE2294
0347 
0348 #define mmNIC4_QM1_CP_MSG_BASE2_ADDR_HI_3                            0xDE2298
0349 
0350 #define mmNIC4_QM1_CP_MSG_BASE2_ADDR_HI_4                            0xDE229C
0351 
0352 #define mmNIC4_QM1_CP_MSG_BASE3_ADDR_LO_0                            0xDE22A0
0353 
0354 #define mmNIC4_QM1_CP_MSG_BASE3_ADDR_LO_1                            0xDE22A4
0355 
0356 #define mmNIC4_QM1_CP_MSG_BASE3_ADDR_LO_2                            0xDE22A8
0357 
0358 #define mmNIC4_QM1_CP_MSG_BASE3_ADDR_LO_3                            0xDE22AC
0359 
0360 #define mmNIC4_QM1_CP_MSG_BASE3_ADDR_LO_4                            0xDE22B0
0361 
0362 #define mmNIC4_QM1_CP_MSG_BASE3_ADDR_HI_0                            0xDE22B4
0363 
0364 #define mmNIC4_QM1_CP_MSG_BASE3_ADDR_HI_1                            0xDE22B8
0365 
0366 #define mmNIC4_QM1_CP_MSG_BASE3_ADDR_HI_2                            0xDE22BC
0367 
0368 #define mmNIC4_QM1_CP_MSG_BASE3_ADDR_HI_3                            0xDE22C0
0369 
0370 #define mmNIC4_QM1_CP_MSG_BASE3_ADDR_HI_4                            0xDE22C4
0371 
0372 #define mmNIC4_QM1_CP_LDMA_TSIZE_OFFSET_0                            0xDE22C8
0373 
0374 #define mmNIC4_QM1_CP_LDMA_TSIZE_OFFSET_1                            0xDE22CC
0375 
0376 #define mmNIC4_QM1_CP_LDMA_TSIZE_OFFSET_2                            0xDE22D0
0377 
0378 #define mmNIC4_QM1_CP_LDMA_TSIZE_OFFSET_3                            0xDE22D4
0379 
0380 #define mmNIC4_QM1_CP_LDMA_TSIZE_OFFSET_4                            0xDE22D8
0381 
0382 #define mmNIC4_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_0                      0xDE22E0
0383 
0384 #define mmNIC4_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_1                      0xDE22E4
0385 
0386 #define mmNIC4_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_2                      0xDE22E8
0387 
0388 #define mmNIC4_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_3                      0xDE22EC
0389 
0390 #define mmNIC4_QM1_CP_LDMA_SRC_BASE_LO_OFFSET_4                      0xDE22F0
0391 
0392 #define mmNIC4_QM1_CP_LDMA_DST_BASE_LO_OFFSET_0                      0xDE22F4
0393 
0394 #define mmNIC4_QM1_CP_LDMA_DST_BASE_LO_OFFSET_1                      0xDE22F8
0395 
0396 #define mmNIC4_QM1_CP_LDMA_DST_BASE_LO_OFFSET_2                      0xDE22FC
0397 
0398 #define mmNIC4_QM1_CP_LDMA_DST_BASE_LO_OFFSET_3                      0xDE2300
0399 
0400 #define mmNIC4_QM1_CP_LDMA_DST_BASE_LO_OFFSET_4                      0xDE2304
0401 
0402 #define mmNIC4_QM1_CP_FENCE0_RDATA_0                                 0xDE2308
0403 
0404 #define mmNIC4_QM1_CP_FENCE0_RDATA_1                                 0xDE230C
0405 
0406 #define mmNIC4_QM1_CP_FENCE0_RDATA_2                                 0xDE2310
0407 
0408 #define mmNIC4_QM1_CP_FENCE0_RDATA_3                                 0xDE2314
0409 
0410 #define mmNIC4_QM1_CP_FENCE0_RDATA_4                                 0xDE2318
0411 
0412 #define mmNIC4_QM1_CP_FENCE1_RDATA_0                                 0xDE231C
0413 
0414 #define mmNIC4_QM1_CP_FENCE1_RDATA_1                                 0xDE2320
0415 
0416 #define mmNIC4_QM1_CP_FENCE1_RDATA_2                                 0xDE2324
0417 
0418 #define mmNIC4_QM1_CP_FENCE1_RDATA_3                                 0xDE2328
0419 
0420 #define mmNIC4_QM1_CP_FENCE1_RDATA_4                                 0xDE232C
0421 
0422 #define mmNIC4_QM1_CP_FENCE2_RDATA_0                                 0xDE2330
0423 
0424 #define mmNIC4_QM1_CP_FENCE2_RDATA_1                                 0xDE2334
0425 
0426 #define mmNIC4_QM1_CP_FENCE2_RDATA_2                                 0xDE2338
0427 
0428 #define mmNIC4_QM1_CP_FENCE2_RDATA_3                                 0xDE233C
0429 
0430 #define mmNIC4_QM1_CP_FENCE2_RDATA_4                                 0xDE2340
0431 
0432 #define mmNIC4_QM1_CP_FENCE3_RDATA_0                                 0xDE2344
0433 
0434 #define mmNIC4_QM1_CP_FENCE3_RDATA_1                                 0xDE2348
0435 
0436 #define mmNIC4_QM1_CP_FENCE3_RDATA_2                                 0xDE234C
0437 
0438 #define mmNIC4_QM1_CP_FENCE3_RDATA_3                                 0xDE2350
0439 
0440 #define mmNIC4_QM1_CP_FENCE3_RDATA_4                                 0xDE2354
0441 
0442 #define mmNIC4_QM1_CP_FENCE0_CNT_0                                   0xDE2358
0443 
0444 #define mmNIC4_QM1_CP_FENCE0_CNT_1                                   0xDE235C
0445 
0446 #define mmNIC4_QM1_CP_FENCE0_CNT_2                                   0xDE2360
0447 
0448 #define mmNIC4_QM1_CP_FENCE0_CNT_3                                   0xDE2364
0449 
0450 #define mmNIC4_QM1_CP_FENCE0_CNT_4                                   0xDE2368
0451 
0452 #define mmNIC4_QM1_CP_FENCE1_CNT_0                                   0xDE236C
0453 
0454 #define mmNIC4_QM1_CP_FENCE1_CNT_1                                   0xDE2370
0455 
0456 #define mmNIC4_QM1_CP_FENCE1_CNT_2                                   0xDE2374
0457 
0458 #define mmNIC4_QM1_CP_FENCE1_CNT_3                                   0xDE2378
0459 
0460 #define mmNIC4_QM1_CP_FENCE1_CNT_4                                   0xDE237C
0461 
0462 #define mmNIC4_QM1_CP_FENCE2_CNT_0                                   0xDE2380
0463 
0464 #define mmNIC4_QM1_CP_FENCE2_CNT_1                                   0xDE2384
0465 
0466 #define mmNIC4_QM1_CP_FENCE2_CNT_2                                   0xDE2388
0467 
0468 #define mmNIC4_QM1_CP_FENCE2_CNT_3                                   0xDE238C
0469 
0470 #define mmNIC4_QM1_CP_FENCE2_CNT_4                                   0xDE2390
0471 
0472 #define mmNIC4_QM1_CP_FENCE3_CNT_0                                   0xDE2394
0473 
0474 #define mmNIC4_QM1_CP_FENCE3_CNT_1                                   0xDE2398
0475 
0476 #define mmNIC4_QM1_CP_FENCE3_CNT_2                                   0xDE239C
0477 
0478 #define mmNIC4_QM1_CP_FENCE3_CNT_3                                   0xDE23A0
0479 
0480 #define mmNIC4_QM1_CP_FENCE3_CNT_4                                   0xDE23A4
0481 
0482 #define mmNIC4_QM1_CP_STS_0                                          0xDE23A8
0483 
0484 #define mmNIC4_QM1_CP_STS_1                                          0xDE23AC
0485 
0486 #define mmNIC4_QM1_CP_STS_2                                          0xDE23B0
0487 
0488 #define mmNIC4_QM1_CP_STS_3                                          0xDE23B4
0489 
0490 #define mmNIC4_QM1_CP_STS_4                                          0xDE23B8
0491 
0492 #define mmNIC4_QM1_CP_CURRENT_INST_LO_0                              0xDE23BC
0493 
0494 #define mmNIC4_QM1_CP_CURRENT_INST_LO_1                              0xDE23C0
0495 
0496 #define mmNIC4_QM1_CP_CURRENT_INST_LO_2                              0xDE23C4
0497 
0498 #define mmNIC4_QM1_CP_CURRENT_INST_LO_3                              0xDE23C8
0499 
0500 #define mmNIC4_QM1_CP_CURRENT_INST_LO_4                              0xDE23CC
0501 
0502 #define mmNIC4_QM1_CP_CURRENT_INST_HI_0                              0xDE23D0
0503 
0504 #define mmNIC4_QM1_CP_CURRENT_INST_HI_1                              0xDE23D4
0505 
0506 #define mmNIC4_QM1_CP_CURRENT_INST_HI_2                              0xDE23D8
0507 
0508 #define mmNIC4_QM1_CP_CURRENT_INST_HI_3                              0xDE23DC
0509 
0510 #define mmNIC4_QM1_CP_CURRENT_INST_HI_4                              0xDE23E0
0511 
0512 #define mmNIC4_QM1_CP_BARRIER_CFG_0                                  0xDE23F4
0513 
0514 #define mmNIC4_QM1_CP_BARRIER_CFG_1                                  0xDE23F8
0515 
0516 #define mmNIC4_QM1_CP_BARRIER_CFG_2                                  0xDE23FC
0517 
0518 #define mmNIC4_QM1_CP_BARRIER_CFG_3                                  0xDE2400
0519 
0520 #define mmNIC4_QM1_CP_BARRIER_CFG_4                                  0xDE2404
0521 
0522 #define mmNIC4_QM1_CP_DBG_0_0                                        0xDE2408
0523 
0524 #define mmNIC4_QM1_CP_DBG_0_1                                        0xDE240C
0525 
0526 #define mmNIC4_QM1_CP_DBG_0_2                                        0xDE2410
0527 
0528 #define mmNIC4_QM1_CP_DBG_0_3                                        0xDE2414
0529 
0530 #define mmNIC4_QM1_CP_DBG_0_4                                        0xDE2418
0531 
0532 #define mmNIC4_QM1_CP_ARUSER_31_11_0                                 0xDE241C
0533 
0534 #define mmNIC4_QM1_CP_ARUSER_31_11_1                                 0xDE2420
0535 
0536 #define mmNIC4_QM1_CP_ARUSER_31_11_2                                 0xDE2424
0537 
0538 #define mmNIC4_QM1_CP_ARUSER_31_11_3                                 0xDE2428
0539 
0540 #define mmNIC4_QM1_CP_ARUSER_31_11_4                                 0xDE242C
0541 
0542 #define mmNIC4_QM1_CP_AWUSER_31_11_0                                 0xDE2430
0543 
0544 #define mmNIC4_QM1_CP_AWUSER_31_11_1                                 0xDE2434
0545 
0546 #define mmNIC4_QM1_CP_AWUSER_31_11_2                                 0xDE2438
0547 
0548 #define mmNIC4_QM1_CP_AWUSER_31_11_3                                 0xDE243C
0549 
0550 #define mmNIC4_QM1_CP_AWUSER_31_11_4                                 0xDE2440
0551 
0552 #define mmNIC4_QM1_ARB_CFG_0                                         0xDE2A00
0553 
0554 #define mmNIC4_QM1_ARB_CHOISE_Q_PUSH                                 0xDE2A04
0555 
0556 #define mmNIC4_QM1_ARB_WRR_WEIGHT_0                                  0xDE2A08
0557 
0558 #define mmNIC4_QM1_ARB_WRR_WEIGHT_1                                  0xDE2A0C
0559 
0560 #define mmNIC4_QM1_ARB_WRR_WEIGHT_2                                  0xDE2A10
0561 
0562 #define mmNIC4_QM1_ARB_WRR_WEIGHT_3                                  0xDE2A14
0563 
0564 #define mmNIC4_QM1_ARB_CFG_1                                         0xDE2A18
0565 
0566 #define mmNIC4_QM1_ARB_MST_AVAIL_CRED_0                              0xDE2A20
0567 
0568 #define mmNIC4_QM1_ARB_MST_AVAIL_CRED_1                              0xDE2A24
0569 
0570 #define mmNIC4_QM1_ARB_MST_AVAIL_CRED_2                              0xDE2A28
0571 
0572 #define mmNIC4_QM1_ARB_MST_AVAIL_CRED_3                              0xDE2A2C
0573 
0574 #define mmNIC4_QM1_ARB_MST_AVAIL_CRED_4                              0xDE2A30
0575 
0576 #define mmNIC4_QM1_ARB_MST_AVAIL_CRED_5                              0xDE2A34
0577 
0578 #define mmNIC4_QM1_ARB_MST_AVAIL_CRED_6                              0xDE2A38
0579 
0580 #define mmNIC4_QM1_ARB_MST_AVAIL_CRED_7                              0xDE2A3C
0581 
0582 #define mmNIC4_QM1_ARB_MST_AVAIL_CRED_8                              0xDE2A40
0583 
0584 #define mmNIC4_QM1_ARB_MST_AVAIL_CRED_9                              0xDE2A44
0585 
0586 #define mmNIC4_QM1_ARB_MST_AVAIL_CRED_10                             0xDE2A48
0587 
0588 #define mmNIC4_QM1_ARB_MST_AVAIL_CRED_11                             0xDE2A4C
0589 
0590 #define mmNIC4_QM1_ARB_MST_AVAIL_CRED_12                             0xDE2A50
0591 
0592 #define mmNIC4_QM1_ARB_MST_AVAIL_CRED_13                             0xDE2A54
0593 
0594 #define mmNIC4_QM1_ARB_MST_AVAIL_CRED_14                             0xDE2A58
0595 
0596 #define mmNIC4_QM1_ARB_MST_AVAIL_CRED_15                             0xDE2A5C
0597 
0598 #define mmNIC4_QM1_ARB_MST_AVAIL_CRED_16                             0xDE2A60
0599 
0600 #define mmNIC4_QM1_ARB_MST_AVAIL_CRED_17                             0xDE2A64
0601 
0602 #define mmNIC4_QM1_ARB_MST_AVAIL_CRED_18                             0xDE2A68
0603 
0604 #define mmNIC4_QM1_ARB_MST_AVAIL_CRED_19                             0xDE2A6C
0605 
0606 #define mmNIC4_QM1_ARB_MST_AVAIL_CRED_20                             0xDE2A70
0607 
0608 #define mmNIC4_QM1_ARB_MST_AVAIL_CRED_21                             0xDE2A74
0609 
0610 #define mmNIC4_QM1_ARB_MST_AVAIL_CRED_22                             0xDE2A78
0611 
0612 #define mmNIC4_QM1_ARB_MST_AVAIL_CRED_23                             0xDE2A7C
0613 
0614 #define mmNIC4_QM1_ARB_MST_AVAIL_CRED_24                             0xDE2A80
0615 
0616 #define mmNIC4_QM1_ARB_MST_AVAIL_CRED_25                             0xDE2A84
0617 
0618 #define mmNIC4_QM1_ARB_MST_AVAIL_CRED_26                             0xDE2A88
0619 
0620 #define mmNIC4_QM1_ARB_MST_AVAIL_CRED_27                             0xDE2A8C
0621 
0622 #define mmNIC4_QM1_ARB_MST_AVAIL_CRED_28                             0xDE2A90
0623 
0624 #define mmNIC4_QM1_ARB_MST_AVAIL_CRED_29                             0xDE2A94
0625 
0626 #define mmNIC4_QM1_ARB_MST_AVAIL_CRED_30                             0xDE2A98
0627 
0628 #define mmNIC4_QM1_ARB_MST_AVAIL_CRED_31                             0xDE2A9C
0629 
0630 #define mmNIC4_QM1_ARB_MST_CRED_INC                                  0xDE2AA0
0631 
0632 #define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_0                        0xDE2AA4
0633 
0634 #define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_1                        0xDE2AA8
0635 
0636 #define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_2                        0xDE2AAC
0637 
0638 #define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_3                        0xDE2AB0
0639 
0640 #define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_4                        0xDE2AB4
0641 
0642 #define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_5                        0xDE2AB8
0643 
0644 #define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_6                        0xDE2ABC
0645 
0646 #define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_7                        0xDE2AC0
0647 
0648 #define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_8                        0xDE2AC4
0649 
0650 #define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_9                        0xDE2AC8
0651 
0652 #define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_10                       0xDE2ACC
0653 
0654 #define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_11                       0xDE2AD0
0655 
0656 #define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_12                       0xDE2AD4
0657 
0658 #define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_13                       0xDE2AD8
0659 
0660 #define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_14                       0xDE2ADC
0661 
0662 #define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_15                       0xDE2AE0
0663 
0664 #define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_16                       0xDE2AE4
0665 
0666 #define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_17                       0xDE2AE8
0667 
0668 #define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_18                       0xDE2AEC
0669 
0670 #define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_19                       0xDE2AF0
0671 
0672 #define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_20                       0xDE2AF4
0673 
0674 #define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_21                       0xDE2AF8
0675 
0676 #define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_22                       0xDE2AFC
0677 
0678 #define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_23                       0xDE2B00
0679 
0680 #define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_24                       0xDE2B04
0681 
0682 #define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_25                       0xDE2B08
0683 
0684 #define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_26                       0xDE2B0C
0685 
0686 #define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_27                       0xDE2B10
0687 
0688 #define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_28                       0xDE2B14
0689 
0690 #define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_29                       0xDE2B18
0691 
0692 #define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_30                       0xDE2B1C
0693 
0694 #define mmNIC4_QM1_ARB_MST_CHOISE_PUSH_OFST_31                       0xDE2B20
0695 
0696 #define mmNIC4_QM1_ARB_SLV_MASTER_INC_CRED_OFST                      0xDE2B28
0697 
0698 #define mmNIC4_QM1_ARB_MST_SLAVE_EN                                  0xDE2B2C
0699 
0700 #define mmNIC4_QM1_ARB_MST_QUIET_PER                                 0xDE2B34
0701 
0702 #define mmNIC4_QM1_ARB_SLV_CHOISE_WDT                                0xDE2B38
0703 
0704 #define mmNIC4_QM1_ARB_SLV_ID                                        0xDE2B3C
0705 
0706 #define mmNIC4_QM1_ARB_MSG_MAX_INFLIGHT                              0xDE2B44
0707 
0708 #define mmNIC4_QM1_ARB_MSG_AWUSER_31_11                              0xDE2B48
0709 
0710 #define mmNIC4_QM1_ARB_MSG_AWUSER_SEC_PROP                           0xDE2B4C
0711 
0712 #define mmNIC4_QM1_ARB_MSG_AWUSER_NON_SEC_PROP                       0xDE2B50
0713 
0714 #define mmNIC4_QM1_ARB_BASE_LO                                       0xDE2B54
0715 
0716 #define mmNIC4_QM1_ARB_BASE_HI                                       0xDE2B58
0717 
0718 #define mmNIC4_QM1_ARB_STATE_STS                                     0xDE2B80
0719 
0720 #define mmNIC4_QM1_ARB_CHOISE_FULLNESS_STS                           0xDE2B84
0721 
0722 #define mmNIC4_QM1_ARB_MSG_STS                                       0xDE2B88
0723 
0724 #define mmNIC4_QM1_ARB_SLV_CHOISE_Q_HEAD                             0xDE2B8C
0725 
0726 #define mmNIC4_QM1_ARB_ERR_CAUSE                                     0xDE2B9C
0727 
0728 #define mmNIC4_QM1_ARB_ERR_MSG_EN                                    0xDE2BA0
0729 
0730 #define mmNIC4_QM1_ARB_ERR_STS_DRP                                   0xDE2BA8
0731 
0732 #define mmNIC4_QM1_ARB_MST_CRED_STS_0                                0xDE2BB0
0733 
0734 #define mmNIC4_QM1_ARB_MST_CRED_STS_1                                0xDE2BB4
0735 
0736 #define mmNIC4_QM1_ARB_MST_CRED_STS_2                                0xDE2BB8
0737 
0738 #define mmNIC4_QM1_ARB_MST_CRED_STS_3                                0xDE2BBC
0739 
0740 #define mmNIC4_QM1_ARB_MST_CRED_STS_4                                0xDE2BC0
0741 
0742 #define mmNIC4_QM1_ARB_MST_CRED_STS_5                                0xDE2BC4
0743 
0744 #define mmNIC4_QM1_ARB_MST_CRED_STS_6                                0xDE2BC8
0745 
0746 #define mmNIC4_QM1_ARB_MST_CRED_STS_7                                0xDE2BCC
0747 
0748 #define mmNIC4_QM1_ARB_MST_CRED_STS_8                                0xDE2BD0
0749 
0750 #define mmNIC4_QM1_ARB_MST_CRED_STS_9                                0xDE2BD4
0751 
0752 #define mmNIC4_QM1_ARB_MST_CRED_STS_10                               0xDE2BD8
0753 
0754 #define mmNIC4_QM1_ARB_MST_CRED_STS_11                               0xDE2BDC
0755 
0756 #define mmNIC4_QM1_ARB_MST_CRED_STS_12                               0xDE2BE0
0757 
0758 #define mmNIC4_QM1_ARB_MST_CRED_STS_13                               0xDE2BE4
0759 
0760 #define mmNIC4_QM1_ARB_MST_CRED_STS_14                               0xDE2BE8
0761 
0762 #define mmNIC4_QM1_ARB_MST_CRED_STS_15                               0xDE2BEC
0763 
0764 #define mmNIC4_QM1_ARB_MST_CRED_STS_16                               0xDE2BF0
0765 
0766 #define mmNIC4_QM1_ARB_MST_CRED_STS_17                               0xDE2BF4
0767 
0768 #define mmNIC4_QM1_ARB_MST_CRED_STS_18                               0xDE2BF8
0769 
0770 #define mmNIC4_QM1_ARB_MST_CRED_STS_19                               0xDE2BFC
0771 
0772 #define mmNIC4_QM1_ARB_MST_CRED_STS_20                               0xDE2C00
0773 
0774 #define mmNIC4_QM1_ARB_MST_CRED_STS_21                               0xDE2C04
0775 
0776 #define mmNIC4_QM1_ARB_MST_CRED_STS_22                               0xDE2C08
0777 
0778 #define mmNIC4_QM1_ARB_MST_CRED_STS_23                               0xDE2C0C
0779 
0780 #define mmNIC4_QM1_ARB_MST_CRED_STS_24                               0xDE2C10
0781 
0782 #define mmNIC4_QM1_ARB_MST_CRED_STS_25                               0xDE2C14
0783 
0784 #define mmNIC4_QM1_ARB_MST_CRED_STS_26                               0xDE2C18
0785 
0786 #define mmNIC4_QM1_ARB_MST_CRED_STS_27                               0xDE2C1C
0787 
0788 #define mmNIC4_QM1_ARB_MST_CRED_STS_28                               0xDE2C20
0789 
0790 #define mmNIC4_QM1_ARB_MST_CRED_STS_29                               0xDE2C24
0791 
0792 #define mmNIC4_QM1_ARB_MST_CRED_STS_30                               0xDE2C28
0793 
0794 #define mmNIC4_QM1_ARB_MST_CRED_STS_31                               0xDE2C2C
0795 
0796 #define mmNIC4_QM1_CGM_CFG                                           0xDE2C70
0797 
0798 #define mmNIC4_QM1_CGM_STS                                           0xDE2C74
0799 
0800 #define mmNIC4_QM1_CGM_CFG1                                          0xDE2C78
0801 
0802 #define mmNIC4_QM1_LOCAL_RANGE_BASE                                  0xDE2C80
0803 
0804 #define mmNIC4_QM1_LOCAL_RANGE_SIZE                                  0xDE2C84
0805 
0806 #define mmNIC4_QM1_CSMR_STRICT_PRIO_CFG                              0xDE2C90
0807 
0808 #define mmNIC4_QM1_HBW_RD_RATE_LIM_CFG_1                             0xDE2C94
0809 
0810 #define mmNIC4_QM1_LBW_WR_RATE_LIM_CFG_0                             0xDE2C98
0811 
0812 #define mmNIC4_QM1_LBW_WR_RATE_LIM_CFG_1                             0xDE2C9C
0813 
0814 #define mmNIC4_QM1_HBW_RD_RATE_LIM_CFG_0                             0xDE2CA0
0815 
0816 #define mmNIC4_QM1_GLBL_AXCACHE                                      0xDE2CA4
0817 
0818 #define mmNIC4_QM1_IND_GW_APB_CFG                                    0xDE2CB0
0819 
0820 #define mmNIC4_QM1_IND_GW_APB_WDATA                                  0xDE2CB4
0821 
0822 #define mmNIC4_QM1_IND_GW_APB_RDATA                                  0xDE2CB8
0823 
0824 #define mmNIC4_QM1_IND_GW_APB_STATUS                                 0xDE2CBC
0825 
0826 #define mmNIC4_QM1_GLBL_ERR_ADDR_LO                                  0xDE2CD0
0827 
0828 #define mmNIC4_QM1_GLBL_ERR_ADDR_HI                                  0xDE2CD4
0829 
0830 #define mmNIC4_QM1_GLBL_ERR_WDATA                                    0xDE2CD8
0831 
0832 #define mmNIC4_QM1_GLBL_MEM_INIT_BUSY                                0xDE2D00
0833 
0834 #endif /* ASIC_REG_NIC4_QM1_REGS_H_ */