drivers/misc/gehc-achc.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * datasheet: https://www.nxp.com/docs/en/data-sheet/K20P144M120SF3.pdf
0004  *
0005  * Copyright (C) 2018-2021 Collabora
0006  * Copyright (C) 2018-2021 GE Healthcare
0007  */
0008
0009 #include <linux/delay.h>
0010 #include <linux/firmware.h>
0011 #include <linux/gpio/consumer.h>
0012 #include <linux/kernel.h>
0013 #include <linux/module.h>
0014 #include <linux/of.h>
0015 #include <linux/spi/spi.h>
0016
0017 #define ACHC_MAX_FREQ_HZ 300000
0018 #define ACHC_FAST_READ_FREQ_HZ 1000000
0019
0020 struct achc_data {
0021     struct spi_device *main;
0022     struct spi_device *ezport;
0023     struct gpio_desc *reset;
0024
0025     struct mutex device_lock; /* avoid concurrent device access */
0026 };
0027
0028 #define EZPORT_RESET_DELAY_MS   100
0029 #define EZPORT_STARTUP_DELAY_MS 200
0030 #define EZPORT_WRITE_WAIT_MS    10
0031 #define EZPORT_TRANSFER_SIZE    2048
0032
0033 #define EZPORT_CMD_SP       0x02 /* flash section program */
0034 #define EZPORT_CMD_RDSR     0x05 /* read status register */
0035 #define EZPORT_CMD_WREN     0x06 /* write enable */
0036 #define EZPORT_CMD_FAST_READ    0x0b /* flash read data at high speed */
0037 #define EZPORT_CMD_RESET    0xb9 /* reset chip */
0038 #define EZPORT_CMD_BE       0xc7 /* bulk erase */
0039 #define EZPORT_CMD_SE       0xd8 /* sector erase */
0040
0041 #define EZPORT_SECTOR_SIZE  4096
0042 #define EZPORT_SECTOR_MASK  (EZPORT_SECTOR_SIZE - 1)
0043
0044 #define EZPORT_STATUS_WIP   BIT(0) /* write in progress */
0045 #define EZPORT_STATUS_WEN   BIT(1) /* write enable */
0046 #define EZPORT_STATUS_BEDIS BIT(2) /* bulk erase disable */
0047 #define EZPORT_STATUS_FLEXRAM   BIT(3) /* FlexRAM mode */
0048 #define EZPORT_STATUS_WEF   BIT(6) /* write error flag */
0049 #define EZPORT_STATUS_FS    BIT(7) /* flash security */
0050
0051 static void ezport_reset(struct gpio_desc *reset)
0052 {
0053     gpiod_set_value(reset, 1);
0054     msleep(EZPORT_RESET_DELAY_MS);
0055     gpiod_set_value(reset, 0);
0056     msleep(EZPORT_STARTUP_DELAY_MS);
0057 }
0058
0059 static int ezport_start_programming(struct spi_device *spi, struct gpio_desc *reset)
0060 {
0061     struct spi_message msg;
0062     struct spi_transfer assert_cs = {
0063         .cs_change   = 1,
0064     };
0065     struct spi_transfer release_cs = { };
0066     int ret;
0067
0068     spi_bus_lock(spi->master);
0069
0070     /* assert chip select */
0071     spi_message_init(&msg);
0072     spi_message_add_tail(&assert_cs, &msg);
0073     ret = spi_sync_locked(spi, &msg);
0074     if (ret)
0075         goto fail;
0076
0077     msleep(EZPORT_STARTUP_DELAY_MS);
0078
0079     /* reset with asserted chip select to switch into programming mode */
0080     ezport_reset(reset);
0081
0082     /* release chip select */
0083     spi_message_init(&msg);
0084     spi_message_add_tail(&release_cs, &msg);
0085     ret = spi_sync_locked(spi, &msg);
0086
0087 fail:
0088     spi_bus_unlock(spi->master);
0089     return ret;
0090 }
0091
0092 static void ezport_stop_programming(struct spi_device *spi, struct gpio_desc *reset)
0093 {
0094     /* reset without asserted chip select to return into normal mode */
0095     spi_bus_lock(spi->master);
0096     ezport_reset(reset);
0097     spi_bus_unlock(spi->master);
0098 }
0099
0100 static int ezport_get_status_register(struct spi_device *spi)
0101 {
0102     int ret;
0103
0104     ret = spi_w8r8(spi, EZPORT_CMD_RDSR);
0105     if (ret < 0)
0106         return ret;
0107     if (ret == 0xff) {
0108         dev_err(&spi->dev, "Invalid EzPort status, EzPort is not functional!\n");
0109         return -EINVAL;
0110     }
0111
0112     return ret;
0113 }
0114
0115 static int ezport_soft_reset(struct spi_device *spi)
0116 {
0117     u8 cmd = EZPORT_CMD_RESET;
0118     int ret;
0119
0120     ret = spi_write(spi, &cmd, 1);
0121     if (ret < 0)
0122         return ret;
0123
0124     msleep(EZPORT_STARTUP_DELAY_MS);
0125
0126     return 0;
0127 }
0128
0129 static int ezport_send_simple(struct spi_device *spi, u8 cmd)
0130 {
0131     int ret;
0132
0133     ret = spi_write(spi, &cmd, 1);
0134     if (ret < 0)
0135         return ret;
0136
0137     return ezport_get_status_register(spi);
0138 }
0139
0140 static int ezport_wait_write(struct spi_device *spi, u32 retries)
0141 {
0142     int ret;
0143     u32 i;
0144
0145     for (i = 0; i < retries; i++) {
0146         ret = ezport_get_status_register(spi);
0147         if (ret >= 0 && !(ret & EZPORT_STATUS_WIP))
0148             break;
0149         msleep(EZPORT_WRITE_WAIT_MS);
0150     }
0151
0152     return ret;
0153 }
0154
0155 static int ezport_write_enable(struct spi_device *spi)
0156 {
0157     int ret = 0, retries = 3;
0158
0159     for (retries = 0; retries < 3; retries++) {
0160         ret = ezport_send_simple(spi, EZPORT_CMD_WREN);
0161         if (ret > 0 && ret & EZPORT_STATUS_WEN)
0162             break;
0163     }
0164
0165     if (!(ret & EZPORT_STATUS_WEN)) {
0166         dev_err(&spi->dev, "EzPort write enable timed out\n");
0167         return -ETIMEDOUT;
0168     }
0169     return 0;
0170 }
0171
0172 static int ezport_bulk_erase(struct spi_device *spi)
0173 {
0174     int ret;
0175     static const u8 cmd = EZPORT_CMD_BE;
0176
0177     dev_dbg(&spi->dev, "EzPort bulk erase...\n");
0178
0179     ret = ezport_write_enable(spi);
0180     if (ret < 0)
0181         return ret;
0182
0183     ret = spi_write(spi, &cmd, 1);
0184     if (ret < 0)
0185         return ret;
0186
0187     ret = ezport_wait_write(spi, 1000);
0188     if (ret < 0)
0189         return ret;
0190
0191     return 0;
0192 }
0193
0194 static int ezport_section_erase(struct spi_device *spi, u32 address)
0195 {
0196     u8 query[] = {EZPORT_CMD_SE, (address >> 16) & 0xff, (address >> 8) & 0xff, address & 0xff};
0197     int ret;
0198
0199     dev_dbg(&spi->dev, "Ezport section erase @ 0x%06x...\n", address);
0200
0201     if (address & EZPORT_SECTOR_MASK)
0202         return -EINVAL;
0203
0204     ret = ezport_write_enable(spi);
0205     if (ret < 0)
0206         return ret;
0207
0208     ret = spi_write(spi, query, sizeof(query));
0209     if (ret < 0)
0210         return ret;
0211
0212     return ezport_wait_write(spi, 200);
0213 }
0214
0215 static int ezport_flash_transfer(struct spi_device *spi, u32 address,
0216                  const u8 *payload, size_t payload_size)
0217 {
0218     struct spi_transfer xfers[2] = {};
0219     u8 *command;
0220     int ret;
0221
0222     dev_dbg(&spi->dev, "EzPort write %zu bytes @ 0x%06x...\n", payload_size, address);
0223
0224     ret = ezport_write_enable(spi);
0225     if (ret < 0)
0226         return ret;
0227
0228     command = kmalloc(4, GFP_KERNEL | GFP_DMA);
0229     if (!command)
0230         return -ENOMEM;
0231
0232     command[0] = EZPORT_CMD_SP;
0233     command[1] = address >> 16;
0234     command[2] = address >> 8;
0235     command[3] = address >> 0;
0236
0237     xfers[0].tx_buf = command;
0238     xfers[0].len = 4;
0239
0240     xfers[1].tx_buf = payload;
0241     xfers[1].len = payload_size;
0242
0243     ret = spi_sync_transfer(spi, xfers, 2);
0244     kfree(command);
0245     if (ret < 0)
0246         return ret;
0247
0248     return ezport_wait_write(spi, 40);
0249 }
0250
0251 static int ezport_flash_compare(struct spi_device *spi, u32 address,
0252                 const u8 *payload, size_t payload_size)
0253 {
0254     struct spi_transfer xfers[2] = {};
0255     u8 *buffer;
0256     int ret;
0257
0258     buffer = kmalloc(payload_size + 5, GFP_KERNEL | GFP_DMA);
0259     if (!buffer)
0260         return -ENOMEM;
0261
0262     buffer[0] = EZPORT_CMD_FAST_READ;
0263     buffer[1] = address >> 16;
0264     buffer[2] = address >> 8;
0265     buffer[3] = address >> 0;
0266
0267     xfers[0].tx_buf = buffer;
0268     xfers[0].len = 4;
0269     xfers[0].speed_hz = ACHC_FAST_READ_FREQ_HZ;
0270
0271     xfers[1].rx_buf = buffer + 4;
0272     xfers[1].len = payload_size + 1;
0273     xfers[1].speed_hz = ACHC_FAST_READ_FREQ_HZ;
0274
0275     ret = spi_sync_transfer(spi, xfers, 2);
0276     if (ret)
0277         goto err;
0278
0279     /* FAST_READ receives one dummy byte before the real data */
0280     ret = memcmp(payload, buffer + 4 + 1, payload_size);
0281     if (ret) {
0282         ret = -EBADMSG;
0283         dev_dbg(&spi->dev, "Verification failure @ %06x", address);
0284         print_hex_dump_bytes("fw:  ", DUMP_PREFIX_OFFSET, payload, payload_size);
0285         print_hex_dump_bytes("dev: ", DUMP_PREFIX_OFFSET, buffer + 4, payload_size);
0286     }
0287
0288 err:
0289     kfree(buffer);
0290     return ret;
0291 }
0292
0293 static int ezport_firmware_compare_data(struct spi_device *spi,
0294                     const u8 *data, size_t size)
0295 {
0296     int ret;
0297     size_t address = 0;
0298     size_t transfer_size;
0299
0300     dev_dbg(&spi->dev, "EzPort compare data with %zu bytes...\n", size);
0301
0302     ret = ezport_get_status_register(spi);
0303     if (ret < 0)
0304         return ret;
0305
0306     if (ret & EZPORT_STATUS_FS) {
0307         dev_info(&spi->dev, "Device is in secure mode (status=0x%02x)!\n", ret);
0308         dev_info(&spi->dev, "FW verification is not possible\n");
0309         return -EACCES;
0310     }
0311
0312     while (size - address > 0) {
0313         transfer_size = min((size_t) EZPORT_TRANSFER_SIZE, size - address);
0314
0315         ret = ezport_flash_compare(spi, address, data+address, transfer_size);
0316         if (ret)
0317             return ret;
0318
0319         address += transfer_size;
0320     }
0321
0322     return 0;
0323 }
0324
0325 static int ezport_firmware_flash_data(struct spi_device *spi,
0326                       const u8 *data, size_t size)
0327 {
0328     int ret;
0329     size_t address = 0;
0330     size_t transfer_size;
0331
0332     dev_dbg(&spi->dev, "EzPort flash data with %zu bytes...\n", size);
0333
0334     ret = ezport_get_status_register(spi);
0335     if (ret < 0)
0336         return ret;
0337
0338     if (ret & EZPORT_STATUS_FS) {
0339         ret = ezport_bulk_erase(spi);
0340         if (ret < 0)
0341             return ret;
0342         if (ret & EZPORT_STATUS_FS)
0343             return -EINVAL;
0344     }
0345
0346     while (size - address > 0) {
0347         if (!(address & EZPORT_SECTOR_MASK)) {
0348             ret = ezport_section_erase(spi, address);
0349             if (ret < 0)
0350                 return ret;
0351             if (ret & EZPORT_STATUS_WIP || ret & EZPORT_STATUS_WEF)
0352                 return -EIO;
0353         }
0354
0355         transfer_size = min((size_t) EZPORT_TRANSFER_SIZE, size - address);
0356
0357         ret = ezport_flash_transfer(spi, address,
0358                         data+address, transfer_size);
0359         if (ret < 0)
0360             return ret;
0361         else if (ret & EZPORT_STATUS_WIP)
0362             return -ETIMEDOUT;
0363         else if (ret & EZPORT_STATUS_WEF)
0364             return -EIO;
0365
0366         address += transfer_size;
0367     }
0368
0369     dev_dbg(&spi->dev, "EzPort verify flashed data...\n");
0370     ret = ezport_firmware_compare_data(spi, data, size);
0371
0372     /* allow missing FW verfication in secure mode */
0373     if (ret == -EACCES)
0374         ret = 0;
0375
0376     if (ret < 0)
0377         dev_err(&spi->dev, "Failed to verify flashed data: %d\n", ret);
0378
0379     ret = ezport_soft_reset(spi);
0380     if (ret < 0)
0381         dev_warn(&spi->dev, "EzPort reset failed!\n");
0382
0383     return ret;
0384 }
0385
0386 static int ezport_firmware_load(struct spi_device *spi, const char *fwname)
0387 {
0388     const struct firmware *fw;
0389     int ret;
0390
0391     ret = request_firmware(&fw, fwname, &spi->dev);
0392     if (ret) {
0393         dev_err(&spi->dev, "Could not get firmware: %d\n", ret);
0394         return ret;
0395     }
0396
0397     ret = ezport_firmware_flash_data(spi, fw->data, fw->size);
0398
0399     release_firmware(fw);
0400
0401     return ret;
0402 }
0403
0404 /**
0405  * ezport_flash - flash device firmware
0406  * @spi: SPI device for NXP EzPort interface
0407  * @reset: the gpio connected to the device reset pin
0408  * @fwname: filename of the firmware that should be flashed
0409  *
0410  * Context: can sleep
0411  *
0412  * Return: 0 on success; negative errno on failure
0413  */
0414 static int ezport_flash(struct spi_device *spi, struct gpio_desc *reset, const char *fwname)
0415 {
0416     int ret;
0417
0418     ret = ezport_start_programming(spi, reset);
0419     if (ret)
0420         return ret;
0421
0422     ret = ezport_firmware_load(spi, fwname);
0423
0424     ezport_stop_programming(spi, reset);
0425
0426     if (ret)
0427         dev_err(&spi->dev, "Failed to flash firmware: %d\n", ret);
0428     else
0429         dev_dbg(&spi->dev, "Finished FW flashing!\n");
0430
0431     return ret;
0432 }
0433
0434 static ssize_t update_firmware_store(struct device *dev, struct device_attribute *attr,
0435                      const char *buf, size_t count)
0436 {
0437     struct achc_data *achc = dev_get_drvdata(dev);
0438     unsigned long value;
0439     int ret;
0440
0441     ret = kstrtoul(buf, 0, &value);
0442     if (ret < 0 || value != 1)
0443         return -EINVAL;
0444
0445     mutex_lock(&achc->device_lock);
0446     ret = ezport_flash(achc->ezport, achc->reset, "achc.bin");
0447     mutex_unlock(&achc->device_lock);
0448
0449     if (ret < 0)
0450         return ret;
0451
0452     return count;
0453 }
0454 static DEVICE_ATTR_WO(update_firmware);
0455
0456 static ssize_t reset_show(struct device *dev, struct device_attribute *attr, char *buf)
0457 {
0458     struct achc_data *achc = dev_get_drvdata(dev);
0459     int ret;
0460
0461     mutex_lock(&achc->device_lock);
0462     ret = gpiod_get_value(achc->reset);
0463     mutex_unlock(&achc->device_lock);
0464
0465     if (ret < 0)
0466         return ret;
0467
0468     return sysfs_emit(buf, "%d\n", ret);
0469 }
0470
0471 static ssize_t reset_store(struct device *dev, struct device_attribute *attr,
0472                const char *buf, size_t count)
0473 {
0474     struct achc_data *achc = dev_get_drvdata(dev);
0475     unsigned long value;
0476     int ret;
0477
0478     ret = kstrtoul(buf, 0, &value);
0479     if (ret < 0 || value > 1)
0480         return -EINVAL;
0481
0482     mutex_lock(&achc->device_lock);
0483     gpiod_set_value(achc->reset, value);
0484     mutex_unlock(&achc->device_lock);
0485
0486     return count;
0487 }
0488 static DEVICE_ATTR_RW(reset);
0489
0490 static struct attribute *gehc_achc_attrs[] = {
0491     &dev_attr_update_firmware.attr,
0492     &dev_attr_reset.attr,
0493     NULL,
0494 };
0495 ATTRIBUTE_GROUPS(gehc_achc);
0496
0497 static void unregister_ezport(void *data)
0498 {
0499     struct spi_device *ezport = data;
0500
0501     spi_unregister_device(ezport);
0502 }
0503
0504 static int gehc_achc_probe(struct spi_device *spi)
0505 {
0506     struct achc_data *achc;
0507     int ezport_reg, ret;
0508
0509     spi->max_speed_hz = ACHC_MAX_FREQ_HZ;
0510     spi->bits_per_word = 8;
0511     spi->mode = SPI_MODE_0;
0512
0513     achc = devm_kzalloc(&spi->dev, sizeof(*achc), GFP_KERNEL);
0514     if (!achc)
0515         return -ENOMEM;
0516     spi_set_drvdata(spi, achc);
0517     achc->main = spi;
0518
0519     mutex_init(&achc->device_lock);
0520
0521     ret = of_property_read_u32_index(spi->dev.of_node, "reg", 1, &ezport_reg);
0522     if (ret)
0523         return dev_err_probe(&spi->dev, ret, "missing second reg entry!\n");
0524
0525     achc->ezport = spi_new_ancillary_device(spi, ezport_reg);
0526     if (IS_ERR(achc->ezport))
0527         return PTR_ERR(achc->ezport);
0528
0529     ret = devm_add_action_or_reset(&spi->dev, unregister_ezport, achc->ezport);
0530     if (ret)
0531         return ret;
0532
0533     achc->reset = devm_gpiod_get(&spi->dev, "reset", GPIOD_OUT_LOW);
0534     if (IS_ERR(achc->reset))
0535         return dev_err_probe(&spi->dev, PTR_ERR(achc->reset), "Could not get reset gpio\n");
0536
0537     return 0;
0538 }
0539
0540 static const struct spi_device_id gehc_achc_id[] = {
0541     { "ge,achc", 0 },
0542     { "achc", 0 },
0543     { }
0544 };
0545 MODULE_DEVICE_TABLE(spi, gehc_achc_id);
0546
0547 static const struct of_device_id gehc_achc_of_match[] = {
0548     { .compatible = "ge,achc" },
0549     { /* sentinel */ }
0550 };
0551 MODULE_DEVICE_TABLE(of, gehc_achc_of_match);
0552
0553 static struct spi_driver gehc_achc_spi_driver = {
0554     .driver = {
0555         .name   = "gehc-achc",
0556         .of_match_table = gehc_achc_of_match,
0557         .dev_groups = gehc_achc_groups,
0558     },
0559     .probe      = gehc_achc_probe,
0560     .id_table   = gehc_achc_id,
0561 };
0562 module_spi_driver(gehc_achc_spi_driver);
0563
0564 MODULE_DESCRIPTION("GEHC ACHC driver");
0565 MODULE_AUTHOR("Sebastian Reichel <sebastian.reichel@collabora.com>");
0566 MODULE_LICENSE("GPL");