misc/eeprom/eeprom_93xx46.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Driver for 93xx46 EEPROMs
0004  *
0005  * (C) 2011 DENX Software Engineering, Anatolij Gustschin <agust@denx.de>
0006  */
0007
0008 #include <linux/delay.h>
0009 #include <linux/device.h>
0010 #include <linux/gpio/consumer.h>
0011 #include <linux/kernel.h>
0012 #include <linux/log2.h>
0013 #include <linux/module.h>
0014 #include <linux/mutex.h>
0015 #include <linux/of.h>
0016 #include <linux/of_device.h>
0017 #include <linux/of_gpio.h>
0018 #include <linux/slab.h>
0019 #include <linux/spi/spi.h>
0020 #include <linux/nvmem-provider.h>
0021 #include <linux/eeprom_93xx46.h>
0022
0023 #define OP_START    0x4
0024 #define OP_WRITE    (OP_START | 0x1)
0025 #define OP_READ     (OP_START | 0x2)
0026 #define ADDR_EWDS   0x00
0027 #define ADDR_ERAL   0x20
0028 #define ADDR_EWEN   0x30
0029
0030 struct eeprom_93xx46_devtype_data {
0031     unsigned int quirks;
0032     unsigned char flags;
0033 };
0034
0035 static const struct eeprom_93xx46_devtype_data at93c46_data = {
0036     .flags = EE_SIZE1K,
0037 };
0038
0039 static const struct eeprom_93xx46_devtype_data at93c56_data = {
0040     .flags = EE_SIZE2K,
0041 };
0042
0043 static const struct eeprom_93xx46_devtype_data at93c66_data = {
0044     .flags = EE_SIZE4K,
0045 };
0046
0047 static const struct eeprom_93xx46_devtype_data atmel_at93c46d_data = {
0048     .flags = EE_SIZE1K,
0049     .quirks = EEPROM_93XX46_QUIRK_SINGLE_WORD_READ |
0050           EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH,
0051 };
0052
0053 static const struct eeprom_93xx46_devtype_data microchip_93lc46b_data = {
0054     .flags = EE_SIZE1K,
0055     .quirks = EEPROM_93XX46_QUIRK_EXTRA_READ_CYCLE,
0056 };
0057
0058 struct eeprom_93xx46_dev {
0059     struct spi_device *spi;
0060     struct eeprom_93xx46_platform_data *pdata;
0061     struct mutex lock;
0062     struct nvmem_config nvmem_config;
0063     struct nvmem_device *nvmem;
0064     int addrlen;
0065     int size;
0066 };
0067
0068 static inline bool has_quirk_single_word_read(struct eeprom_93xx46_dev *edev)
0069 {
0070     return edev->pdata->quirks & EEPROM_93XX46_QUIRK_SINGLE_WORD_READ;
0071 }
0072
0073 static inline bool has_quirk_instruction_length(struct eeprom_93xx46_dev *edev)
0074 {
0075     return edev->pdata->quirks & EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH;
0076 }
0077
0078 static inline bool has_quirk_extra_read_cycle(struct eeprom_93xx46_dev *edev)
0079 {
0080     return edev->pdata->quirks & EEPROM_93XX46_QUIRK_EXTRA_READ_CYCLE;
0081 }
0082
0083 static int eeprom_93xx46_read(void *priv, unsigned int off,
0084                   void *val, size_t count)
0085 {
0086     struct eeprom_93xx46_dev *edev = priv;
0087     char *buf = val;
0088     int err = 0;
0089     int bits;
0090
0091     if (unlikely(off >= edev->size))
0092         return 0;
0093     if ((off + count) > edev->size)
0094         count = edev->size - off;
0095     if (unlikely(!count))
0096         return count;
0097
0098     mutex_lock(&edev->lock);
0099
0100     if (edev->pdata->prepare)
0101         edev->pdata->prepare(edev);
0102
0103     /* The opcode in front of the address is three bits. */
0104     bits = edev->addrlen + 3;
0105
0106     while (count) {
0107         struct spi_message m;
0108         struct spi_transfer t[2] = { { 0 } };
0109         u16 cmd_addr = OP_READ << edev->addrlen;
0110         size_t nbytes = count;
0111
0112         if (edev->pdata->flags & EE_ADDR8) {
0113             cmd_addr |= off;
0114             if (has_quirk_single_word_read(edev))
0115                 nbytes = 1;
0116         } else {
0117             cmd_addr |= (off >> 1);
0118             if (has_quirk_single_word_read(edev))
0119                 nbytes = 2;
0120         }
0121
0122         dev_dbg(&edev->spi->dev, "read cmd 0x%x, %d Hz\n",
0123             cmd_addr, edev->spi->max_speed_hz);
0124
0125         if (has_quirk_extra_read_cycle(edev)) {
0126             cmd_addr <<= 1;
0127             bits += 1;
0128         }
0129
0130         spi_message_init(&m);
0131
0132         t[0].tx_buf = (char *)&cmd_addr;
0133         t[0].len = 2;
0134         t[0].bits_per_word = bits;
0135         spi_message_add_tail(&t[0], &m);
0136
0137         t[1].rx_buf = buf;
0138         t[1].len = count;
0139         t[1].bits_per_word = 8;
0140         spi_message_add_tail(&t[1], &m);
0141
0142         err = spi_sync(edev->spi, &m);
0143         /* have to wait at least Tcsl ns */
0144         ndelay(250);
0145
0146         if (err) {
0147             dev_err(&edev->spi->dev, "read %zu bytes at %d: err. %d\n",
0148                 nbytes, (int)off, err);
0149             break;
0150         }
0151
0152         buf += nbytes;
0153         off += nbytes;
0154         count -= nbytes;
0155     }
0156
0157     if (edev->pdata->finish)
0158         edev->pdata->finish(edev);
0159
0160     mutex_unlock(&edev->lock);
0161
0162     return err;
0163 }
0164
0165 static int eeprom_93xx46_ew(struct eeprom_93xx46_dev *edev, int is_on)
0166 {
0167     struct spi_message m;
0168     struct spi_transfer t;
0169     int bits, ret;
0170     u16 cmd_addr;
0171
0172     /* The opcode in front of the address is three bits. */
0173     bits = edev->addrlen + 3;
0174
0175     cmd_addr = OP_START << edev->addrlen;
0176     if (edev->pdata->flags & EE_ADDR8)
0177         cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS) << 1;
0178     else
0179         cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS);
0180
0181     if (has_quirk_instruction_length(edev)) {
0182         cmd_addr <<= 2;
0183         bits += 2;
0184     }
0185
0186     dev_dbg(&edev->spi->dev, "ew%s cmd 0x%04x, %d bits\n",
0187             is_on ? "en" : "ds", cmd_addr, bits);
0188
0189     spi_message_init(&m);
0190     memset(&t, 0, sizeof(t));
0191
0192     t.tx_buf = &cmd_addr;
0193     t.len = 2;
0194     t.bits_per_word = bits;
0195     spi_message_add_tail(&t, &m);
0196
0197     mutex_lock(&edev->lock);
0198
0199     if (edev->pdata->prepare)
0200         edev->pdata->prepare(edev);
0201
0202     ret = spi_sync(edev->spi, &m);
0203     /* have to wait at least Tcsl ns */
0204     ndelay(250);
0205     if (ret)
0206         dev_err(&edev->spi->dev, "erase/write %sable error %d\n",
0207             is_on ? "en" : "dis", ret);
0208
0209     if (edev->pdata->finish)
0210         edev->pdata->finish(edev);
0211
0212     mutex_unlock(&edev->lock);
0213     return ret;
0214 }
0215
0216 static ssize_t
0217 eeprom_93xx46_write_word(struct eeprom_93xx46_dev *edev,
0218              const char *buf, unsigned off)
0219 {
0220     struct spi_message m;
0221     struct spi_transfer t[2];
0222     int bits, data_len, ret;
0223     u16 cmd_addr;
0224
0225     if (unlikely(off >= edev->size))
0226         return -EINVAL;
0227
0228     /* The opcode in front of the address is three bits. */
0229     bits = edev->addrlen + 3;
0230
0231     cmd_addr = OP_WRITE << edev->addrlen;
0232
0233     if (edev->pdata->flags & EE_ADDR8) {
0234         cmd_addr |= off;
0235         data_len = 1;
0236     } else {
0237         cmd_addr |= (off >> 1);
0238         data_len = 2;
0239     }
0240
0241     dev_dbg(&edev->spi->dev, "write cmd 0x%x\n", cmd_addr);
0242
0243     spi_message_init(&m);
0244     memset(t, 0, sizeof(t));
0245
0246     t[0].tx_buf = (char *)&cmd_addr;
0247     t[0].len = 2;
0248     t[0].bits_per_word = bits;
0249     spi_message_add_tail(&t[0], &m);
0250
0251     t[1].tx_buf = buf;
0252     t[1].len = data_len;
0253     t[1].bits_per_word = 8;
0254     spi_message_add_tail(&t[1], &m);
0255
0256     ret = spi_sync(edev->spi, &m);
0257     /* have to wait program cycle time Twc ms */
0258     mdelay(6);
0259     return ret;
0260 }
0261
0262 static int eeprom_93xx46_write(void *priv, unsigned int off,
0263                    void *val, size_t count)
0264 {
0265     struct eeprom_93xx46_dev *edev = priv;
0266     char *buf = val;
0267     int i, ret, step = 1;
0268
0269     if (unlikely(off >= edev->size))
0270         return -EFBIG;
0271     if ((off + count) > edev->size)
0272         count = edev->size - off;
0273     if (unlikely(!count))
0274         return count;
0275
0276     /* only write even number of bytes on 16-bit devices */
0277     if (edev->pdata->flags & EE_ADDR16) {
0278         step = 2;
0279         count &= ~1;
0280     }
0281
0282     /* erase/write enable */
0283     ret = eeprom_93xx46_ew(edev, 1);
0284     if (ret)
0285         return ret;
0286
0287     mutex_lock(&edev->lock);
0288
0289     if (edev->pdata->prepare)
0290         edev->pdata->prepare(edev);
0291
0292     for (i = 0; i < count; i += step) {
0293         ret = eeprom_93xx46_write_word(edev, &buf[i], off + i);
0294         if (ret) {
0295             dev_err(&edev->spi->dev, "write failed at %d: %d\n",
0296                 (int)off + i, ret);
0297             break;
0298         }
0299     }
0300
0301     if (edev->pdata->finish)
0302         edev->pdata->finish(edev);
0303
0304     mutex_unlock(&edev->lock);
0305
0306     /* erase/write disable */
0307     eeprom_93xx46_ew(edev, 0);
0308     return ret;
0309 }
0310
0311 static int eeprom_93xx46_eral(struct eeprom_93xx46_dev *edev)
0312 {
0313     struct eeprom_93xx46_platform_data *pd = edev->pdata;
0314     struct spi_message m;
0315     struct spi_transfer t;
0316     int bits, ret;
0317     u16 cmd_addr;
0318
0319     /* The opcode in front of the address is three bits. */
0320     bits = edev->addrlen + 3;
0321
0322     cmd_addr = OP_START << edev->addrlen;
0323     if (edev->pdata->flags & EE_ADDR8)
0324         cmd_addr |= ADDR_ERAL << 1;
0325     else
0326         cmd_addr |= ADDR_ERAL;
0327
0328     if (has_quirk_instruction_length(edev)) {
0329         cmd_addr <<= 2;
0330         bits += 2;
0331     }
0332
0333     dev_dbg(&edev->spi->dev, "eral cmd 0x%04x, %d bits\n", cmd_addr, bits);
0334
0335     spi_message_init(&m);
0336     memset(&t, 0, sizeof(t));
0337
0338     t.tx_buf = &cmd_addr;
0339     t.len = 2;
0340     t.bits_per_word = bits;
0341     spi_message_add_tail(&t, &m);
0342
0343     mutex_lock(&edev->lock);
0344
0345     if (edev->pdata->prepare)
0346         edev->pdata->prepare(edev);
0347
0348     ret = spi_sync(edev->spi, &m);
0349     if (ret)
0350         dev_err(&edev->spi->dev, "erase error %d\n", ret);
0351     /* have to wait erase cycle time Tec ms */
0352     mdelay(6);
0353
0354     if (pd->finish)
0355         pd->finish(edev);
0356
0357     mutex_unlock(&edev->lock);
0358     return ret;
0359 }
0360
0361 static ssize_t eeprom_93xx46_store_erase(struct device *dev,
0362                      struct device_attribute *attr,
0363                      const char *buf, size_t count)
0364 {
0365     struct eeprom_93xx46_dev *edev = dev_get_drvdata(dev);
0366     int erase = 0, ret;
0367
0368     sscanf(buf, "%d", &erase);
0369     if (erase) {
0370         ret = eeprom_93xx46_ew(edev, 1);
0371         if (ret)
0372             return ret;
0373         ret = eeprom_93xx46_eral(edev);
0374         if (ret)
0375             return ret;
0376         ret = eeprom_93xx46_ew(edev, 0);
0377         if (ret)
0378             return ret;
0379     }
0380     return count;
0381 }
0382 static DEVICE_ATTR(erase, S_IWUSR, NULL, eeprom_93xx46_store_erase);
0383
0384 static void select_assert(void *context)
0385 {
0386     struct eeprom_93xx46_dev *edev = context;
0387
0388     gpiod_set_value_cansleep(edev->pdata->select, 1);
0389 }
0390
0391 static void select_deassert(void *context)
0392 {
0393     struct eeprom_93xx46_dev *edev = context;
0394
0395     gpiod_set_value_cansleep(edev->pdata->select, 0);
0396 }
0397
0398 static const struct of_device_id eeprom_93xx46_of_table[] = {
0399     { .compatible = "eeprom-93xx46", .data = &at93c46_data, },
0400     { .compatible = "atmel,at93c46", .data = &at93c46_data, },
0401     { .compatible = "atmel,at93c46d", .data = &atmel_at93c46d_data, },
0402     { .compatible = "atmel,at93c56", .data = &at93c56_data, },
0403     { .compatible = "atmel,at93c66", .data = &at93c66_data, },
0404     { .compatible = "microchip,93lc46b", .data = &microchip_93lc46b_data, },
0405     {}
0406 };
0407 MODULE_DEVICE_TABLE(of, eeprom_93xx46_of_table);
0408
0409 static const struct spi_device_id eeprom_93xx46_spi_ids[] = {
0410     { .name = "eeprom-93xx46",
0411       .driver_data = (kernel_ulong_t)&at93c46_data, },
0412     { .name = "at93c46",
0413       .driver_data = (kernel_ulong_t)&at93c46_data, },
0414     { .name = "at93c46d",
0415       .driver_data = (kernel_ulong_t)&atmel_at93c46d_data, },
0416     { .name = "at93c56",
0417       .driver_data = (kernel_ulong_t)&at93c56_data, },
0418     { .name = "at93c66",
0419       .driver_data = (kernel_ulong_t)&at93c66_data, },
0420     { .name = "93lc46b",
0421       .driver_data = (kernel_ulong_t)&microchip_93lc46b_data, },
0422     {}
0423 };
0424 MODULE_DEVICE_TABLE(spi, eeprom_93xx46_spi_ids);
0425
0426 static int eeprom_93xx46_probe_dt(struct spi_device *spi)
0427 {
0428     const struct of_device_id *of_id =
0429         of_match_device(eeprom_93xx46_of_table, &spi->dev);
0430     struct device_node *np = spi->dev.of_node;
0431     struct eeprom_93xx46_platform_data *pd;
0432     u32 tmp;
0433     int ret;
0434
0435     pd = devm_kzalloc(&spi->dev, sizeof(*pd), GFP_KERNEL);
0436     if (!pd)
0437         return -ENOMEM;
0438
0439     ret = of_property_read_u32(np, "data-size", &tmp);
0440     if (ret < 0) {
0441         dev_err(&spi->dev, "data-size property not found\n");
0442         return ret;
0443     }
0444
0445     if (tmp == 8) {
0446         pd->flags |= EE_ADDR8;
0447     } else if (tmp == 16) {
0448         pd->flags |= EE_ADDR16;
0449     } else {
0450         dev_err(&spi->dev, "invalid data-size (%d)\n", tmp);
0451         return -EINVAL;
0452     }
0453
0454     if (of_property_read_bool(np, "read-only"))
0455         pd->flags |= EE_READONLY;
0456
0457     pd->select = devm_gpiod_get_optional(&spi->dev, "select",
0458                          GPIOD_OUT_LOW);
0459     if (IS_ERR(pd->select))
0460         return PTR_ERR(pd->select);
0461
0462     pd->prepare = select_assert;
0463     pd->finish = select_deassert;
0464     gpiod_direction_output(pd->select, 0);
0465
0466     if (of_id->data) {
0467         const struct eeprom_93xx46_devtype_data *data = of_id->data;
0468
0469         pd->quirks = data->quirks;
0470         pd->flags |= data->flags;
0471     }
0472
0473     spi->dev.platform_data = pd;
0474
0475     return 0;
0476 }
0477
0478 static int eeprom_93xx46_probe(struct spi_device *spi)
0479 {
0480     struct eeprom_93xx46_platform_data *pd;
0481     struct eeprom_93xx46_dev *edev;
0482     int err;
0483
0484     if (spi->dev.of_node) {
0485         err = eeprom_93xx46_probe_dt(spi);
0486         if (err < 0)
0487             return err;
0488     }
0489
0490     pd = spi->dev.platform_data;
0491     if (!pd) {
0492         dev_err(&spi->dev, "missing platform data\n");
0493         return -ENODEV;
0494     }
0495
0496     edev = devm_kzalloc(&spi->dev, sizeof(*edev), GFP_KERNEL);
0497     if (!edev)
0498         return -ENOMEM;
0499
0500     if (pd->flags & EE_SIZE1K)
0501         edev->size = 128;
0502     else if (pd->flags & EE_SIZE2K)
0503         edev->size = 256;
0504     else if (pd->flags & EE_SIZE4K)
0505         edev->size = 512;
0506     else {
0507         dev_err(&spi->dev, "unspecified size\n");
0508         return -EINVAL;
0509     }
0510
0511     if (pd->flags & EE_ADDR8)
0512         edev->addrlen = ilog2(edev->size);
0513     else if (pd->flags & EE_ADDR16)
0514         edev->addrlen = ilog2(edev->size) - 1;
0515     else {
0516         dev_err(&spi->dev, "unspecified address type\n");
0517         return -EINVAL;
0518     }
0519
0520     mutex_init(&edev->lock);
0521
0522     edev->spi = spi;
0523     edev->pdata = pd;
0524
0525     edev->nvmem_config.type = NVMEM_TYPE_EEPROM;
0526     edev->nvmem_config.name = dev_name(&spi->dev);
0527     edev->nvmem_config.dev = &spi->dev;
0528     edev->nvmem_config.read_only = pd->flags & EE_READONLY;
0529     edev->nvmem_config.root_only = true;
0530     edev->nvmem_config.owner = THIS_MODULE;
0531     edev->nvmem_config.compat = true;
0532     edev->nvmem_config.base_dev = &spi->dev;
0533     edev->nvmem_config.reg_read = eeprom_93xx46_read;
0534     edev->nvmem_config.reg_write = eeprom_93xx46_write;
0535     edev->nvmem_config.priv = edev;
0536     edev->nvmem_config.stride = 4;
0537     edev->nvmem_config.word_size = 1;
0538     edev->nvmem_config.size = edev->size;
0539
0540     edev->nvmem = devm_nvmem_register(&spi->dev, &edev->nvmem_config);
0541     if (IS_ERR(edev->nvmem))
0542         return PTR_ERR(edev->nvmem);
0543
0544     dev_info(&spi->dev, "%d-bit eeprom containing %d bytes %s\n",
0545         (pd->flags & EE_ADDR8) ? 8 : 16,
0546         edev->size,
0547         (pd->flags & EE_READONLY) ? "(readonly)" : "");
0548
0549     if (!(pd->flags & EE_READONLY)) {
0550         if (device_create_file(&spi->dev, &dev_attr_erase))
0551             dev_err(&spi->dev, "can't create erase interface\n");
0552     }
0553
0554     spi_set_drvdata(spi, edev);
0555     return 0;
0556 }
0557
0558 static void eeprom_93xx46_remove(struct spi_device *spi)
0559 {
0560     struct eeprom_93xx46_dev *edev = spi_get_drvdata(spi);
0561
0562     if (!(edev->pdata->flags & EE_READONLY))
0563         device_remove_file(&spi->dev, &dev_attr_erase);
0564 }
0565
0566 static struct spi_driver eeprom_93xx46_driver = {
0567     .driver = {
0568         .name   = "93xx46",
0569         .of_match_table = of_match_ptr(eeprom_93xx46_of_table),
0570     },
0571     .probe      = eeprom_93xx46_probe,
0572     .remove     = eeprom_93xx46_remove,
0573     .id_table   = eeprom_93xx46_spi_ids,
0574 };
0575
0576 module_spi_driver(eeprom_93xx46_driver);
0577
0578 MODULE_LICENSE("GPL");
0579 MODULE_DESCRIPTION("Driver for 93xx46 EEPROMs");
0580 MODULE_AUTHOR("Anatolij Gustschin <agust@denx.de>");
0581 MODULE_ALIAS("spi:93xx46");
0582 MODULE_ALIAS("spi:eeprom-93xx46");
0583 MODULE_ALIAS("spi:93lc46b");