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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * at24.c - handle most I2C EEPROMs
0004  *
0005  * Copyright (C) 2005-2007 David Brownell
0006  * Copyright (C) 2008 Wolfram Sang, Pengutronix
0007  */
0008 
0009 #include <linux/acpi.h>
0010 #include <linux/bitops.h>
0011 #include <linux/capability.h>
0012 #include <linux/delay.h>
0013 #include <linux/i2c.h>
0014 #include <linux/init.h>
0015 #include <linux/jiffies.h>
0016 #include <linux/kernel.h>
0017 #include <linux/mod_devicetable.h>
0018 #include <linux/module.h>
0019 #include <linux/mutex.h>
0020 #include <linux/nvmem-provider.h>
0021 #include <linux/of_device.h>
0022 #include <linux/pm_runtime.h>
0023 #include <linux/property.h>
0024 #include <linux/regmap.h>
0025 #include <linux/regulator/consumer.h>
0026 #include <linux/slab.h>
0027 
0028 /* Address pointer is 16 bit. */
0029 #define AT24_FLAG_ADDR16    BIT(7)
0030 /* sysfs-entry will be read-only. */
0031 #define AT24_FLAG_READONLY  BIT(6)
0032 /* sysfs-entry will be world-readable. */
0033 #define AT24_FLAG_IRUGO     BIT(5)
0034 /* Take always 8 addresses (24c00). */
0035 #define AT24_FLAG_TAKE8ADDR BIT(4)
0036 /* Factory-programmed serial number. */
0037 #define AT24_FLAG_SERIAL    BIT(3)
0038 /* Factory-programmed mac address. */
0039 #define AT24_FLAG_MAC       BIT(2)
0040 /* Does not auto-rollover reads to the next slave address. */
0041 #define AT24_FLAG_NO_RDROL  BIT(1)
0042 
0043 /*
0044  * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable.
0045  * Differences between different vendor product lines (like Atmel AT24C or
0046  * MicroChip 24LC, etc) won't much matter for typical read/write access.
0047  * There are also I2C RAM chips, likewise interchangeable. One example
0048  * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes).
0049  *
0050  * However, misconfiguration can lose data. "Set 16-bit memory address"
0051  * to a part with 8-bit addressing will overwrite data. Writing with too
0052  * big a page size also loses data. And it's not safe to assume that the
0053  * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC
0054  * uses 0x51, for just one example.
0055  *
0056  * Accordingly, explicit board-specific configuration data should be used
0057  * in almost all cases. (One partial exception is an SMBus used to access
0058  * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.)
0059  *
0060  * So this driver uses "new style" I2C driver binding, expecting to be
0061  * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or
0062  * similar kernel-resident tables; or, configuration data coming from
0063  * a bootloader.
0064  *
0065  * Other than binding model, current differences from "eeprom" driver are
0066  * that this one handles write access and isn't restricted to 24c02 devices.
0067  * It also handles larger devices (32 kbit and up) with two-byte addresses,
0068  * which won't work on pure SMBus systems.
0069  */
0070 
0071 struct at24_data {
0072     /*
0073      * Lock protects against activities from other Linux tasks,
0074      * but not from changes by other I2C masters.
0075      */
0076     struct mutex lock;
0077 
0078     unsigned int write_max;
0079     unsigned int num_addresses;
0080     unsigned int offset_adj;
0081 
0082     u32 byte_len;
0083     u16 page_size;
0084     u8 flags;
0085 
0086     struct nvmem_device *nvmem;
0087     struct regulator *vcc_reg;
0088     void (*read_post)(unsigned int off, char *buf, size_t count);
0089 
0090     /*
0091      * Some chips tie up multiple I2C addresses; dummy devices reserve
0092      * them for us.
0093      */
0094     u8 bank_addr_shift;
0095     struct regmap *client_regmaps[];
0096 };
0097 
0098 /*
0099  * This parameter is to help this driver avoid blocking other drivers out
0100  * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C
0101  * clock, one 256 byte read takes about 1/43 second which is excessive;
0102  * but the 1/170 second it takes at 400 kHz may be quite reasonable; and
0103  * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible.
0104  *
0105  * This value is forced to be a power of two so that writes align on pages.
0106  */
0107 static unsigned int at24_io_limit = 128;
0108 module_param_named(io_limit, at24_io_limit, uint, 0);
0109 MODULE_PARM_DESC(at24_io_limit, "Maximum bytes per I/O (default 128)");
0110 
0111 /*
0112  * Specs often allow 5 msec for a page write, sometimes 20 msec;
0113  * it's important to recover from write timeouts.
0114  */
0115 static unsigned int at24_write_timeout = 25;
0116 module_param_named(write_timeout, at24_write_timeout, uint, 0);
0117 MODULE_PARM_DESC(at24_write_timeout, "Time (in ms) to try writes (default 25)");
0118 
0119 struct at24_chip_data {
0120     u32 byte_len;
0121     u8 flags;
0122     u8 bank_addr_shift;
0123     void (*read_post)(unsigned int off, char *buf, size_t count);
0124 };
0125 
0126 #define AT24_CHIP_DATA(_name, _len, _flags)             \
0127     static const struct at24_chip_data _name = {            \
0128         .byte_len = _len, .flags = _flags,          \
0129     }
0130 
0131 #define AT24_CHIP_DATA_CB(_name, _len, _flags, _read_post)      \
0132     static const struct at24_chip_data _name = {            \
0133         .byte_len = _len, .flags = _flags,          \
0134         .read_post = _read_post,                \
0135     }
0136 
0137 #define AT24_CHIP_DATA_BS(_name, _len, _flags, _bank_addr_shift)    \
0138     static const struct at24_chip_data _name = {            \
0139         .byte_len = _len, .flags = _flags,          \
0140         .bank_addr_shift = _bank_addr_shift         \
0141     }
0142 
0143 static void at24_read_post_vaio(unsigned int off, char *buf, size_t count)
0144 {
0145     int i;
0146 
0147     if (capable(CAP_SYS_ADMIN))
0148         return;
0149 
0150     /*
0151      * Hide VAIO private settings to regular users:
0152      * - BIOS passwords: bytes 0x00 to 0x0f
0153      * - UUID: bytes 0x10 to 0x1f
0154      * - Serial number: 0xc0 to 0xdf
0155      */
0156     for (i = 0; i < count; i++) {
0157         if ((off + i <= 0x1f) ||
0158             (off + i >= 0xc0 && off + i <= 0xdf))
0159             buf[i] = 0;
0160     }
0161 }
0162 
0163 /* needs 8 addresses as A0-A2 are ignored */
0164 AT24_CHIP_DATA(at24_data_24c00, 128 / 8, AT24_FLAG_TAKE8ADDR);
0165 /* old variants can't be handled with this generic entry! */
0166 AT24_CHIP_DATA(at24_data_24c01, 1024 / 8, 0);
0167 AT24_CHIP_DATA(at24_data_24cs01, 16,
0168     AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
0169 AT24_CHIP_DATA(at24_data_24c02, 2048 / 8, 0);
0170 AT24_CHIP_DATA(at24_data_24cs02, 16,
0171     AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
0172 AT24_CHIP_DATA(at24_data_24mac402, 48 / 8,
0173     AT24_FLAG_MAC | AT24_FLAG_READONLY);
0174 AT24_CHIP_DATA(at24_data_24mac602, 64 / 8,
0175     AT24_FLAG_MAC | AT24_FLAG_READONLY);
0176 /* spd is a 24c02 in memory DIMMs */
0177 AT24_CHIP_DATA(at24_data_spd, 2048 / 8,
0178     AT24_FLAG_READONLY | AT24_FLAG_IRUGO);
0179 /* 24c02_vaio is a 24c02 on some Sony laptops */
0180 AT24_CHIP_DATA_CB(at24_data_24c02_vaio, 2048 / 8,
0181     AT24_FLAG_READONLY | AT24_FLAG_IRUGO,
0182     at24_read_post_vaio);
0183 AT24_CHIP_DATA(at24_data_24c04, 4096 / 8, 0);
0184 AT24_CHIP_DATA(at24_data_24cs04, 16,
0185     AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
0186 /* 24rf08 quirk is handled at i2c-core */
0187 AT24_CHIP_DATA(at24_data_24c08, 8192 / 8, 0);
0188 AT24_CHIP_DATA(at24_data_24cs08, 16,
0189     AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
0190 AT24_CHIP_DATA(at24_data_24c16, 16384 / 8, 0);
0191 AT24_CHIP_DATA(at24_data_24cs16, 16,
0192     AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
0193 AT24_CHIP_DATA(at24_data_24c32, 32768 / 8, AT24_FLAG_ADDR16);
0194 AT24_CHIP_DATA(at24_data_24cs32, 16,
0195     AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
0196 AT24_CHIP_DATA(at24_data_24c64, 65536 / 8, AT24_FLAG_ADDR16);
0197 AT24_CHIP_DATA(at24_data_24cs64, 16,
0198     AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
0199 AT24_CHIP_DATA(at24_data_24c128, 131072 / 8, AT24_FLAG_ADDR16);
0200 AT24_CHIP_DATA(at24_data_24c256, 262144 / 8, AT24_FLAG_ADDR16);
0201 AT24_CHIP_DATA(at24_data_24c512, 524288 / 8, AT24_FLAG_ADDR16);
0202 AT24_CHIP_DATA(at24_data_24c1024, 1048576 / 8, AT24_FLAG_ADDR16);
0203 AT24_CHIP_DATA_BS(at24_data_24c1025, 1048576 / 8, AT24_FLAG_ADDR16, 2);
0204 AT24_CHIP_DATA(at24_data_24c2048, 2097152 / 8, AT24_FLAG_ADDR16);
0205 /* identical to 24c08 ? */
0206 AT24_CHIP_DATA(at24_data_INT3499, 8192 / 8, 0);
0207 
0208 static const struct i2c_device_id at24_ids[] = {
0209     { "24c00",  (kernel_ulong_t)&at24_data_24c00 },
0210     { "24c01",  (kernel_ulong_t)&at24_data_24c01 },
0211     { "24cs01", (kernel_ulong_t)&at24_data_24cs01 },
0212     { "24c02",  (kernel_ulong_t)&at24_data_24c02 },
0213     { "24cs02", (kernel_ulong_t)&at24_data_24cs02 },
0214     { "24mac402",   (kernel_ulong_t)&at24_data_24mac402 },
0215     { "24mac602",   (kernel_ulong_t)&at24_data_24mac602 },
0216     { "spd",    (kernel_ulong_t)&at24_data_spd },
0217     { "24c02-vaio", (kernel_ulong_t)&at24_data_24c02_vaio },
0218     { "24c04",  (kernel_ulong_t)&at24_data_24c04 },
0219     { "24cs04", (kernel_ulong_t)&at24_data_24cs04 },
0220     { "24c08",  (kernel_ulong_t)&at24_data_24c08 },
0221     { "24cs08", (kernel_ulong_t)&at24_data_24cs08 },
0222     { "24c16",  (kernel_ulong_t)&at24_data_24c16 },
0223     { "24cs16", (kernel_ulong_t)&at24_data_24cs16 },
0224     { "24c32",  (kernel_ulong_t)&at24_data_24c32 },
0225     { "24cs32", (kernel_ulong_t)&at24_data_24cs32 },
0226     { "24c64",  (kernel_ulong_t)&at24_data_24c64 },
0227     { "24cs64", (kernel_ulong_t)&at24_data_24cs64 },
0228     { "24c128", (kernel_ulong_t)&at24_data_24c128 },
0229     { "24c256", (kernel_ulong_t)&at24_data_24c256 },
0230     { "24c512", (kernel_ulong_t)&at24_data_24c512 },
0231     { "24c1024",    (kernel_ulong_t)&at24_data_24c1024 },
0232     { "24c1025",    (kernel_ulong_t)&at24_data_24c1025 },
0233     { "24c2048",    (kernel_ulong_t)&at24_data_24c2048 },
0234     { "at24",   0 },
0235     { /* END OF LIST */ }
0236 };
0237 MODULE_DEVICE_TABLE(i2c, at24_ids);
0238 
0239 static const struct of_device_id at24_of_match[] = {
0240     { .compatible = "atmel,24c00",      .data = &at24_data_24c00 },
0241     { .compatible = "atmel,24c01",      .data = &at24_data_24c01 },
0242     { .compatible = "atmel,24cs01",     .data = &at24_data_24cs01 },
0243     { .compatible = "atmel,24c02",      .data = &at24_data_24c02 },
0244     { .compatible = "atmel,24cs02",     .data = &at24_data_24cs02 },
0245     { .compatible = "atmel,24mac402",   .data = &at24_data_24mac402 },
0246     { .compatible = "atmel,24mac602",   .data = &at24_data_24mac602 },
0247     { .compatible = "atmel,spd",        .data = &at24_data_spd },
0248     { .compatible = "atmel,24c04",      .data = &at24_data_24c04 },
0249     { .compatible = "atmel,24cs04",     .data = &at24_data_24cs04 },
0250     { .compatible = "atmel,24c08",      .data = &at24_data_24c08 },
0251     { .compatible = "atmel,24cs08",     .data = &at24_data_24cs08 },
0252     { .compatible = "atmel,24c16",      .data = &at24_data_24c16 },
0253     { .compatible = "atmel,24cs16",     .data = &at24_data_24cs16 },
0254     { .compatible = "atmel,24c32",      .data = &at24_data_24c32 },
0255     { .compatible = "atmel,24cs32",     .data = &at24_data_24cs32 },
0256     { .compatible = "atmel,24c64",      .data = &at24_data_24c64 },
0257     { .compatible = "atmel,24cs64",     .data = &at24_data_24cs64 },
0258     { .compatible = "atmel,24c128",     .data = &at24_data_24c128 },
0259     { .compatible = "atmel,24c256",     .data = &at24_data_24c256 },
0260     { .compatible = "atmel,24c512",     .data = &at24_data_24c512 },
0261     { .compatible = "atmel,24c1024",    .data = &at24_data_24c1024 },
0262     { .compatible = "atmel,24c1025",    .data = &at24_data_24c1025 },
0263     { .compatible = "atmel,24c2048",    .data = &at24_data_24c2048 },
0264     { /* END OF LIST */ },
0265 };
0266 MODULE_DEVICE_TABLE(of, at24_of_match);
0267 
0268 static const struct acpi_device_id __maybe_unused at24_acpi_ids[] = {
0269     { "INT3499",    (kernel_ulong_t)&at24_data_INT3499 },
0270     { "TPF0001",    (kernel_ulong_t)&at24_data_24c1024 },
0271     { /* END OF LIST */ }
0272 };
0273 MODULE_DEVICE_TABLE(acpi, at24_acpi_ids);
0274 
0275 /*
0276  * This routine supports chips which consume multiple I2C addresses. It
0277  * computes the addressing information to be used for a given r/w request.
0278  * Assumes that sanity checks for offset happened at sysfs-layer.
0279  *
0280  * Slave address and byte offset derive from the offset. Always
0281  * set the byte address; on a multi-master board, another master
0282  * may have changed the chip's "current" address pointer.
0283  */
0284 static struct regmap *at24_translate_offset(struct at24_data *at24,
0285                         unsigned int *offset)
0286 {
0287     unsigned int i;
0288 
0289     if (at24->flags & AT24_FLAG_ADDR16) {
0290         i = *offset >> 16;
0291         *offset &= 0xffff;
0292     } else {
0293         i = *offset >> 8;
0294         *offset &= 0xff;
0295     }
0296 
0297     return at24->client_regmaps[i];
0298 }
0299 
0300 static struct device *at24_base_client_dev(struct at24_data *at24)
0301 {
0302     return regmap_get_device(at24->client_regmaps[0]);
0303 }
0304 
0305 static size_t at24_adjust_read_count(struct at24_data *at24,
0306                       unsigned int offset, size_t count)
0307 {
0308     unsigned int bits;
0309     size_t remainder;
0310 
0311     /*
0312      * In case of multi-address chips that don't rollover reads to
0313      * the next slave address: truncate the count to the slave boundary,
0314      * so that the read never straddles slaves.
0315      */
0316     if (at24->flags & AT24_FLAG_NO_RDROL) {
0317         bits = (at24->flags & AT24_FLAG_ADDR16) ? 16 : 8;
0318         remainder = BIT(bits) - offset;
0319         if (count > remainder)
0320             count = remainder;
0321     }
0322 
0323     if (count > at24_io_limit)
0324         count = at24_io_limit;
0325 
0326     return count;
0327 }
0328 
0329 static ssize_t at24_regmap_read(struct at24_data *at24, char *buf,
0330                 unsigned int offset, size_t count)
0331 {
0332     unsigned long timeout, read_time;
0333     struct regmap *regmap;
0334     int ret;
0335 
0336     regmap = at24_translate_offset(at24, &offset);
0337     count = at24_adjust_read_count(at24, offset, count);
0338 
0339     /* adjust offset for mac and serial read ops */
0340     offset += at24->offset_adj;
0341 
0342     timeout = jiffies + msecs_to_jiffies(at24_write_timeout);
0343     do {
0344         /*
0345          * The timestamp shall be taken before the actual operation
0346          * to avoid a premature timeout in case of high CPU load.
0347          */
0348         read_time = jiffies;
0349 
0350         ret = regmap_bulk_read(regmap, offset, buf, count);
0351         dev_dbg(regmap_get_device(regmap), "read %zu@%d --> %d (%ld)\n",
0352             count, offset, ret, jiffies);
0353         if (!ret)
0354             return count;
0355 
0356         usleep_range(1000, 1500);
0357     } while (time_before(read_time, timeout));
0358 
0359     return -ETIMEDOUT;
0360 }
0361 
0362 /*
0363  * Note that if the hardware write-protect pin is pulled high, the whole
0364  * chip is normally write protected. But there are plenty of product
0365  * variants here, including OTP fuses and partial chip protect.
0366  *
0367  * We only use page mode writes; the alternative is sloooow. These routines
0368  * write at most one page.
0369  */
0370 
0371 static size_t at24_adjust_write_count(struct at24_data *at24,
0372                       unsigned int offset, size_t count)
0373 {
0374     unsigned int next_page;
0375 
0376     /* write_max is at most a page */
0377     if (count > at24->write_max)
0378         count = at24->write_max;
0379 
0380     /* Never roll over backwards, to the start of this page */
0381     next_page = roundup(offset + 1, at24->page_size);
0382     if (offset + count > next_page)
0383         count = next_page - offset;
0384 
0385     return count;
0386 }
0387 
0388 static ssize_t at24_regmap_write(struct at24_data *at24, const char *buf,
0389                  unsigned int offset, size_t count)
0390 {
0391     unsigned long timeout, write_time;
0392     struct regmap *regmap;
0393     int ret;
0394 
0395     regmap = at24_translate_offset(at24, &offset);
0396     count = at24_adjust_write_count(at24, offset, count);
0397     timeout = jiffies + msecs_to_jiffies(at24_write_timeout);
0398 
0399     do {
0400         /*
0401          * The timestamp shall be taken before the actual operation
0402          * to avoid a premature timeout in case of high CPU load.
0403          */
0404         write_time = jiffies;
0405 
0406         ret = regmap_bulk_write(regmap, offset, buf, count);
0407         dev_dbg(regmap_get_device(regmap), "write %zu@%d --> %d (%ld)\n",
0408             count, offset, ret, jiffies);
0409         if (!ret)
0410             return count;
0411 
0412         usleep_range(1000, 1500);
0413     } while (time_before(write_time, timeout));
0414 
0415     return -ETIMEDOUT;
0416 }
0417 
0418 static int at24_read(void *priv, unsigned int off, void *val, size_t count)
0419 {
0420     struct at24_data *at24;
0421     struct device *dev;
0422     char *buf = val;
0423     int i, ret;
0424 
0425     at24 = priv;
0426     dev = at24_base_client_dev(at24);
0427 
0428     if (unlikely(!count))
0429         return count;
0430 
0431     if (off + count > at24->byte_len)
0432         return -EINVAL;
0433 
0434     ret = pm_runtime_get_sync(dev);
0435     if (ret < 0) {
0436         pm_runtime_put_noidle(dev);
0437         return ret;
0438     }
0439 
0440     /*
0441      * Read data from chip, protecting against concurrent updates
0442      * from this host, but not from other I2C masters.
0443      */
0444     mutex_lock(&at24->lock);
0445 
0446     for (i = 0; count; i += ret, count -= ret) {
0447         ret = at24_regmap_read(at24, buf + i, off + i, count);
0448         if (ret < 0) {
0449             mutex_unlock(&at24->lock);
0450             pm_runtime_put(dev);
0451             return ret;
0452         }
0453     }
0454 
0455     mutex_unlock(&at24->lock);
0456 
0457     pm_runtime_put(dev);
0458 
0459     if (unlikely(at24->read_post))
0460         at24->read_post(off, buf, i);
0461 
0462     return 0;
0463 }
0464 
0465 static int at24_write(void *priv, unsigned int off, void *val, size_t count)
0466 {
0467     struct at24_data *at24;
0468     struct device *dev;
0469     char *buf = val;
0470     int ret;
0471 
0472     at24 = priv;
0473     dev = at24_base_client_dev(at24);
0474 
0475     if (unlikely(!count))
0476         return -EINVAL;
0477 
0478     if (off + count > at24->byte_len)
0479         return -EINVAL;
0480 
0481     ret = pm_runtime_get_sync(dev);
0482     if (ret < 0) {
0483         pm_runtime_put_noidle(dev);
0484         return ret;
0485     }
0486 
0487     /*
0488      * Write data to chip, protecting against concurrent updates
0489      * from this host, but not from other I2C masters.
0490      */
0491     mutex_lock(&at24->lock);
0492 
0493     while (count) {
0494         ret = at24_regmap_write(at24, buf, off, count);
0495         if (ret < 0) {
0496             mutex_unlock(&at24->lock);
0497             pm_runtime_put(dev);
0498             return ret;
0499         }
0500         buf += ret;
0501         off += ret;
0502         count -= ret;
0503     }
0504 
0505     mutex_unlock(&at24->lock);
0506 
0507     pm_runtime_put(dev);
0508 
0509     return 0;
0510 }
0511 
0512 static const struct at24_chip_data *at24_get_chip_data(struct device *dev)
0513 {
0514     struct device_node *of_node = dev->of_node;
0515     const struct at24_chip_data *cdata;
0516     const struct i2c_device_id *id;
0517 
0518     id = i2c_match_id(at24_ids, to_i2c_client(dev));
0519 
0520     /*
0521      * The I2C core allows OF nodes compatibles to match against the
0522      * I2C device ID table as a fallback, so check not only if an OF
0523      * node is present but also if it matches an OF device ID entry.
0524      */
0525     if (of_node && of_match_device(at24_of_match, dev))
0526         cdata = of_device_get_match_data(dev);
0527     else if (id)
0528         cdata = (void *)id->driver_data;
0529     else
0530         cdata = acpi_device_get_match_data(dev);
0531 
0532     if (!cdata)
0533         return ERR_PTR(-ENODEV);
0534 
0535     return cdata;
0536 }
0537 
0538 static int at24_make_dummy_client(struct at24_data *at24, unsigned int index,
0539                   struct i2c_client *base_client,
0540                   struct regmap_config *regmap_config)
0541 {
0542     struct i2c_client *dummy_client;
0543     struct regmap *regmap;
0544 
0545     dummy_client = devm_i2c_new_dummy_device(&base_client->dev,
0546                          base_client->adapter,
0547                          base_client->addr +
0548                          (index << at24->bank_addr_shift));
0549     if (IS_ERR(dummy_client))
0550         return PTR_ERR(dummy_client);
0551 
0552     regmap = devm_regmap_init_i2c(dummy_client, regmap_config);
0553     if (IS_ERR(regmap))
0554         return PTR_ERR(regmap);
0555 
0556     at24->client_regmaps[index] = regmap;
0557 
0558     return 0;
0559 }
0560 
0561 static unsigned int at24_get_offset_adj(u8 flags, unsigned int byte_len)
0562 {
0563     if (flags & AT24_FLAG_MAC) {
0564         /* EUI-48 starts from 0x9a, EUI-64 from 0x98 */
0565         return 0xa0 - byte_len;
0566     } else if (flags & AT24_FLAG_SERIAL && flags & AT24_FLAG_ADDR16) {
0567         /*
0568          * For 16 bit address pointers, the word address must contain
0569          * a '10' sequence in bits 11 and 10 regardless of the
0570          * intended position of the address pointer.
0571          */
0572         return 0x0800;
0573     } else if (flags & AT24_FLAG_SERIAL) {
0574         /*
0575          * Otherwise the word address must begin with a '10' sequence,
0576          * regardless of the intended address.
0577          */
0578         return 0x0080;
0579     } else {
0580         return 0;
0581     }
0582 }
0583 
0584 static int at24_probe(struct i2c_client *client)
0585 {
0586     struct regmap_config regmap_config = { };
0587     struct nvmem_config nvmem_config = { };
0588     u32 byte_len, page_size, flags, addrw;
0589     const struct at24_chip_data *cdata;
0590     struct device *dev = &client->dev;
0591     bool i2c_fn_i2c, i2c_fn_block;
0592     unsigned int i, num_addresses;
0593     struct at24_data *at24;
0594     bool full_power;
0595     struct regmap *regmap;
0596     bool writable;
0597     u8 test_byte;
0598     int err;
0599 
0600     i2c_fn_i2c = i2c_check_functionality(client->adapter, I2C_FUNC_I2C);
0601     i2c_fn_block = i2c_check_functionality(client->adapter,
0602                            I2C_FUNC_SMBUS_WRITE_I2C_BLOCK);
0603 
0604     cdata = at24_get_chip_data(dev);
0605     if (IS_ERR(cdata))
0606         return PTR_ERR(cdata);
0607 
0608     err = device_property_read_u32(dev, "pagesize", &page_size);
0609     if (err)
0610         /*
0611          * This is slow, but we can't know all eeproms, so we better
0612          * play safe. Specifying custom eeprom-types via device tree
0613          * or properties is recommended anyhow.
0614          */
0615         page_size = 1;
0616 
0617     flags = cdata->flags;
0618     if (device_property_present(dev, "read-only"))
0619         flags |= AT24_FLAG_READONLY;
0620     if (device_property_present(dev, "no-read-rollover"))
0621         flags |= AT24_FLAG_NO_RDROL;
0622 
0623     err = device_property_read_u32(dev, "address-width", &addrw);
0624     if (!err) {
0625         switch (addrw) {
0626         case 8:
0627             if (flags & AT24_FLAG_ADDR16)
0628                 dev_warn(dev,
0629                      "Override address width to be 8, while default is 16\n");
0630             flags &= ~AT24_FLAG_ADDR16;
0631             break;
0632         case 16:
0633             flags |= AT24_FLAG_ADDR16;
0634             break;
0635         default:
0636             dev_warn(dev, "Bad \"address-width\" property: %u\n",
0637                  addrw);
0638         }
0639     }
0640 
0641     err = device_property_read_u32(dev, "size", &byte_len);
0642     if (err)
0643         byte_len = cdata->byte_len;
0644 
0645     if (!i2c_fn_i2c && !i2c_fn_block)
0646         page_size = 1;
0647 
0648     if (!page_size) {
0649         dev_err(dev, "page_size must not be 0!\n");
0650         return -EINVAL;
0651     }
0652 
0653     if (!is_power_of_2(page_size))
0654         dev_warn(dev, "page_size looks suspicious (no power of 2)!\n");
0655 
0656     err = device_property_read_u32(dev, "num-addresses", &num_addresses);
0657     if (err) {
0658         if (flags & AT24_FLAG_TAKE8ADDR)
0659             num_addresses = 8;
0660         else
0661             num_addresses = DIV_ROUND_UP(byte_len,
0662                 (flags & AT24_FLAG_ADDR16) ? 65536 : 256);
0663     }
0664 
0665     if ((flags & AT24_FLAG_SERIAL) && (flags & AT24_FLAG_MAC)) {
0666         dev_err(dev,
0667             "invalid device data - cannot have both AT24_FLAG_SERIAL & AT24_FLAG_MAC.");
0668         return -EINVAL;
0669     }
0670 
0671     regmap_config.val_bits = 8;
0672     regmap_config.reg_bits = (flags & AT24_FLAG_ADDR16) ? 16 : 8;
0673     regmap_config.disable_locking = true;
0674 
0675     regmap = devm_regmap_init_i2c(client, &regmap_config);
0676     if (IS_ERR(regmap))
0677         return PTR_ERR(regmap);
0678 
0679     at24 = devm_kzalloc(dev, struct_size(at24, client_regmaps, num_addresses),
0680                 GFP_KERNEL);
0681     if (!at24)
0682         return -ENOMEM;
0683 
0684     mutex_init(&at24->lock);
0685     at24->byte_len = byte_len;
0686     at24->page_size = page_size;
0687     at24->flags = flags;
0688     at24->read_post = cdata->read_post;
0689     at24->bank_addr_shift = cdata->bank_addr_shift;
0690     at24->num_addresses = num_addresses;
0691     at24->offset_adj = at24_get_offset_adj(flags, byte_len);
0692     at24->client_regmaps[0] = regmap;
0693 
0694     at24->vcc_reg = devm_regulator_get(dev, "vcc");
0695     if (IS_ERR(at24->vcc_reg))
0696         return PTR_ERR(at24->vcc_reg);
0697 
0698     writable = !(flags & AT24_FLAG_READONLY);
0699     if (writable) {
0700         at24->write_max = min_t(unsigned int,
0701                     page_size, at24_io_limit);
0702         if (!i2c_fn_i2c && at24->write_max > I2C_SMBUS_BLOCK_MAX)
0703             at24->write_max = I2C_SMBUS_BLOCK_MAX;
0704     }
0705 
0706     /* use dummy devices for multiple-address chips */
0707     for (i = 1; i < num_addresses; i++) {
0708         err = at24_make_dummy_client(at24, i, client, &regmap_config);
0709         if (err)
0710             return err;
0711     }
0712 
0713     /*
0714      * We initialize nvmem_config.id to NVMEM_DEVID_AUTO even if the
0715      * label property is set as some platform can have multiple eeproms
0716      * with same label and we can not register each of those with same
0717      * label. Failing to register those eeproms trigger cascade failure
0718      * on such platform.
0719      */
0720     nvmem_config.id = NVMEM_DEVID_AUTO;
0721 
0722     if (device_property_present(dev, "label")) {
0723         err = device_property_read_string(dev, "label",
0724                           &nvmem_config.name);
0725         if (err)
0726             return err;
0727     } else {
0728         nvmem_config.name = dev_name(dev);
0729     }
0730 
0731     nvmem_config.type = NVMEM_TYPE_EEPROM;
0732     nvmem_config.dev = dev;
0733     nvmem_config.read_only = !writable;
0734     nvmem_config.root_only = !(flags & AT24_FLAG_IRUGO);
0735     nvmem_config.owner = THIS_MODULE;
0736     nvmem_config.compat = true;
0737     nvmem_config.base_dev = dev;
0738     nvmem_config.reg_read = at24_read;
0739     nvmem_config.reg_write = at24_write;
0740     nvmem_config.priv = at24;
0741     nvmem_config.stride = 1;
0742     nvmem_config.word_size = 1;
0743     nvmem_config.size = byte_len;
0744 
0745     i2c_set_clientdata(client, at24);
0746 
0747     full_power = acpi_dev_state_d0(&client->dev);
0748     if (full_power) {
0749         err = regulator_enable(at24->vcc_reg);
0750         if (err) {
0751             dev_err(dev, "Failed to enable vcc regulator\n");
0752             return err;
0753         }
0754 
0755         pm_runtime_set_active(dev);
0756     }
0757     pm_runtime_enable(dev);
0758 
0759     at24->nvmem = devm_nvmem_register(dev, &nvmem_config);
0760     if (IS_ERR(at24->nvmem)) {
0761         pm_runtime_disable(dev);
0762         if (!pm_runtime_status_suspended(dev))
0763             regulator_disable(at24->vcc_reg);
0764         return PTR_ERR(at24->nvmem);
0765     }
0766 
0767     /*
0768      * Perform a one-byte test read to verify that the chip is functional,
0769      * unless powering on the device is to be avoided during probe (i.e.
0770      * it's powered off right now).
0771      */
0772     if (full_power) {
0773         err = at24_read(at24, 0, &test_byte, 1);
0774         if (err) {
0775             pm_runtime_disable(dev);
0776             if (!pm_runtime_status_suspended(dev))
0777                 regulator_disable(at24->vcc_reg);
0778             return -ENODEV;
0779         }
0780     }
0781 
0782     pm_runtime_idle(dev);
0783 
0784     if (writable)
0785         dev_info(dev, "%u byte %s EEPROM, writable, %u bytes/write\n",
0786              byte_len, client->name, at24->write_max);
0787     else
0788         dev_info(dev, "%u byte %s EEPROM, read-only\n",
0789              byte_len, client->name);
0790 
0791     return 0;
0792 }
0793 
0794 static int at24_remove(struct i2c_client *client)
0795 {
0796     struct at24_data *at24 = i2c_get_clientdata(client);
0797 
0798     pm_runtime_disable(&client->dev);
0799     if (acpi_dev_state_d0(&client->dev)) {
0800         if (!pm_runtime_status_suspended(&client->dev))
0801             regulator_disable(at24->vcc_reg);
0802         pm_runtime_set_suspended(&client->dev);
0803     }
0804 
0805     return 0;
0806 }
0807 
0808 static int __maybe_unused at24_suspend(struct device *dev)
0809 {
0810     struct i2c_client *client = to_i2c_client(dev);
0811     struct at24_data *at24 = i2c_get_clientdata(client);
0812 
0813     return regulator_disable(at24->vcc_reg);
0814 }
0815 
0816 static int __maybe_unused at24_resume(struct device *dev)
0817 {
0818     struct i2c_client *client = to_i2c_client(dev);
0819     struct at24_data *at24 = i2c_get_clientdata(client);
0820 
0821     return regulator_enable(at24->vcc_reg);
0822 }
0823 
0824 static const struct dev_pm_ops at24_pm_ops = {
0825     SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
0826                 pm_runtime_force_resume)
0827     SET_RUNTIME_PM_OPS(at24_suspend, at24_resume, NULL)
0828 };
0829 
0830 static struct i2c_driver at24_driver = {
0831     .driver = {
0832         .name = "at24",
0833         .pm = &at24_pm_ops,
0834         .of_match_table = at24_of_match,
0835         .acpi_match_table = ACPI_PTR(at24_acpi_ids),
0836     },
0837     .probe_new = at24_probe,
0838     .remove = at24_remove,
0839     .id_table = at24_ids,
0840     .flags = I2C_DRV_ACPI_WAIVE_D0_PROBE,
0841 };
0842 
0843 static int __init at24_init(void)
0844 {
0845     if (!at24_io_limit) {
0846         pr_err("at24: at24_io_limit must not be 0!\n");
0847         return -EINVAL;
0848     }
0849 
0850     at24_io_limit = rounddown_pow_of_two(at24_io_limit);
0851     return i2c_add_driver(&at24_driver);
0852 }
0853 module_init(at24_init);
0854 
0855 static void __exit at24_exit(void)
0856 {
0857     i2c_del_driver(&at24_driver);
0858 }
0859 module_exit(at24_exit);
0860 
0861 MODULE_DESCRIPTION("Driver for most I2C EEPROMs");
0862 MODULE_AUTHOR("David Brownell and Wolfram Sang");
0863 MODULE_LICENSE("GPL");
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