0001
0002
0003
0004
0005
0006 #include <linux/spinlock.h>
0007 #include <linux/module.h>
0008 #include <linux/export.h>
0009 #include <linux/kernel.h>
0010 #include <linux/bitmap.h>
0011 #include <linux/sched/signal.h>
0012 #include <linux/poll.h>
0013 #include <linux/pid.h>
0014 #include <linux/fs.h>
0015 #include <linux/mm.h>
0016 #include <linux/slab.h>
0017 #include <linux/sched/mm.h>
0018 #include <linux/mmu_context.h>
0019 #include <asm/cputable.h>
0020 #include <asm/current.h>
0021 #include <asm/copro.h>
0022
0023 #include "cxl.h"
0024 #include "trace.h"
0025
0026 #define CXL_NUM_MINORS 256
0027
0028 #define CXL_AFU_MINOR_D(afu) (CXL_CARD_MINOR(afu->adapter) + 1 + (3 * afu->slice))
0029 #define CXL_AFU_MINOR_M(afu) (CXL_AFU_MINOR_D(afu) + 1)
0030 #define CXL_AFU_MINOR_S(afu) (CXL_AFU_MINOR_D(afu) + 2)
0031 #define CXL_AFU_MKDEV_D(afu) MKDEV(MAJOR(cxl_dev), CXL_AFU_MINOR_D(afu))
0032 #define CXL_AFU_MKDEV_M(afu) MKDEV(MAJOR(cxl_dev), CXL_AFU_MINOR_M(afu))
0033 #define CXL_AFU_MKDEV_S(afu) MKDEV(MAJOR(cxl_dev), CXL_AFU_MINOR_S(afu))
0034
0035 #define CXL_DEVT_AFU(dev) ((MINOR(dev) % CXL_DEV_MINORS - 1) / 3)
0036
0037 #define CXL_DEVT_IS_CARD(dev) (MINOR(dev) % CXL_DEV_MINORS == 0)
0038
0039 static dev_t cxl_dev;
0040
0041 static struct class *cxl_class;
0042
0043 static int __afu_open(struct inode *inode, struct file *file, bool master)
0044 {
0045 struct cxl *adapter;
0046 struct cxl_afu *afu;
0047 struct cxl_context *ctx;
0048 int adapter_num = CXL_DEVT_ADAPTER(inode->i_rdev);
0049 int slice = CXL_DEVT_AFU(inode->i_rdev);
0050 int rc = -ENODEV;
0051
0052 pr_devel("afu_open afu%i.%i\n", slice, adapter_num);
0053
0054 if (!(adapter = get_cxl_adapter(adapter_num)))
0055 return -ENODEV;
0056
0057 if (slice > adapter->slices)
0058 goto err_put_adapter;
0059
0060 spin_lock(&adapter->afu_list_lock);
0061 if (!(afu = adapter->afu[slice])) {
0062 spin_unlock(&adapter->afu_list_lock);
0063 goto err_put_adapter;
0064 }
0065
0066
0067
0068
0069
0070
0071 cxl_afu_get(afu);
0072 spin_unlock(&adapter->afu_list_lock);
0073
0074 if (!afu->current_mode)
0075 goto err_put_afu;
0076
0077 if (!cxl_ops->link_ok(adapter, afu)) {
0078 rc = -EIO;
0079 goto err_put_afu;
0080 }
0081
0082 if (!(ctx = cxl_context_alloc())) {
0083 rc = -ENOMEM;
0084 goto err_put_afu;
0085 }
0086
0087 rc = cxl_context_init(ctx, afu, master);
0088 if (rc)
0089 goto err_put_afu;
0090
0091 cxl_context_set_mapping(ctx, inode->i_mapping);
0092
0093 pr_devel("afu_open pe: %i\n", ctx->pe);
0094 file->private_data = ctx;
0095
0096
0097 rc = 0;
0098
0099 err_put_afu:
0100
0101 cxl_afu_put(afu);
0102 err_put_adapter:
0103 put_device(&adapter->dev);
0104 return rc;
0105 }
0106
0107 int afu_open(struct inode *inode, struct file *file)
0108 {
0109 return __afu_open(inode, file, false);
0110 }
0111
0112 static int afu_master_open(struct inode *inode, struct file *file)
0113 {
0114 return __afu_open(inode, file, true);
0115 }
0116
0117 int afu_release(struct inode *inode, struct file *file)
0118 {
0119 struct cxl_context *ctx = file->private_data;
0120
0121 pr_devel("%s: closing cxl file descriptor. pe: %i\n",
0122 __func__, ctx->pe);
0123 cxl_context_detach(ctx);
0124
0125
0126
0127
0128
0129
0130 if (!ctx->kernelapi) {
0131 mutex_lock(&ctx->mapping_lock);
0132 ctx->mapping = NULL;
0133 mutex_unlock(&ctx->mapping_lock);
0134 }
0135
0136
0137
0138
0139
0140
0141
0142 cxl_context_free(ctx);
0143
0144 return 0;
0145 }
0146
0147 static long afu_ioctl_start_work(struct cxl_context *ctx,
0148 struct cxl_ioctl_start_work __user *uwork)
0149 {
0150 struct cxl_ioctl_start_work work;
0151 u64 amr = 0;
0152 int rc;
0153
0154 pr_devel("%s: pe: %i\n", __func__, ctx->pe);
0155
0156
0157
0158 if (copy_from_user(&work, uwork, sizeof(work)))
0159 return -EFAULT;
0160
0161 mutex_lock(&ctx->status_mutex);
0162 if (ctx->status != OPENED) {
0163 rc = -EIO;
0164 goto out;
0165 }
0166
0167
0168
0169
0170
0171 if (work.reserved1 || work.reserved2 || work.reserved3 ||
0172 work.reserved4 || work.reserved5 ||
0173 (work.flags & ~CXL_START_WORK_ALL)) {
0174 rc = -EINVAL;
0175 goto out;
0176 }
0177
0178 if (!(work.flags & CXL_START_WORK_NUM_IRQS))
0179 work.num_interrupts = ctx->afu->pp_irqs;
0180 else if ((work.num_interrupts < ctx->afu->pp_irqs) ||
0181 (work.num_interrupts > ctx->afu->irqs_max)) {
0182 rc = -EINVAL;
0183 goto out;
0184 }
0185
0186 if ((rc = afu_register_irqs(ctx, work.num_interrupts)))
0187 goto out;
0188
0189 if (work.flags & CXL_START_WORK_AMR)
0190 amr = work.amr & mfspr(SPRN_UAMOR);
0191
0192 if (work.flags & CXL_START_WORK_TID)
0193 ctx->assign_tidr = true;
0194
0195 ctx->mmio_err_ff = !!(work.flags & CXL_START_WORK_ERR_FF);
0196
0197
0198
0199
0200
0201 rc = cxl_adapter_context_get(ctx->afu->adapter);
0202 if (rc) {
0203 afu_release_irqs(ctx, ctx);
0204 goto out;
0205 }
0206
0207
0208
0209
0210
0211
0212
0213
0214
0215
0216 ctx->pid = get_task_pid(current, PIDTYPE_PID);
0217
0218
0219 ctx->mm = get_task_mm(current);
0220
0221
0222 cxl_context_mm_count_get(ctx);
0223
0224 if (ctx->mm) {
0225
0226 mmput(ctx->mm);
0227
0228 mm_context_add_copro(ctx->mm);
0229 }
0230
0231
0232
0233
0234
0235 cxl_ctx_get();
0236
0237
0238
0239
0240
0241
0242
0243
0244
0245
0246
0247
0248
0249 smp_mb();
0250
0251 trace_cxl_attach(ctx, work.work_element_descriptor, work.num_interrupts, amr);
0252
0253 if ((rc = cxl_ops->attach_process(ctx, false, work.work_element_descriptor,
0254 amr))) {
0255 afu_release_irqs(ctx, ctx);
0256 cxl_adapter_context_put(ctx->afu->adapter);
0257 put_pid(ctx->pid);
0258 ctx->pid = NULL;
0259 cxl_ctx_put();
0260 cxl_context_mm_count_put(ctx);
0261 if (ctx->mm)
0262 mm_context_remove_copro(ctx->mm);
0263 goto out;
0264 }
0265
0266 rc = 0;
0267 if (work.flags & CXL_START_WORK_TID) {
0268 work.tid = ctx->tidr;
0269 if (copy_to_user(uwork, &work, sizeof(work)))
0270 rc = -EFAULT;
0271 }
0272
0273 ctx->status = STARTED;
0274
0275 out:
0276 mutex_unlock(&ctx->status_mutex);
0277 return rc;
0278 }
0279
0280 static long afu_ioctl_process_element(struct cxl_context *ctx,
0281 int __user *upe)
0282 {
0283 pr_devel("%s: pe: %i\n", __func__, ctx->pe);
0284
0285 if (copy_to_user(upe, &ctx->external_pe, sizeof(__u32)))
0286 return -EFAULT;
0287
0288 return 0;
0289 }
0290
0291 static long afu_ioctl_get_afu_id(struct cxl_context *ctx,
0292 struct cxl_afu_id __user *upafuid)
0293 {
0294 struct cxl_afu_id afuid = { 0 };
0295
0296 afuid.card_id = ctx->afu->adapter->adapter_num;
0297 afuid.afu_offset = ctx->afu->slice;
0298 afuid.afu_mode = ctx->afu->current_mode;
0299
0300
0301 if (ctx->afu->current_mode == CXL_MODE_DIRECTED && !ctx->master)
0302 afuid.flags |= CXL_AFUID_FLAG_SLAVE;
0303
0304 if (copy_to_user(upafuid, &afuid, sizeof(afuid)))
0305 return -EFAULT;
0306
0307 return 0;
0308 }
0309
0310 long afu_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
0311 {
0312 struct cxl_context *ctx = file->private_data;
0313
0314 if (ctx->status == CLOSED)
0315 return -EIO;
0316
0317 if (!cxl_ops->link_ok(ctx->afu->adapter, ctx->afu))
0318 return -EIO;
0319
0320 pr_devel("afu_ioctl\n");
0321 switch (cmd) {
0322 case CXL_IOCTL_START_WORK:
0323 return afu_ioctl_start_work(ctx, (struct cxl_ioctl_start_work __user *)arg);
0324 case CXL_IOCTL_GET_PROCESS_ELEMENT:
0325 return afu_ioctl_process_element(ctx, (__u32 __user *)arg);
0326 case CXL_IOCTL_GET_AFU_ID:
0327 return afu_ioctl_get_afu_id(ctx, (struct cxl_afu_id __user *)
0328 arg);
0329 }
0330 return -EINVAL;
0331 }
0332
0333 static long afu_compat_ioctl(struct file *file, unsigned int cmd,
0334 unsigned long arg)
0335 {
0336 return afu_ioctl(file, cmd, arg);
0337 }
0338
0339 int afu_mmap(struct file *file, struct vm_area_struct *vm)
0340 {
0341 struct cxl_context *ctx = file->private_data;
0342
0343
0344 if (ctx->status != STARTED)
0345 return -EIO;
0346
0347 if (!cxl_ops->link_ok(ctx->afu->adapter, ctx->afu))
0348 return -EIO;
0349
0350 return cxl_context_iomap(ctx, vm);
0351 }
0352
0353 static inline bool ctx_event_pending(struct cxl_context *ctx)
0354 {
0355 if (ctx->pending_irq || ctx->pending_fault || ctx->pending_afu_err)
0356 return true;
0357
0358 if (ctx->afu_driver_ops && atomic_read(&ctx->afu_driver_events))
0359 return true;
0360
0361 return false;
0362 }
0363
0364 __poll_t afu_poll(struct file *file, struct poll_table_struct *poll)
0365 {
0366 struct cxl_context *ctx = file->private_data;
0367 __poll_t mask = 0;
0368 unsigned long flags;
0369
0370
0371 poll_wait(file, &ctx->wq, poll);
0372
0373 pr_devel("afu_poll wait done pe: %i\n", ctx->pe);
0374
0375 spin_lock_irqsave(&ctx->lock, flags);
0376 if (ctx_event_pending(ctx))
0377 mask |= EPOLLIN | EPOLLRDNORM;
0378 else if (ctx->status == CLOSED)
0379
0380
0381 mask |= EPOLLERR;
0382 spin_unlock_irqrestore(&ctx->lock, flags);
0383
0384 pr_devel("afu_poll pe: %i returning %#x\n", ctx->pe, mask);
0385
0386 return mask;
0387 }
0388
0389 static ssize_t afu_driver_event_copy(struct cxl_context *ctx,
0390 char __user *buf,
0391 struct cxl_event *event,
0392 struct cxl_event_afu_driver_reserved *pl)
0393 {
0394
0395 if (!pl) {
0396 ctx->afu_driver_ops->event_delivered(ctx, pl, -EINVAL);
0397 return -EFAULT;
0398 }
0399
0400
0401 event->header.size += pl->data_size;
0402 if (event->header.size > CXL_READ_MIN_SIZE) {
0403 ctx->afu_driver_ops->event_delivered(ctx, pl, -EINVAL);
0404 return -EFAULT;
0405 }
0406
0407
0408 if (copy_to_user(buf, event, sizeof(struct cxl_event_header))) {
0409 ctx->afu_driver_ops->event_delivered(ctx, pl, -EFAULT);
0410 return -EFAULT;
0411 }
0412
0413
0414 buf += sizeof(struct cxl_event_header);
0415 if (copy_to_user(buf, &pl->data, pl->data_size)) {
0416 ctx->afu_driver_ops->event_delivered(ctx, pl, -EFAULT);
0417 return -EFAULT;
0418 }
0419
0420 ctx->afu_driver_ops->event_delivered(ctx, pl, 0);
0421 return event->header.size;
0422 }
0423
0424 ssize_t afu_read(struct file *file, char __user *buf, size_t count,
0425 loff_t *off)
0426 {
0427 struct cxl_context *ctx = file->private_data;
0428 struct cxl_event_afu_driver_reserved *pl = NULL;
0429 struct cxl_event event;
0430 unsigned long flags;
0431 int rc;
0432 DEFINE_WAIT(wait);
0433
0434 if (!cxl_ops->link_ok(ctx->afu->adapter, ctx->afu))
0435 return -EIO;
0436
0437 if (count < CXL_READ_MIN_SIZE)
0438 return -EINVAL;
0439
0440 spin_lock_irqsave(&ctx->lock, flags);
0441
0442 for (;;) {
0443 prepare_to_wait(&ctx->wq, &wait, TASK_INTERRUPTIBLE);
0444 if (ctx_event_pending(ctx) || (ctx->status == CLOSED))
0445 break;
0446
0447 if (!cxl_ops->link_ok(ctx->afu->adapter, ctx->afu)) {
0448 rc = -EIO;
0449 goto out;
0450 }
0451
0452 if (file->f_flags & O_NONBLOCK) {
0453 rc = -EAGAIN;
0454 goto out;
0455 }
0456
0457 if (signal_pending(current)) {
0458 rc = -ERESTARTSYS;
0459 goto out;
0460 }
0461
0462 spin_unlock_irqrestore(&ctx->lock, flags);
0463 pr_devel("afu_read going to sleep...\n");
0464 schedule();
0465 pr_devel("afu_read woken up\n");
0466 spin_lock_irqsave(&ctx->lock, flags);
0467 }
0468
0469 finish_wait(&ctx->wq, &wait);
0470
0471 memset(&event, 0, sizeof(event));
0472 event.header.process_element = ctx->pe;
0473 event.header.size = sizeof(struct cxl_event_header);
0474 if (ctx->afu_driver_ops && atomic_read(&ctx->afu_driver_events)) {
0475 pr_devel("afu_read delivering AFU driver specific event\n");
0476 pl = ctx->afu_driver_ops->fetch_event(ctx);
0477 atomic_dec(&ctx->afu_driver_events);
0478 event.header.type = CXL_EVENT_AFU_DRIVER;
0479 } else if (ctx->pending_irq) {
0480 pr_devel("afu_read delivering AFU interrupt\n");
0481 event.header.size += sizeof(struct cxl_event_afu_interrupt);
0482 event.header.type = CXL_EVENT_AFU_INTERRUPT;
0483 event.irq.irq = find_first_bit(ctx->irq_bitmap, ctx->irq_count) + 1;
0484 clear_bit(event.irq.irq - 1, ctx->irq_bitmap);
0485 if (bitmap_empty(ctx->irq_bitmap, ctx->irq_count))
0486 ctx->pending_irq = false;
0487 } else if (ctx->pending_fault) {
0488 pr_devel("afu_read delivering data storage fault\n");
0489 event.header.size += sizeof(struct cxl_event_data_storage);
0490 event.header.type = CXL_EVENT_DATA_STORAGE;
0491 event.fault.addr = ctx->fault_addr;
0492 event.fault.dsisr = ctx->fault_dsisr;
0493 ctx->pending_fault = false;
0494 } else if (ctx->pending_afu_err) {
0495 pr_devel("afu_read delivering afu error\n");
0496 event.header.size += sizeof(struct cxl_event_afu_error);
0497 event.header.type = CXL_EVENT_AFU_ERROR;
0498 event.afu_error.error = ctx->afu_err;
0499 ctx->pending_afu_err = false;
0500 } else if (ctx->status == CLOSED) {
0501 pr_devel("afu_read fatal error\n");
0502 spin_unlock_irqrestore(&ctx->lock, flags);
0503 return -EIO;
0504 } else
0505 WARN(1, "afu_read must be buggy\n");
0506
0507 spin_unlock_irqrestore(&ctx->lock, flags);
0508
0509 if (event.header.type == CXL_EVENT_AFU_DRIVER)
0510 return afu_driver_event_copy(ctx, buf, &event, pl);
0511
0512 if (copy_to_user(buf, &event, event.header.size))
0513 return -EFAULT;
0514 return event.header.size;
0515
0516 out:
0517 finish_wait(&ctx->wq, &wait);
0518 spin_unlock_irqrestore(&ctx->lock, flags);
0519 return rc;
0520 }
0521
0522
0523
0524
0525
0526 const struct file_operations afu_fops = {
0527 .owner = THIS_MODULE,
0528 .open = afu_open,
0529 .poll = afu_poll,
0530 .read = afu_read,
0531 .release = afu_release,
0532 .unlocked_ioctl = afu_ioctl,
0533 .compat_ioctl = afu_compat_ioctl,
0534 .mmap = afu_mmap,
0535 };
0536
0537 static const struct file_operations afu_master_fops = {
0538 .owner = THIS_MODULE,
0539 .open = afu_master_open,
0540 .poll = afu_poll,
0541 .read = afu_read,
0542 .release = afu_release,
0543 .unlocked_ioctl = afu_ioctl,
0544 .compat_ioctl = afu_compat_ioctl,
0545 .mmap = afu_mmap,
0546 };
0547
0548
0549 static char *cxl_devnode(struct device *dev, umode_t *mode)
0550 {
0551 if (cpu_has_feature(CPU_FTR_HVMODE) &&
0552 CXL_DEVT_IS_CARD(dev->devt)) {
0553
0554
0555
0556
0557 return NULL;
0558 }
0559 return kasprintf(GFP_KERNEL, "cxl/%s", dev_name(dev));
0560 }
0561
0562 extern struct class *cxl_class;
0563
0564 static int cxl_add_chardev(struct cxl_afu *afu, dev_t devt, struct cdev *cdev,
0565 struct device **chardev, char *postfix, char *desc,
0566 const struct file_operations *fops)
0567 {
0568 struct device *dev;
0569 int rc;
0570
0571 cdev_init(cdev, fops);
0572 rc = cdev_add(cdev, devt, 1);
0573 if (rc) {
0574 dev_err(&afu->dev, "Unable to add %s chardev: %i\n", desc, rc);
0575 return rc;
0576 }
0577
0578 dev = device_create(cxl_class, &afu->dev, devt, afu,
0579 "afu%i.%i%s", afu->adapter->adapter_num, afu->slice, postfix);
0580 if (IS_ERR(dev)) {
0581 rc = PTR_ERR(dev);
0582 dev_err(&afu->dev, "Unable to create %s chardev in sysfs: %i\n", desc, rc);
0583 goto err;
0584 }
0585
0586 *chardev = dev;
0587
0588 return 0;
0589 err:
0590 cdev_del(cdev);
0591 return rc;
0592 }
0593
0594 int cxl_chardev_d_afu_add(struct cxl_afu *afu)
0595 {
0596 return cxl_add_chardev(afu, CXL_AFU_MKDEV_D(afu), &afu->afu_cdev_d,
0597 &afu->chardev_d, "d", "dedicated",
0598 &afu_master_fops);
0599 }
0600
0601 int cxl_chardev_m_afu_add(struct cxl_afu *afu)
0602 {
0603 return cxl_add_chardev(afu, CXL_AFU_MKDEV_M(afu), &afu->afu_cdev_m,
0604 &afu->chardev_m, "m", "master",
0605 &afu_master_fops);
0606 }
0607
0608 int cxl_chardev_s_afu_add(struct cxl_afu *afu)
0609 {
0610 return cxl_add_chardev(afu, CXL_AFU_MKDEV_S(afu), &afu->afu_cdev_s,
0611 &afu->chardev_s, "s", "shared",
0612 &afu_fops);
0613 }
0614
0615 void cxl_chardev_afu_remove(struct cxl_afu *afu)
0616 {
0617 if (afu->chardev_d) {
0618 cdev_del(&afu->afu_cdev_d);
0619 device_unregister(afu->chardev_d);
0620 afu->chardev_d = NULL;
0621 }
0622 if (afu->chardev_m) {
0623 cdev_del(&afu->afu_cdev_m);
0624 device_unregister(afu->chardev_m);
0625 afu->chardev_m = NULL;
0626 }
0627 if (afu->chardev_s) {
0628 cdev_del(&afu->afu_cdev_s);
0629 device_unregister(afu->chardev_s);
0630 afu->chardev_s = NULL;
0631 }
0632 }
0633
0634 int cxl_register_afu(struct cxl_afu *afu)
0635 {
0636 afu->dev.class = cxl_class;
0637
0638 return device_register(&afu->dev);
0639 }
0640
0641 int cxl_register_adapter(struct cxl *adapter)
0642 {
0643 adapter->dev.class = cxl_class;
0644
0645
0646
0647
0648
0649
0650
0651 return device_register(&adapter->dev);
0652 }
0653
0654 dev_t cxl_get_dev(void)
0655 {
0656 return cxl_dev;
0657 }
0658
0659 int __init cxl_file_init(void)
0660 {
0661 int rc;
0662
0663
0664
0665
0666
0667 BUILD_BUG_ON(CXL_API_VERSION != 3);
0668 BUILD_BUG_ON(sizeof(struct cxl_ioctl_start_work) != 64);
0669 BUILD_BUG_ON(sizeof(struct cxl_event_header) != 8);
0670 BUILD_BUG_ON(sizeof(struct cxl_event_afu_interrupt) != 8);
0671 BUILD_BUG_ON(sizeof(struct cxl_event_data_storage) != 32);
0672 BUILD_BUG_ON(sizeof(struct cxl_event_afu_error) != 16);
0673
0674 if ((rc = alloc_chrdev_region(&cxl_dev, 0, CXL_NUM_MINORS, "cxl"))) {
0675 pr_err("Unable to allocate CXL major number: %i\n", rc);
0676 return rc;
0677 }
0678
0679 pr_devel("CXL device allocated, MAJOR %i\n", MAJOR(cxl_dev));
0680
0681 cxl_class = class_create(THIS_MODULE, "cxl");
0682 if (IS_ERR(cxl_class)) {
0683 pr_err("Unable to create CXL class\n");
0684 rc = PTR_ERR(cxl_class);
0685 goto err;
0686 }
0687 cxl_class->devnode = cxl_devnode;
0688
0689 return 0;
0690
0691 err:
0692 unregister_chrdev_region(cxl_dev, CXL_NUM_MINORS);
0693 return rc;
0694 }
0695
0696 void cxl_file_exit(void)
0697 {
0698 unregister_chrdev_region(cxl_dev, CXL_NUM_MINORS);
0699 class_destroy(cxl_class);
0700 }