misc/cardreader/rts5209.c

0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /* Driver for Realtek PCI-Express card reader
0003  *
0004  * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
0005  *
0006  * Author:
0007  *   Wei WANG <wei_wang@realsil.com.cn>
0008  */
0009
0010 #include <linux/module.h>
0011 #include <linux/delay.h>
0012 #include <linux/rtsx_pci.h>
0013
0014 #include "rtsx_pcr.h"
0015
0016 static u8 rts5209_get_ic_version(struct rtsx_pcr *pcr)
0017 {
0018     u8 val;
0019
0020     val = rtsx_pci_readb(pcr, 0x1C);
0021     return val & 0x0F;
0022 }
0023
0024 static void rts5209_fetch_vendor_settings(struct rtsx_pcr *pcr)
0025 {
0026     struct pci_dev *pdev = pcr->pci;
0027     u32 reg;
0028
0029     pci_read_config_dword(pdev, PCR_SETTING_REG1, &reg);
0030     pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
0031
0032     if (rts5209_vendor_setting1_valid(reg)) {
0033         if (rts5209_reg_check_ms_pmos(reg))
0034             pcr->flags |= PCR_MS_PMOS;
0035         pcr->aspm_en = rts5209_reg_to_aspm(reg);
0036     }
0037
0038     pci_read_config_dword(pdev, PCR_SETTING_REG2, &reg);
0039     pcr_dbg(pcr, "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);
0040
0041     if (rts5209_vendor_setting2_valid(reg)) {
0042         pcr->sd30_drive_sel_1v8 =
0043             rts5209_reg_to_sd30_drive_sel_1v8(reg);
0044         pcr->sd30_drive_sel_3v3 =
0045             rts5209_reg_to_sd30_drive_sel_3v3(reg);
0046         pcr->card_drive_sel = rts5209_reg_to_card_drive_sel(reg);
0047     }
0048 }
0049
0050 static void rts5209_force_power_down(struct rtsx_pcr *pcr, u8 pm_state, bool runtime)
0051 {
0052     rtsx_pci_write_register(pcr, FPDCTL, 0x07, 0x07);
0053 }
0054
0055 static int rts5209_extra_init_hw(struct rtsx_pcr *pcr)
0056 {
0057     rtsx_pci_init_cmd(pcr);
0058
0059     /* Turn off LED */
0060     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_GPIO, 0xFF, 0x03);
0061     /* Reset ASPM state to default value */
0062     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, ASPM_FORCE_CTL, 0x3F, 0);
0063     /* Force CLKREQ# PIN to drive 0 to request clock */
0064     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PETXCFG, 0x08, 0x08);
0065     /* Configure GPIO as output */
0066     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_GPIO_DIR, 0xFF, 0x03);
0067     /* Configure driving */
0068     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_DRIVE_SEL,
0069             0xFF, pcr->sd30_drive_sel_3v3);
0070
0071     return rtsx_pci_send_cmd(pcr, 100);
0072 }
0073
0074 static int rts5209_optimize_phy(struct rtsx_pcr *pcr)
0075 {
0076     return rtsx_pci_write_phy_register(pcr, 0x00, 0xB966);
0077 }
0078
0079 static int rts5209_turn_on_led(struct rtsx_pcr *pcr)
0080 {
0081     return rtsx_pci_write_register(pcr, CARD_GPIO, 0x01, 0x00);
0082 }
0083
0084 static int rts5209_turn_off_led(struct rtsx_pcr *pcr)
0085 {
0086     return rtsx_pci_write_register(pcr, CARD_GPIO, 0x01, 0x01);
0087 }
0088
0089 static int rts5209_enable_auto_blink(struct rtsx_pcr *pcr)
0090 {
0091     return rtsx_pci_write_register(pcr, CARD_AUTO_BLINK, 0xFF, 0x0D);
0092 }
0093
0094 static int rts5209_disable_auto_blink(struct rtsx_pcr *pcr)
0095 {
0096     return rtsx_pci_write_register(pcr, CARD_AUTO_BLINK, 0x08, 0x00);
0097 }
0098
0099 static int rts5209_card_power_on(struct rtsx_pcr *pcr, int card)
0100 {
0101     int err;
0102     u8 pwr_mask, partial_pwr_on, pwr_on;
0103
0104     pwr_mask = SD_POWER_MASK;
0105     partial_pwr_on = SD_PARTIAL_POWER_ON;
0106     pwr_on = SD_POWER_ON;
0107
0108     if ((pcr->flags & PCR_MS_PMOS) && (card == RTSX_MS_CARD)) {
0109         pwr_mask = MS_POWER_MASK;
0110         partial_pwr_on = MS_PARTIAL_POWER_ON;
0111         pwr_on = MS_POWER_ON;
0112     }
0113
0114     rtsx_pci_init_cmd(pcr);
0115     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,
0116             pwr_mask, partial_pwr_on);
0117     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,
0118             LDO3318_PWR_MASK, 0x04);
0119     err = rtsx_pci_send_cmd(pcr, 100);
0120     if (err < 0)
0121         return err;
0122
0123     /* To avoid too large in-rush current */
0124     udelay(150);
0125
0126     rtsx_pci_init_cmd(pcr);
0127     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL, pwr_mask, pwr_on);
0128     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,
0129             LDO3318_PWR_MASK, 0x00);
0130     return rtsx_pci_send_cmd(pcr, 100);
0131 }
0132
0133 static int rts5209_card_power_off(struct rtsx_pcr *pcr, int card)
0134 {
0135     u8 pwr_mask, pwr_off;
0136
0137     pwr_mask = SD_POWER_MASK;
0138     pwr_off = SD_POWER_OFF;
0139
0140     if ((pcr->flags & PCR_MS_PMOS) && (card == RTSX_MS_CARD)) {
0141         pwr_mask = MS_POWER_MASK;
0142         pwr_off = MS_POWER_OFF;
0143     }
0144
0145     rtsx_pci_init_cmd(pcr);
0146     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,
0147             pwr_mask | PMOS_STRG_MASK, pwr_off | PMOS_STRG_400mA);
0148     rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,
0149             LDO3318_PWR_MASK, 0x06);
0150     return rtsx_pci_send_cmd(pcr, 100);
0151 }
0152
0153 static int rts5209_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage)
0154 {
0155     int err;
0156
0157     if (voltage == OUTPUT_3V3) {
0158         err = rtsx_pci_write_register(pcr,
0159                 SD30_DRIVE_SEL, 0x07, pcr->sd30_drive_sel_3v3);
0160         if (err < 0)
0161             return err;
0162         err = rtsx_pci_write_phy_register(pcr, 0x08, 0x4FC0 | 0x24);
0163         if (err < 0)
0164             return err;
0165     } else if (voltage == OUTPUT_1V8) {
0166         err = rtsx_pci_write_register(pcr,
0167                 SD30_DRIVE_SEL, 0x07, pcr->sd30_drive_sel_1v8);
0168         if (err < 0)
0169             return err;
0170         err = rtsx_pci_write_phy_register(pcr, 0x08, 0x4C40 | 0x24);
0171         if (err < 0)
0172             return err;
0173     } else {
0174         return -EINVAL;
0175     }
0176
0177     return 0;
0178 }
0179
0180 static const struct pcr_ops rts5209_pcr_ops = {
0181     .fetch_vendor_settings = rts5209_fetch_vendor_settings,
0182     .extra_init_hw = rts5209_extra_init_hw,
0183     .optimize_phy = rts5209_optimize_phy,
0184     .turn_on_led = rts5209_turn_on_led,
0185     .turn_off_led = rts5209_turn_off_led,
0186     .enable_auto_blink = rts5209_enable_auto_blink,
0187     .disable_auto_blink = rts5209_disable_auto_blink,
0188     .card_power_on = rts5209_card_power_on,
0189     .card_power_off = rts5209_card_power_off,
0190     .switch_output_voltage = rts5209_switch_output_voltage,
0191     .cd_deglitch = NULL,
0192     .conv_clk_and_div_n = NULL,
0193     .force_power_down = rts5209_force_power_down,
0194 };
0195
0196 /* SD Pull Control Enable:
0197  *     SD_DAT[3:0] ==> pull up
0198  *     SD_CD       ==> pull up
0199  *     SD_WP       ==> pull up
0200  *     SD_CMD      ==> pull up
0201  *     SD_CLK      ==> pull down
0202  */
0203 static const u32 rts5209_sd_pull_ctl_enable_tbl[] = {
0204     RTSX_REG_PAIR(CARD_PULL_CTL1, 0xAA),
0205     RTSX_REG_PAIR(CARD_PULL_CTL2, 0xAA),
0206     RTSX_REG_PAIR(CARD_PULL_CTL3, 0xE9),
0207     0,
0208 };
0209
0210 /* SD Pull Control Disable:
0211  *     SD_DAT[3:0] ==> pull down
0212  *     SD_CD       ==> pull up
0213  *     SD_WP       ==> pull down
0214  *     SD_CMD      ==> pull down
0215  *     SD_CLK      ==> pull down
0216  */
0217 static const u32 rts5209_sd_pull_ctl_disable_tbl[] = {
0218     RTSX_REG_PAIR(CARD_PULL_CTL1, 0x55),
0219     RTSX_REG_PAIR(CARD_PULL_CTL2, 0x55),
0220     RTSX_REG_PAIR(CARD_PULL_CTL3, 0xD5),
0221     0,
0222 };
0223
0224 /* MS Pull Control Enable:
0225  *     MS CD       ==> pull up
0226  *     others      ==> pull down
0227  */
0228 static const u32 rts5209_ms_pull_ctl_enable_tbl[] = {
0229     RTSX_REG_PAIR(CARD_PULL_CTL4, 0x55),
0230     RTSX_REG_PAIR(CARD_PULL_CTL5, 0x55),
0231     RTSX_REG_PAIR(CARD_PULL_CTL6, 0x15),
0232     0,
0233 };
0234
0235 /* MS Pull Control Disable:
0236  *     MS CD       ==> pull up
0237  *     others      ==> pull down
0238  */
0239 static const u32 rts5209_ms_pull_ctl_disable_tbl[] = {
0240     RTSX_REG_PAIR(CARD_PULL_CTL4, 0x55),
0241     RTSX_REG_PAIR(CARD_PULL_CTL5, 0x55),
0242     RTSX_REG_PAIR(CARD_PULL_CTL6, 0x15),
0243     0,
0244 };
0245
0246 void rts5209_init_params(struct rtsx_pcr *pcr)
0247 {
0248     pcr->extra_caps = EXTRA_CAPS_SD_SDR50 |
0249         EXTRA_CAPS_SD_SDR104 | EXTRA_CAPS_MMC_8BIT;
0250     pcr->num_slots = 2;
0251     pcr->ops = &rts5209_pcr_ops;
0252
0253     pcr->flags = 0;
0254     pcr->card_drive_sel = RTS5209_CARD_DRIVE_DEFAULT;
0255     pcr->sd30_drive_sel_1v8 = DRIVER_TYPE_B;
0256     pcr->sd30_drive_sel_3v3 = DRIVER_TYPE_D;
0257     pcr->aspm_en = ASPM_L1_EN;
0258     pcr->aspm_mode = ASPM_MODE_CFG;
0259     pcr->tx_initial_phase = SET_CLOCK_PHASE(27, 27, 16);
0260     pcr->rx_initial_phase = SET_CLOCK_PHASE(24, 6, 5);
0261
0262     pcr->ic_version = rts5209_get_ic_version(pcr);
0263     pcr->sd_pull_ctl_enable_tbl = rts5209_sd_pull_ctl_enable_tbl;
0264     pcr->sd_pull_ctl_disable_tbl = rts5209_sd_pull_ctl_disable_tbl;
0265     pcr->ms_pull_ctl_enable_tbl = rts5209_ms_pull_ctl_enable_tbl;
0266     pcr->ms_pull_ctl_disable_tbl = rts5209_ms_pull_ctl_disable_tbl;
0267 }