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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * ad525x_dpot: Driver for the Analog Devices digital potentiometers
0004  * Copyright (c) 2009-2010 Analog Devices, Inc.
0005  * Author: Michael Hennerich <michael.hennerich@analog.com>
0006  *
0007  * DEVID        #Wipers     #Positions  Resistor Options (kOhm)
0008  * AD5258       1       64      1, 10, 50, 100
0009  * AD5259       1       256     5, 10, 50, 100
0010  * AD5251       2       64      1, 10, 50, 100
0011  * AD5252       2       256     1, 10, 50, 100
0012  * AD5255       3       512     25, 250
0013  * AD5253       4       64      1, 10, 50, 100
0014  * AD5254       4       256     1, 10, 50, 100
0015  * AD5160       1       256     5, 10, 50, 100
0016  * AD5161       1       256     5, 10, 50, 100
0017  * AD5162       2       256     2.5, 10, 50, 100
0018  * AD5165       1       256     100
0019  * AD5200       1       256     10, 50
0020  * AD5201       1       33      10, 50
0021  * AD5203       4       64      10, 100
0022  * AD5204       4       256     10, 50, 100
0023  * AD5206       6       256     10, 50, 100
0024  * AD5207       2       256     10, 50, 100
0025  * AD5231       1       1024        10, 50, 100
0026  * AD5232       2       256     10, 50, 100
0027  * AD5233       4       64      10, 50, 100
0028  * AD5235       2       1024        25, 250
0029  * AD5260       1       256     20, 50, 200
0030  * AD5262       2       256     20, 50, 200
0031  * AD5263       4       256     20, 50, 200
0032  * AD5290       1       256     10, 50, 100
0033  * AD5291       1       256     20, 50, 100  (20-TP)
0034  * AD5292       1       1024        20, 50, 100  (20-TP)
0035  * AD5293       1       1024        20, 50, 100
0036  * AD7376       1       128     10, 50, 100, 1M
0037  * AD8400       1       256     1, 10, 50, 100
0038  * AD8402       2       256     1, 10, 50, 100
0039  * AD8403       4       256     1, 10, 50, 100
0040  * ADN2850      3       512     25, 250
0041  * AD5241       1       256     10, 100, 1M
0042  * AD5246       1       128     5, 10, 50, 100
0043  * AD5247       1       128     5, 10, 50, 100
0044  * AD5245       1       256     5, 10, 50, 100
0045  * AD5243       2       256     2.5, 10, 50, 100
0046  * AD5248       2       256     2.5, 10, 50, 100
0047  * AD5242       2       256     20, 50, 200
0048  * AD5280       1       256     20, 50, 200
0049  * AD5282       2       256     20, 50, 200
0050  * ADN2860      3       512     25, 250
0051  * AD5273       1       64      1, 10, 50, 100 (OTP)
0052  * AD5171       1       64      5, 10, 50, 100 (OTP)
0053  * AD5170       1       256     2.5, 10, 50, 100 (OTP)
0054  * AD5172       2       256     2.5, 10, 50, 100 (OTP)
0055  * AD5173       2       256     2.5, 10, 50, 100 (OTP)
0056  * AD5270       1       1024        20, 50, 100 (50-TP)
0057  * AD5271       1       256     20, 50, 100 (50-TP)
0058  * AD5272       1       1024        20, 50, 100 (50-TP)
0059  * AD5274       1       256     20, 50, 100 (50-TP)
0060  *
0061  * See Documentation/misc-devices/ad525x_dpot.rst for more info.
0062  *
0063  * derived from ad5258.c
0064  * Copyright (c) 2009 Cyber Switching, Inc.
0065  * Author: Chris Verges <chrisv@cyberswitching.com>
0066  *
0067  * derived from ad5252.c
0068  * Copyright (c) 2006-2011 Michael Hennerich <michael.hennerich@analog.com>
0069  */
0070 
0071 #include <linux/module.h>
0072 #include <linux/device.h>
0073 #include <linux/kernel.h>
0074 #include <linux/delay.h>
0075 #include <linux/slab.h>
0076 
0077 #include "ad525x_dpot.h"
0078 
0079 /*
0080  * Client data (each client gets its own)
0081  */
0082 
0083 struct dpot_data {
0084     struct ad_dpot_bus_data bdata;
0085     struct mutex update_lock;
0086     unsigned int rdac_mask;
0087     unsigned int max_pos;
0088     unsigned long devid;
0089     unsigned int uid;
0090     unsigned int feat;
0091     unsigned int wipers;
0092     u16 rdac_cache[MAX_RDACS];
0093     DECLARE_BITMAP(otp_en_mask, MAX_RDACS);
0094 };
0095 
0096 static inline int dpot_read_d8(struct dpot_data *dpot)
0097 {
0098     return dpot->bdata.bops->read_d8(dpot->bdata.client);
0099 }
0100 
0101 static inline int dpot_read_r8d8(struct dpot_data *dpot, u8 reg)
0102 {
0103     return dpot->bdata.bops->read_r8d8(dpot->bdata.client, reg);
0104 }
0105 
0106 static inline int dpot_read_r8d16(struct dpot_data *dpot, u8 reg)
0107 {
0108     return dpot->bdata.bops->read_r8d16(dpot->bdata.client, reg);
0109 }
0110 
0111 static inline int dpot_write_d8(struct dpot_data *dpot, u8 val)
0112 {
0113     return dpot->bdata.bops->write_d8(dpot->bdata.client, val);
0114 }
0115 
0116 static inline int dpot_write_r8d8(struct dpot_data *dpot, u8 reg, u16 val)
0117 {
0118     return dpot->bdata.bops->write_r8d8(dpot->bdata.client, reg, val);
0119 }
0120 
0121 static inline int dpot_write_r8d16(struct dpot_data *dpot, u8 reg, u16 val)
0122 {
0123     return dpot->bdata.bops->write_r8d16(dpot->bdata.client, reg, val);
0124 }
0125 
0126 static s32 dpot_read_spi(struct dpot_data *dpot, u8 reg)
0127 {
0128     unsigned int ctrl = 0;
0129     int value;
0130 
0131     if (!(reg & (DPOT_ADDR_EEPROM | DPOT_ADDR_CMD))) {
0132 
0133         if (dpot->feat & F_RDACS_WONLY)
0134             return dpot->rdac_cache[reg & DPOT_RDAC_MASK];
0135         if (dpot->uid == DPOT_UID(AD5291_ID) ||
0136             dpot->uid == DPOT_UID(AD5292_ID) ||
0137             dpot->uid == DPOT_UID(AD5293_ID)) {
0138 
0139             value = dpot_read_r8d8(dpot,
0140                 DPOT_AD5291_READ_RDAC << 2);
0141 
0142             if (value < 0)
0143                 return value;
0144 
0145             if (dpot->uid == DPOT_UID(AD5291_ID))
0146                 value = value >> 2;
0147 
0148             return value;
0149         } else if (dpot->uid == DPOT_UID(AD5270_ID) ||
0150             dpot->uid == DPOT_UID(AD5271_ID)) {
0151 
0152             value = dpot_read_r8d8(dpot,
0153                 DPOT_AD5270_1_2_4_READ_RDAC << 2);
0154 
0155             if (value < 0)
0156                 return value;
0157 
0158             if (dpot->uid == DPOT_UID(AD5271_ID))
0159                 value = value >> 2;
0160 
0161             return value;
0162         }
0163 
0164         ctrl = DPOT_SPI_READ_RDAC;
0165     } else if (reg & DPOT_ADDR_EEPROM) {
0166         ctrl = DPOT_SPI_READ_EEPROM;
0167     }
0168 
0169     if (dpot->feat & F_SPI_16BIT)
0170         return dpot_read_r8d8(dpot, ctrl);
0171     else if (dpot->feat & F_SPI_24BIT)
0172         return dpot_read_r8d16(dpot, ctrl);
0173 
0174     return -EFAULT;
0175 }
0176 
0177 static s32 dpot_read_i2c(struct dpot_data *dpot, u8 reg)
0178 {
0179     int value;
0180     unsigned int ctrl = 0;
0181 
0182     switch (dpot->uid) {
0183     case DPOT_UID(AD5246_ID):
0184     case DPOT_UID(AD5247_ID):
0185         return dpot_read_d8(dpot);
0186     case DPOT_UID(AD5245_ID):
0187     case DPOT_UID(AD5241_ID):
0188     case DPOT_UID(AD5242_ID):
0189     case DPOT_UID(AD5243_ID):
0190     case DPOT_UID(AD5248_ID):
0191     case DPOT_UID(AD5280_ID):
0192     case DPOT_UID(AD5282_ID):
0193         ctrl = ((reg & DPOT_RDAC_MASK) == DPOT_RDAC0) ?
0194             0 : DPOT_AD5282_RDAC_AB;
0195         return dpot_read_r8d8(dpot, ctrl);
0196     case DPOT_UID(AD5170_ID):
0197     case DPOT_UID(AD5171_ID):
0198     case DPOT_UID(AD5273_ID):
0199             return dpot_read_d8(dpot);
0200     case DPOT_UID(AD5172_ID):
0201     case DPOT_UID(AD5173_ID):
0202         ctrl = ((reg & DPOT_RDAC_MASK) == DPOT_RDAC0) ?
0203             0 : DPOT_AD5172_3_A0;
0204         return dpot_read_r8d8(dpot, ctrl);
0205     case DPOT_UID(AD5272_ID):
0206     case DPOT_UID(AD5274_ID):
0207         dpot_write_r8d8(dpot,
0208                 (DPOT_AD5270_1_2_4_READ_RDAC << 2), 0);
0209 
0210         value = dpot_read_r8d16(dpot, DPOT_AD5270_1_2_4_RDAC << 2);
0211         if (value < 0)
0212             return value;
0213         /*
0214          * AD5272/AD5274 returns high byte first, however
0215          * underling smbus expects low byte first.
0216          */
0217         value = swab16(value);
0218 
0219         if (dpot->uid == DPOT_UID(AD5274_ID))
0220             value = value >> 2;
0221         return value;
0222     default:
0223         if ((reg & DPOT_REG_TOL) || (dpot->max_pos > 256))
0224             return dpot_read_r8d16(dpot, (reg & 0xF8) |
0225                     ((reg & 0x7) << 1));
0226         else
0227             return dpot_read_r8d8(dpot, reg);
0228     }
0229 }
0230 
0231 static s32 dpot_read(struct dpot_data *dpot, u8 reg)
0232 {
0233     if (dpot->feat & F_SPI)
0234         return dpot_read_spi(dpot, reg);
0235     else
0236         return dpot_read_i2c(dpot, reg);
0237 }
0238 
0239 static s32 dpot_write_spi(struct dpot_data *dpot, u8 reg, u16 value)
0240 {
0241     unsigned int val = 0;
0242 
0243     if (!(reg & (DPOT_ADDR_EEPROM | DPOT_ADDR_CMD | DPOT_ADDR_OTP))) {
0244         if (dpot->feat & F_RDACS_WONLY)
0245             dpot->rdac_cache[reg & DPOT_RDAC_MASK] = value;
0246 
0247         if (dpot->feat & F_AD_APPDATA) {
0248             if (dpot->feat & F_SPI_8BIT) {
0249                 val = ((reg & DPOT_RDAC_MASK) <<
0250                     DPOT_MAX_POS(dpot->devid)) |
0251                     value;
0252                 return dpot_write_d8(dpot, val);
0253             } else if (dpot->feat & F_SPI_16BIT) {
0254                 val = ((reg & DPOT_RDAC_MASK) <<
0255                     DPOT_MAX_POS(dpot->devid)) |
0256                     value;
0257                 return dpot_write_r8d8(dpot, val >> 8,
0258                     val & 0xFF);
0259             } else
0260                 BUG();
0261         } else {
0262             if (dpot->uid == DPOT_UID(AD5291_ID) ||
0263                 dpot->uid == DPOT_UID(AD5292_ID) ||
0264                 dpot->uid == DPOT_UID(AD5293_ID)) {
0265 
0266                 dpot_write_r8d8(dpot, DPOT_AD5291_CTRLREG << 2,
0267                         DPOT_AD5291_UNLOCK_CMD);
0268 
0269                 if (dpot->uid == DPOT_UID(AD5291_ID))
0270                     value = value << 2;
0271 
0272                 return dpot_write_r8d8(dpot,
0273                     (DPOT_AD5291_RDAC << 2) |
0274                     (value >> 8), value & 0xFF);
0275             } else if (dpot->uid == DPOT_UID(AD5270_ID) ||
0276                 dpot->uid == DPOT_UID(AD5271_ID)) {
0277                 dpot_write_r8d8(dpot,
0278                         DPOT_AD5270_1_2_4_CTRLREG << 2,
0279                         DPOT_AD5270_1_2_4_UNLOCK_CMD);
0280 
0281                 if (dpot->uid == DPOT_UID(AD5271_ID))
0282                     value = value << 2;
0283 
0284                 return dpot_write_r8d8(dpot,
0285                     (DPOT_AD5270_1_2_4_RDAC << 2) |
0286                     (value >> 8), value & 0xFF);
0287             }
0288             val = DPOT_SPI_RDAC | (reg & DPOT_RDAC_MASK);
0289         }
0290     } else if (reg & DPOT_ADDR_EEPROM) {
0291         val = DPOT_SPI_EEPROM | (reg & DPOT_RDAC_MASK);
0292     } else if (reg & DPOT_ADDR_CMD) {
0293         switch (reg) {
0294         case DPOT_DEC_ALL_6DB:
0295             val = DPOT_SPI_DEC_ALL_6DB;
0296             break;
0297         case DPOT_INC_ALL_6DB:
0298             val = DPOT_SPI_INC_ALL_6DB;
0299             break;
0300         case DPOT_DEC_ALL:
0301             val = DPOT_SPI_DEC_ALL;
0302             break;
0303         case DPOT_INC_ALL:
0304             val = DPOT_SPI_INC_ALL;
0305             break;
0306         }
0307     } else if (reg & DPOT_ADDR_OTP) {
0308         if (dpot->uid == DPOT_UID(AD5291_ID) ||
0309             dpot->uid == DPOT_UID(AD5292_ID)) {
0310             return dpot_write_r8d8(dpot,
0311                 DPOT_AD5291_STORE_XTPM << 2, 0);
0312         } else if (dpot->uid == DPOT_UID(AD5270_ID) ||
0313             dpot->uid == DPOT_UID(AD5271_ID)) {
0314             return dpot_write_r8d8(dpot,
0315                 DPOT_AD5270_1_2_4_STORE_XTPM << 2, 0);
0316         }
0317     } else
0318         BUG();
0319 
0320     if (dpot->feat & F_SPI_16BIT)
0321         return dpot_write_r8d8(dpot, val, value);
0322     else if (dpot->feat & F_SPI_24BIT)
0323         return dpot_write_r8d16(dpot, val, value);
0324 
0325     return -EFAULT;
0326 }
0327 
0328 static s32 dpot_write_i2c(struct dpot_data *dpot, u8 reg, u16 value)
0329 {
0330     /* Only write the instruction byte for certain commands */
0331     unsigned int tmp = 0, ctrl = 0;
0332 
0333     switch (dpot->uid) {
0334     case DPOT_UID(AD5246_ID):
0335     case DPOT_UID(AD5247_ID):
0336         return dpot_write_d8(dpot, value);
0337 
0338     case DPOT_UID(AD5245_ID):
0339     case DPOT_UID(AD5241_ID):
0340     case DPOT_UID(AD5242_ID):
0341     case DPOT_UID(AD5243_ID):
0342     case DPOT_UID(AD5248_ID):
0343     case DPOT_UID(AD5280_ID):
0344     case DPOT_UID(AD5282_ID):
0345         ctrl = ((reg & DPOT_RDAC_MASK) == DPOT_RDAC0) ?
0346             0 : DPOT_AD5282_RDAC_AB;
0347         return dpot_write_r8d8(dpot, ctrl, value);
0348     case DPOT_UID(AD5171_ID):
0349     case DPOT_UID(AD5273_ID):
0350         if (reg & DPOT_ADDR_OTP) {
0351             tmp = dpot_read_d8(dpot);
0352             if (tmp >> 6) /* Ready to Program? */
0353                 return -EFAULT;
0354             ctrl = DPOT_AD5273_FUSE;
0355         }
0356         return dpot_write_r8d8(dpot, ctrl, value);
0357     case DPOT_UID(AD5172_ID):
0358     case DPOT_UID(AD5173_ID):
0359         ctrl = ((reg & DPOT_RDAC_MASK) == DPOT_RDAC0) ?
0360             0 : DPOT_AD5172_3_A0;
0361         if (reg & DPOT_ADDR_OTP) {
0362             tmp = dpot_read_r8d16(dpot, ctrl);
0363             if (tmp >> 14) /* Ready to Program? */
0364                 return -EFAULT;
0365             ctrl |= DPOT_AD5170_2_3_FUSE;
0366         }
0367         return dpot_write_r8d8(dpot, ctrl, value);
0368     case DPOT_UID(AD5170_ID):
0369         if (reg & DPOT_ADDR_OTP) {
0370             tmp = dpot_read_r8d16(dpot, tmp);
0371             if (tmp >> 14) /* Ready to Program? */
0372                 return -EFAULT;
0373             ctrl = DPOT_AD5170_2_3_FUSE;
0374         }
0375         return dpot_write_r8d8(dpot, ctrl, value);
0376     case DPOT_UID(AD5272_ID):
0377     case DPOT_UID(AD5274_ID):
0378         dpot_write_r8d8(dpot, DPOT_AD5270_1_2_4_CTRLREG << 2,
0379                 DPOT_AD5270_1_2_4_UNLOCK_CMD);
0380 
0381         if (reg & DPOT_ADDR_OTP)
0382             return dpot_write_r8d8(dpot,
0383                     DPOT_AD5270_1_2_4_STORE_XTPM << 2, 0);
0384 
0385         if (dpot->uid == DPOT_UID(AD5274_ID))
0386             value = value << 2;
0387 
0388         return dpot_write_r8d8(dpot, (DPOT_AD5270_1_2_4_RDAC << 2) |
0389                        (value >> 8), value & 0xFF);
0390     default:
0391         if (reg & DPOT_ADDR_CMD)
0392             return dpot_write_d8(dpot, reg);
0393 
0394         if (dpot->max_pos > 256)
0395             return dpot_write_r8d16(dpot, (reg & 0xF8) |
0396                         ((reg & 0x7) << 1), value);
0397         else
0398             /* All other registers require instruction + data bytes */
0399             return dpot_write_r8d8(dpot, reg, value);
0400     }
0401 }
0402 
0403 static s32 dpot_write(struct dpot_data *dpot, u8 reg, u16 value)
0404 {
0405     if (dpot->feat & F_SPI)
0406         return dpot_write_spi(dpot, reg, value);
0407     else
0408         return dpot_write_i2c(dpot, reg, value);
0409 }
0410 
0411 /* sysfs functions */
0412 
0413 static ssize_t sysfs_show_reg(struct device *dev,
0414                   struct device_attribute *attr,
0415                   char *buf, u32 reg)
0416 {
0417     struct dpot_data *data = dev_get_drvdata(dev);
0418     s32 value;
0419 
0420     if (reg & DPOT_ADDR_OTP_EN)
0421         return sprintf(buf, "%s\n",
0422             test_bit(DPOT_RDAC_MASK & reg, data->otp_en_mask) ?
0423             "enabled" : "disabled");
0424 
0425 
0426     mutex_lock(&data->update_lock);
0427     value = dpot_read(data, reg);
0428     mutex_unlock(&data->update_lock);
0429 
0430     if (value < 0)
0431         return -EINVAL;
0432     /*
0433      * Let someone else deal with converting this ...
0434      * the tolerance is a two-byte value where the MSB
0435      * is a sign + integer value, and the LSB is a
0436      * decimal value.  See page 18 of the AD5258
0437      * datasheet (Rev. A) for more details.
0438      */
0439 
0440     if (reg & DPOT_REG_TOL)
0441         return sprintf(buf, "0x%04x\n", value & 0xFFFF);
0442     else
0443         return sprintf(buf, "%u\n", value & data->rdac_mask);
0444 }
0445 
0446 static ssize_t sysfs_set_reg(struct device *dev,
0447                  struct device_attribute *attr,
0448                  const char *buf, size_t count, u32 reg)
0449 {
0450     struct dpot_data *data = dev_get_drvdata(dev);
0451     unsigned long value;
0452     int err;
0453 
0454     if (reg & DPOT_ADDR_OTP_EN) {
0455         if (sysfs_streq(buf, "enabled"))
0456             set_bit(DPOT_RDAC_MASK & reg, data->otp_en_mask);
0457         else
0458             clear_bit(DPOT_RDAC_MASK & reg, data->otp_en_mask);
0459 
0460         return count;
0461     }
0462 
0463     if ((reg & DPOT_ADDR_OTP) &&
0464         !test_bit(DPOT_RDAC_MASK & reg, data->otp_en_mask))
0465         return -EPERM;
0466 
0467     err = kstrtoul(buf, 10, &value);
0468     if (err)
0469         return err;
0470 
0471     if (value > data->rdac_mask)
0472         value = data->rdac_mask;
0473 
0474     mutex_lock(&data->update_lock);
0475     dpot_write(data, reg, value);
0476     if (reg & DPOT_ADDR_EEPROM)
0477         msleep(26); /* Sleep while the EEPROM updates */
0478     else if (reg & DPOT_ADDR_OTP)
0479         msleep(400);    /* Sleep while the OTP updates */
0480     mutex_unlock(&data->update_lock);
0481 
0482     return count;
0483 }
0484 
0485 static ssize_t sysfs_do_cmd(struct device *dev,
0486                 struct device_attribute *attr,
0487                 const char *buf, size_t count, u32 reg)
0488 {
0489     struct dpot_data *data = dev_get_drvdata(dev);
0490 
0491     mutex_lock(&data->update_lock);
0492     dpot_write(data, reg, 0);
0493     mutex_unlock(&data->update_lock);
0494 
0495     return count;
0496 }
0497 
0498 /* ------------------------------------------------------------------------- */
0499 
0500 #define DPOT_DEVICE_SHOW(_name, _reg) static ssize_t \
0501 show_##_name(struct device *dev, \
0502               struct device_attribute *attr, char *buf) \
0503 { \
0504     return sysfs_show_reg(dev, attr, buf, _reg); \
0505 }
0506 
0507 #define DPOT_DEVICE_SET(_name, _reg) static ssize_t \
0508 set_##_name(struct device *dev, \
0509              struct device_attribute *attr, \
0510              const char *buf, size_t count) \
0511 { \
0512     return sysfs_set_reg(dev, attr, buf, count, _reg); \
0513 }
0514 
0515 #define DPOT_DEVICE_SHOW_SET(name, reg) \
0516 DPOT_DEVICE_SHOW(name, reg) \
0517 DPOT_DEVICE_SET(name, reg) \
0518 static DEVICE_ATTR(name, S_IWUSR | S_IRUGO, show_##name, set_##name)
0519 
0520 #define DPOT_DEVICE_SHOW_ONLY(name, reg) \
0521 DPOT_DEVICE_SHOW(name, reg) \
0522 static DEVICE_ATTR(name, S_IWUSR | S_IRUGO, show_##name, NULL)
0523 
0524 DPOT_DEVICE_SHOW_SET(rdac0, DPOT_ADDR_RDAC | DPOT_RDAC0);
0525 DPOT_DEVICE_SHOW_SET(eeprom0, DPOT_ADDR_EEPROM | DPOT_RDAC0);
0526 DPOT_DEVICE_SHOW_ONLY(tolerance0, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC0);
0527 DPOT_DEVICE_SHOW_SET(otp0, DPOT_ADDR_OTP | DPOT_RDAC0);
0528 DPOT_DEVICE_SHOW_SET(otp0en, DPOT_ADDR_OTP_EN | DPOT_RDAC0);
0529 
0530 DPOT_DEVICE_SHOW_SET(rdac1, DPOT_ADDR_RDAC | DPOT_RDAC1);
0531 DPOT_DEVICE_SHOW_SET(eeprom1, DPOT_ADDR_EEPROM | DPOT_RDAC1);
0532 DPOT_DEVICE_SHOW_ONLY(tolerance1, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC1);
0533 DPOT_DEVICE_SHOW_SET(otp1, DPOT_ADDR_OTP | DPOT_RDAC1);
0534 DPOT_DEVICE_SHOW_SET(otp1en, DPOT_ADDR_OTP_EN | DPOT_RDAC1);
0535 
0536 DPOT_DEVICE_SHOW_SET(rdac2, DPOT_ADDR_RDAC | DPOT_RDAC2);
0537 DPOT_DEVICE_SHOW_SET(eeprom2, DPOT_ADDR_EEPROM | DPOT_RDAC2);
0538 DPOT_DEVICE_SHOW_ONLY(tolerance2, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC2);
0539 DPOT_DEVICE_SHOW_SET(otp2, DPOT_ADDR_OTP | DPOT_RDAC2);
0540 DPOT_DEVICE_SHOW_SET(otp2en, DPOT_ADDR_OTP_EN | DPOT_RDAC2);
0541 
0542 DPOT_DEVICE_SHOW_SET(rdac3, DPOT_ADDR_RDAC | DPOT_RDAC3);
0543 DPOT_DEVICE_SHOW_SET(eeprom3, DPOT_ADDR_EEPROM | DPOT_RDAC3);
0544 DPOT_DEVICE_SHOW_ONLY(tolerance3, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC3);
0545 DPOT_DEVICE_SHOW_SET(otp3, DPOT_ADDR_OTP | DPOT_RDAC3);
0546 DPOT_DEVICE_SHOW_SET(otp3en, DPOT_ADDR_OTP_EN | DPOT_RDAC3);
0547 
0548 DPOT_DEVICE_SHOW_SET(rdac4, DPOT_ADDR_RDAC | DPOT_RDAC4);
0549 DPOT_DEVICE_SHOW_SET(eeprom4, DPOT_ADDR_EEPROM | DPOT_RDAC4);
0550 DPOT_DEVICE_SHOW_ONLY(tolerance4, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC4);
0551 DPOT_DEVICE_SHOW_SET(otp4, DPOT_ADDR_OTP | DPOT_RDAC4);
0552 DPOT_DEVICE_SHOW_SET(otp4en, DPOT_ADDR_OTP_EN | DPOT_RDAC4);
0553 
0554 DPOT_DEVICE_SHOW_SET(rdac5, DPOT_ADDR_RDAC | DPOT_RDAC5);
0555 DPOT_DEVICE_SHOW_SET(eeprom5, DPOT_ADDR_EEPROM | DPOT_RDAC5);
0556 DPOT_DEVICE_SHOW_ONLY(tolerance5, DPOT_ADDR_EEPROM | DPOT_TOL_RDAC5);
0557 DPOT_DEVICE_SHOW_SET(otp5, DPOT_ADDR_OTP | DPOT_RDAC5);
0558 DPOT_DEVICE_SHOW_SET(otp5en, DPOT_ADDR_OTP_EN | DPOT_RDAC5);
0559 
0560 static const struct attribute *dpot_attrib_wipers[] = {
0561     &dev_attr_rdac0.attr,
0562     &dev_attr_rdac1.attr,
0563     &dev_attr_rdac2.attr,
0564     &dev_attr_rdac3.attr,
0565     &dev_attr_rdac4.attr,
0566     &dev_attr_rdac5.attr,
0567     NULL
0568 };
0569 
0570 static const struct attribute *dpot_attrib_eeprom[] = {
0571     &dev_attr_eeprom0.attr,
0572     &dev_attr_eeprom1.attr,
0573     &dev_attr_eeprom2.attr,
0574     &dev_attr_eeprom3.attr,
0575     &dev_attr_eeprom4.attr,
0576     &dev_attr_eeprom5.attr,
0577     NULL
0578 };
0579 
0580 static const struct attribute *dpot_attrib_otp[] = {
0581     &dev_attr_otp0.attr,
0582     &dev_attr_otp1.attr,
0583     &dev_attr_otp2.attr,
0584     &dev_attr_otp3.attr,
0585     &dev_attr_otp4.attr,
0586     &dev_attr_otp5.attr,
0587     NULL
0588 };
0589 
0590 static const struct attribute *dpot_attrib_otp_en[] = {
0591     &dev_attr_otp0en.attr,
0592     &dev_attr_otp1en.attr,
0593     &dev_attr_otp2en.attr,
0594     &dev_attr_otp3en.attr,
0595     &dev_attr_otp4en.attr,
0596     &dev_attr_otp5en.attr,
0597     NULL
0598 };
0599 
0600 static const struct attribute *dpot_attrib_tolerance[] = {
0601     &dev_attr_tolerance0.attr,
0602     &dev_attr_tolerance1.attr,
0603     &dev_attr_tolerance2.attr,
0604     &dev_attr_tolerance3.attr,
0605     &dev_attr_tolerance4.attr,
0606     &dev_attr_tolerance5.attr,
0607     NULL
0608 };
0609 
0610 /* ------------------------------------------------------------------------- */
0611 
0612 #define DPOT_DEVICE_DO_CMD(_name, _cmd) static ssize_t \
0613 set_##_name(struct device *dev, \
0614              struct device_attribute *attr, \
0615              const char *buf, size_t count) \
0616 { \
0617     return sysfs_do_cmd(dev, attr, buf, count, _cmd); \
0618 } \
0619 static DEVICE_ATTR(_name, S_IWUSR | S_IRUGO, NULL, set_##_name)
0620 
0621 DPOT_DEVICE_DO_CMD(inc_all, DPOT_INC_ALL);
0622 DPOT_DEVICE_DO_CMD(dec_all, DPOT_DEC_ALL);
0623 DPOT_DEVICE_DO_CMD(inc_all_6db, DPOT_INC_ALL_6DB);
0624 DPOT_DEVICE_DO_CMD(dec_all_6db, DPOT_DEC_ALL_6DB);
0625 
0626 static struct attribute *ad525x_attributes_commands[] = {
0627     &dev_attr_inc_all.attr,
0628     &dev_attr_dec_all.attr,
0629     &dev_attr_inc_all_6db.attr,
0630     &dev_attr_dec_all_6db.attr,
0631     NULL
0632 };
0633 
0634 static const struct attribute_group ad525x_group_commands = {
0635     .attrs = ad525x_attributes_commands,
0636 };
0637 
0638 static int ad_dpot_add_files(struct device *dev,
0639         unsigned int features, unsigned int rdac)
0640 {
0641     int err = sysfs_create_file(&dev->kobj,
0642         dpot_attrib_wipers[rdac]);
0643     if (features & F_CMD_EEP)
0644         err |= sysfs_create_file(&dev->kobj,
0645             dpot_attrib_eeprom[rdac]);
0646     if (features & F_CMD_TOL)
0647         err |= sysfs_create_file(&dev->kobj,
0648             dpot_attrib_tolerance[rdac]);
0649     if (features & F_CMD_OTP) {
0650         err |= sysfs_create_file(&dev->kobj,
0651             dpot_attrib_otp_en[rdac]);
0652         err |= sysfs_create_file(&dev->kobj,
0653             dpot_attrib_otp[rdac]);
0654     }
0655 
0656     if (err)
0657         dev_err(dev, "failed to register sysfs hooks for RDAC%d\n",
0658             rdac);
0659 
0660     return err;
0661 }
0662 
0663 static inline void ad_dpot_remove_files(struct device *dev,
0664         unsigned int features, unsigned int rdac)
0665 {
0666     sysfs_remove_file(&dev->kobj,
0667         dpot_attrib_wipers[rdac]);
0668     if (features & F_CMD_EEP)
0669         sysfs_remove_file(&dev->kobj,
0670             dpot_attrib_eeprom[rdac]);
0671     if (features & F_CMD_TOL)
0672         sysfs_remove_file(&dev->kobj,
0673             dpot_attrib_tolerance[rdac]);
0674     if (features & F_CMD_OTP) {
0675         sysfs_remove_file(&dev->kobj,
0676             dpot_attrib_otp_en[rdac]);
0677         sysfs_remove_file(&dev->kobj,
0678             dpot_attrib_otp[rdac]);
0679     }
0680 }
0681 
0682 int ad_dpot_probe(struct device *dev,
0683         struct ad_dpot_bus_data *bdata, unsigned long devid,
0684                 const char *name)
0685 {
0686 
0687     struct dpot_data *data;
0688     int i, err = 0;
0689 
0690     data = kzalloc(sizeof(struct dpot_data), GFP_KERNEL);
0691     if (!data) {
0692         err = -ENOMEM;
0693         goto exit;
0694     }
0695 
0696     dev_set_drvdata(dev, data);
0697     mutex_init(&data->update_lock);
0698 
0699     data->bdata = *bdata;
0700     data->devid = devid;
0701 
0702     data->max_pos = 1 << DPOT_MAX_POS(devid);
0703     data->rdac_mask = data->max_pos - 1;
0704     data->feat = DPOT_FEAT(devid);
0705     data->uid = DPOT_UID(devid);
0706     data->wipers = DPOT_WIPERS(devid);
0707 
0708     for (i = DPOT_RDAC0; i < MAX_RDACS; i++)
0709         if (data->wipers & (1 << i)) {
0710             err = ad_dpot_add_files(dev, data->feat, i);
0711             if (err)
0712                 goto exit_remove_files;
0713             /* power-up midscale */
0714             if (data->feat & F_RDACS_WONLY)
0715                 data->rdac_cache[i] = data->max_pos / 2;
0716         }
0717 
0718     if (data->feat & F_CMD_INC)
0719         err = sysfs_create_group(&dev->kobj, &ad525x_group_commands);
0720 
0721     if (err) {
0722         dev_err(dev, "failed to register sysfs hooks\n");
0723         goto exit_free;
0724     }
0725 
0726     dev_info(dev, "%s %d-Position Digital Potentiometer registered\n",
0727          name, data->max_pos);
0728 
0729     return 0;
0730 
0731 exit_remove_files:
0732     for (i = DPOT_RDAC0; i < MAX_RDACS; i++)
0733         if (data->wipers & (1 << i))
0734             ad_dpot_remove_files(dev, data->feat, i);
0735 
0736 exit_free:
0737     kfree(data);
0738     dev_set_drvdata(dev, NULL);
0739 exit:
0740     dev_err(dev, "failed to create client for %s ID 0x%lX\n",
0741         name, devid);
0742     return err;
0743 }
0744 EXPORT_SYMBOL(ad_dpot_probe);
0745 
0746 void ad_dpot_remove(struct device *dev)
0747 {
0748     struct dpot_data *data = dev_get_drvdata(dev);
0749     int i;
0750 
0751     for (i = DPOT_RDAC0; i < MAX_RDACS; i++)
0752         if (data->wipers & (1 << i))
0753             ad_dpot_remove_files(dev, data->feat, i);
0754 
0755     kfree(data);
0756 }
0757 EXPORT_SYMBOL(ad_dpot_remove);
0758 
0759 
0760 MODULE_AUTHOR("Chris Verges <chrisv@cyberswitching.com>, "
0761           "Michael Hennerich <michael.hennerich@analog.com>");
0762 MODULE_DESCRIPTION("Digital potentiometer driver");
0763 MODULE_LICENSE("GPL");
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