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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * wm8350-regmap.c  --  Wolfson Microelectronics WM8350 register map
0004  *
0005  * This file splits out the tables describing the defaults and access
0006  * status of the WM8350 registers since they are rather large.
0007  *
0008  * Copyright 2007, 2008 Wolfson Microelectronics PLC.
0009  */
0010 
0011 #include <linux/mfd/wm8350/core.h>
0012 
0013 /*
0014  * Access masks.
0015  */
0016 
0017 static const struct wm8350_reg_access {
0018     u16 readable;       /* Mask of readable bits */
0019     u16 writable;       /* Mask of writable bits */
0020     u16 vol;        /* Mask of volatile bits */
0021 } wm8350_reg_io_map[] = {
0022     /*  read    write volatile */
0023     { 0xFFFF, 0xFFFF, 0x0000 }, /* R0   - Reset/ID */
0024     { 0x7CFF, 0x0C00, 0x0000 }, /* R1   - ID */
0025     { 0x007F, 0x0000, 0x0000 }, /* R2   - ROM Mask ID */
0026     { 0xBE3B, 0xBE3B, 0x8000 }, /* R3   - System Control 1 */
0027     { 0xFEF7, 0xFEF7, 0xF800 }, /* R4   - System Control 2 */
0028     { 0x80FF, 0x80FF, 0x8000 }, /* R5   - System Hibernate */
0029     { 0xFB0E, 0xFB0E, 0x0000 }, /* R6   - Interface Control */
0030     { 0x0000, 0x0000, 0x0000 }, /* R7 */
0031     { 0xE537, 0xE537, 0xFFFF }, /* R8   - Power mgmt (1) */
0032     { 0x0FF3, 0x0FF3, 0xFFFF }, /* R9   - Power mgmt (2) */
0033     { 0x008F, 0x008F, 0xFFFF }, /* R10  - Power mgmt (3) */
0034     { 0x6D3C, 0x6D3C, 0xFFFF }, /* R11  - Power mgmt (4) */
0035     { 0x1F8F, 0x1F8F, 0xFFFF }, /* R12  - Power mgmt (5) */
0036     { 0x8F3F, 0x8F3F, 0xFFFF }, /* R13  - Power mgmt (6) */
0037     { 0x0003, 0x0003, 0xFFFF }, /* R14  - Power mgmt (7) */
0038     { 0x0000, 0x0000, 0x0000 }, /* R15 */
0039     { 0x7F7F, 0x7F7F, 0xFFFF }, /* R16  - RTC Seconds/Minutes */
0040     { 0x073F, 0x073F, 0xFFFF }, /* R17  - RTC Hours/Day */
0041     { 0x1F3F, 0x1F3F, 0xFFFF }, /* R18  - RTC Date/Month */
0042     { 0x3FFF, 0x00FF, 0xFFFF }, /* R19  - RTC Year */
0043     { 0x7F7F, 0x7F7F, 0x0000 }, /* R20  - Alarm Seconds/Minutes */
0044     { 0x0F3F, 0x0F3F, 0x0000 }, /* R21  - Alarm Hours/Day */
0045     { 0x1F3F, 0x1F3F, 0x0000 }, /* R22  - Alarm Date/Month */
0046     { 0xEF7F, 0xEA7F, 0xFFFF }, /* R23  - RTC Time Control */
0047     { 0x3BFF, 0x0000, 0xFFFF }, /* R24  - System Interrupts */
0048     { 0xFEE7, 0x0000, 0xFFFF }, /* R25  - Interrupt Status 1 */
0049     { 0x35FF, 0x0000, 0xFFFF }, /* R26  - Interrupt Status 2 */
0050     { 0x0F3F, 0x0000, 0xFFFF }, /* R27  - Power Up Interrupt Status */
0051     { 0x0F3F, 0x0000, 0xFFFF }, /* R28  - Under Voltage Interrupt status */
0052     { 0x8000, 0x0000, 0xFFFF }, /* R29  - Over Current Interrupt status */
0053     { 0x1FFF, 0x0000, 0xFFFF }, /* R30  - GPIO Interrupt Status */
0054     { 0xEF7F, 0x0000, 0xFFFF }, /* R31  - Comparator Interrupt Status */
0055     { 0x3FFF, 0x3FFF, 0x0000 }, /* R32  - System Interrupts Mask */
0056     { 0xFEE7, 0xFEE7, 0x0000 }, /* R33  - Interrupt Status 1 Mask */
0057     { 0xF5FF, 0xF5FF, 0x0000 }, /* R34  - Interrupt Status 2 Mask */
0058     { 0x0F3F, 0x0F3F, 0x0000 }, /* R35  - Power Up Interrupt Status Mask */
0059     { 0x0F3F, 0x0F3F, 0x0000 }, /* R36  - Under Voltage Int status Mask */
0060     { 0x8000, 0x8000, 0x0000 }, /* R37  - Over Current Int status Mask */
0061     { 0x1FFF, 0x1FFF, 0x0000 }, /* R38  - GPIO Interrupt Status Mask */
0062     { 0xEF7F, 0xEF7F, 0x0000 }, /* R39  - Comparator IntStatus Mask */
0063     { 0xC9F7, 0xC9F7, 0xFFFF }, /* R40  - Clock Control 1 */
0064     { 0x8001, 0x8001, 0x0000 }, /* R41  - Clock Control 2 */
0065     { 0xFFF7, 0xFFF7, 0xFFFF }, /* R42  - FLL Control 1 */
0066     { 0xFBFF, 0xFBFF, 0x0000 }, /* R43  - FLL Control 2 */
0067     { 0xFFFF, 0xFFFF, 0x0000 }, /* R44  - FLL Control 3 */
0068     { 0x0033, 0x0033, 0x0000 }, /* R45  - FLL Control 4 */
0069     { 0x0000, 0x0000, 0x0000 }, /* R46 */
0070     { 0x0000, 0x0000, 0x0000 }, /* R47 */
0071     { 0x3033, 0x3033, 0x0000 }, /* R48  - DAC Control */
0072     { 0x0000, 0x0000, 0x0000 }, /* R49 */
0073     { 0x81FF, 0x81FF, 0xFFFF }, /* R50  - DAC Digital Volume L */
0074     { 0x81FF, 0x81FF, 0xFFFF }, /* R51  - DAC Digital Volume R */
0075     { 0x0000, 0x0000, 0x0000 }, /* R52 */
0076     { 0x0FFF, 0x0FFF, 0xFFFF }, /* R53  - DAC LR Rate */
0077     { 0x0017, 0x0017, 0x0000 }, /* R54  - DAC Clock Control */
0078     { 0x0000, 0x0000, 0x0000 }, /* R55 */
0079     { 0x0000, 0x0000, 0x0000 }, /* R56 */
0080     { 0x0000, 0x0000, 0x0000 }, /* R57 */
0081     { 0x4000, 0x4000, 0x0000 }, /* R58  - DAC Mute */
0082     { 0x7000, 0x7000, 0x0000 }, /* R59  - DAC Mute Volume */
0083     { 0x3C00, 0x3C00, 0x0000 }, /* R60  - DAC Side */
0084     { 0x0000, 0x0000, 0x0000 }, /* R61 */
0085     { 0x0000, 0x0000, 0x0000 }, /* R62 */
0086     { 0x0000, 0x0000, 0x0000 }, /* R63 */
0087     { 0x8303, 0x8303, 0xFFFF }, /* R64  - ADC Control */
0088     { 0x0000, 0x0000, 0x0000 }, /* R65 */
0089     { 0x81FF, 0x81FF, 0xFFFF }, /* R66  - ADC Digital Volume L */
0090     { 0x81FF, 0x81FF, 0xFFFF }, /* R67  - ADC Digital Volume R */
0091     { 0x0FFF, 0x0FFF, 0x0000 }, /* R68  - ADC Divider */
0092     { 0x0000, 0x0000, 0x0000 }, /* R69 */
0093     { 0x0FFF, 0x0FFF, 0xFFFF }, /* R70  - ADC LR Rate */
0094     { 0x0000, 0x0000, 0x0000 }, /* R71 */
0095     { 0x0707, 0x0707, 0xFFFF }, /* R72  - Input Control */
0096     { 0xC0C0, 0xC0C0, 0xFFFF }, /* R73  - IN3 Input Control */
0097     { 0xC09F, 0xC09F, 0xFFFF }, /* R74  - Mic Bias Control */
0098     { 0x0000, 0x0000, 0x0000 }, /* R75 */
0099     { 0x0F15, 0x0F15, 0xFFFF }, /* R76  - Output Control */
0100     { 0xC000, 0xC000, 0xFFFF }, /* R77  - Jack Detect */
0101     { 0x03FF, 0x03FF, 0x0000 }, /* R78  - Anti Pop Control */
0102     { 0x0000, 0x0000, 0x0000 }, /* R79 */
0103     { 0xE1FC, 0xE1FC, 0x8000 }, /* R80  - Left Input Volume */
0104     { 0xE1FC, 0xE1FC, 0x8000 }, /* R81  - Right Input Volume */
0105     { 0x0000, 0x0000, 0x0000 }, /* R82 */
0106     { 0x0000, 0x0000, 0x0000 }, /* R83 */
0107     { 0x0000, 0x0000, 0x0000 }, /* R84 */
0108     { 0x0000, 0x0000, 0x0000 }, /* R85 */
0109     { 0x0000, 0x0000, 0x0000 }, /* R86 */
0110     { 0x0000, 0x0000, 0x0000 }, /* R87 */
0111     { 0x9807, 0x9807, 0xFFFF }, /* R88  - Left Mixer Control */
0112     { 0x980B, 0x980B, 0xFFFF }, /* R89  - Right Mixer Control */
0113     { 0x0000, 0x0000, 0x0000 }, /* R90 */
0114     { 0x0000, 0x0000, 0x0000 }, /* R91 */
0115     { 0x8909, 0x8909, 0xFFFF }, /* R92  - OUT3 Mixer Control */
0116     { 0x9E07, 0x9E07, 0xFFFF }, /* R93  - OUT4 Mixer Control */
0117     { 0x0000, 0x0000, 0x0000 }, /* R94 */
0118     { 0x0000, 0x0000, 0x0000 }, /* R95 */
0119     { 0x0EEE, 0x0EEE, 0x0000 }, /* R96  - Output Left Mixer Volume */
0120     { 0xE0EE, 0xE0EE, 0x0000 }, /* R97  - Output Right Mixer Volume */
0121     { 0x0E0F, 0x0E0F, 0x0000 }, /* R98  - Input Mixer Volume L */
0122     { 0xE0E1, 0xE0E1, 0x0000 }, /* R99  - Input Mixer Volume R */
0123     { 0x800E, 0x800E, 0x0000 }, /* R100 - Input Mixer Volume */
0124     { 0x0000, 0x0000, 0x0000 }, /* R101 */
0125     { 0x0000, 0x0000, 0x0000 }, /* R102 */
0126     { 0x0000, 0x0000, 0x0000 }, /* R103 */
0127     { 0xE1FC, 0xE1FC, 0xFFFF }, /* R104 - LOUT1 Volume */
0128     { 0xE1FC, 0xE1FC, 0xFFFF }, /* R105 - ROUT1 Volume */
0129     { 0xE1FC, 0xE1FC, 0xFFFF }, /* R106 - LOUT2 Volume */
0130     { 0xE7FC, 0xE7FC, 0xFFFF }, /* R107 - ROUT2 Volume */
0131     { 0x0000, 0x0000, 0x0000 }, /* R108 */
0132     { 0x0000, 0x0000, 0x0000 }, /* R109 */
0133     { 0x0000, 0x0000, 0x0000 }, /* R110 */
0134     { 0x80E0, 0x80E0, 0xFFFF }, /* R111 - BEEP Volume */
0135     { 0xBF00, 0xBF00, 0x0000 }, /* R112 - AI Formating */
0136     { 0x00F1, 0x00F1, 0x0000 }, /* R113 - ADC DAC COMP */
0137     { 0x00F8, 0x00F8, 0x0000 }, /* R114 - AI ADC Control */
0138     { 0x40FB, 0x40FB, 0x0000 }, /* R115 - AI DAC Control */
0139     { 0x7C30, 0x7C30, 0x0000 }, /* R116 - AIF Test */
0140     { 0x0000, 0x0000, 0x0000 }, /* R117 */
0141     { 0x0000, 0x0000, 0x0000 }, /* R118 */
0142     { 0x0000, 0x0000, 0x0000 }, /* R119 */
0143     { 0x0000, 0x0000, 0x0000 }, /* R120 */
0144     { 0x0000, 0x0000, 0x0000 }, /* R121 */
0145     { 0x0000, 0x0000, 0x0000 }, /* R122 */
0146     { 0x0000, 0x0000, 0x0000 }, /* R123 */
0147     { 0x0000, 0x0000, 0x0000 }, /* R124 */
0148     { 0x0000, 0x0000, 0x0000 }, /* R125 */
0149     { 0x0000, 0x0000, 0x0000 }, /* R126 */
0150     { 0x0000, 0x0000, 0x0000 }, /* R127 */
0151     { 0x1FFF, 0x1FFF, 0x0000 }, /* R128 - GPIO Debounce */
0152     { 0x1FFF, 0x1FFF, 0x0000 }, /* R129 - GPIO Pin pull up Control */
0153     { 0x1FFF, 0x1FFF, 0x0000 }, /* R130 - GPIO Pull down Control */
0154     { 0x1FFF, 0x1FFF, 0x0000 }, /* R131 - GPIO Interrupt Mode */
0155     { 0x0000, 0x0000, 0x0000 }, /* R132 */
0156     { 0x00C0, 0x00C0, 0x0000 }, /* R133 - GPIO Control */
0157     { 0x1FFF, 0x1FFF, 0x0000 }, /* R134 - GPIO Configuration (i/o) */
0158     { 0x1FFF, 0x1FFF, 0x0000 }, /* R135 - GPIO Pin Polarity / Type */
0159     { 0x0000, 0x0000, 0x0000 }, /* R136 */
0160     { 0x0000, 0x0000, 0x0000 }, /* R137 */
0161     { 0x0000, 0x0000, 0x0000 }, /* R138 */
0162     { 0x0000, 0x0000, 0x0000 }, /* R139 */
0163     { 0xFFFF, 0xFFFF, 0x0000 }, /* R140 - GPIO Function Select 1 */
0164     { 0xFFFF, 0xFFFF, 0x0000 }, /* R141 - GPIO Function Select 2 */
0165     { 0xFFFF, 0xFFFF, 0x0000 }, /* R142 - GPIO Function Select 3 */
0166     { 0x000F, 0x000F, 0x0000 }, /* R143 - GPIO Function Select 4 */
0167     { 0xF0FF, 0xF0FF, 0xA000 }, /* R144 - Digitiser Control (1) */
0168     { 0x3707, 0x3707, 0x0000 }, /* R145 - Digitiser Control (2) */
0169     { 0x0000, 0x0000, 0x0000 }, /* R146 */
0170     { 0x0000, 0x0000, 0x0000 }, /* R147 */
0171     { 0x0000, 0x0000, 0x0000 }, /* R148 */
0172     { 0x0000, 0x0000, 0x0000 }, /* R149 */
0173     { 0x0000, 0x0000, 0x0000 }, /* R150 */
0174     { 0x0000, 0x0000, 0x0000 }, /* R151 */
0175     { 0x7FFF, 0x7000, 0xFFFF }, /* R152 - AUX1 Readback */
0176     { 0x7FFF, 0x7000, 0xFFFF }, /* R153 - AUX2 Readback */
0177     { 0x7FFF, 0x7000, 0xFFFF }, /* R154 - AUX3 Readback */
0178     { 0x7FFF, 0x7000, 0xFFFF }, /* R155 - AUX4 Readback */
0179     { 0x0FFF, 0x0000, 0xFFFF }, /* R156 - USB Voltage Readback */
0180     { 0x0FFF, 0x0000, 0xFFFF }, /* R157 - LINE Voltage Readback */
0181     { 0x0FFF, 0x0000, 0xFFFF }, /* R158 - BATT Voltage Readback */
0182     { 0x0FFF, 0x0000, 0xFFFF }, /* R159 - Chip Temp Readback */
0183     { 0x0000, 0x0000, 0x0000 }, /* R160 */
0184     { 0x0000, 0x0000, 0x0000 }, /* R161 */
0185     { 0x0000, 0x0000, 0x0000 }, /* R162 */
0186     { 0x000F, 0x000F, 0x0000 }, /* R163 - Generic Comparator Control */
0187     { 0xFFFF, 0xFFFF, 0x0000 }, /* R164 - Generic comparator 1 */
0188     { 0xFFFF, 0xFFFF, 0x0000 }, /* R165 - Generic comparator 2 */
0189     { 0xFFFF, 0xFFFF, 0x0000 }, /* R166 - Generic comparator 3 */
0190     { 0xFFFF, 0xFFFF, 0x0000 }, /* R167 - Generic comparator 4 */
0191     { 0xBFFF, 0xBFFF, 0x8000 }, /* R168 - Battery Charger Control 1 */
0192     { 0xFFFF, 0x4FFF, 0xB000 }, /* R169 - Battery Charger Control 2 */
0193     { 0x007F, 0x007F, 0x0000 }, /* R170 - Battery Charger Control 3 */
0194     { 0x0000, 0x0000, 0x0000 }, /* R171 */
0195     { 0x903F, 0x903F, 0xFFFF }, /* R172 - Current Sink Driver A */
0196     { 0xE333, 0xE333, 0xFFFF }, /* R173 - CSA Flash control */
0197     { 0x903F, 0x903F, 0xFFFF }, /* R174 - Current Sink Driver B */
0198     { 0xE333, 0xE333, 0xFFFF }, /* R175 - CSB Flash control */
0199     { 0x8F3F, 0x8F3F, 0xFFFF }, /* R176 - DCDC/LDO requested */
0200     { 0x332D, 0x332D, 0x0000 }, /* R177 - DCDC Active options */
0201     { 0x002D, 0x002D, 0x0000 }, /* R178 - DCDC Sleep options */
0202     { 0x5177, 0x5177, 0x8000 }, /* R179 - Power-check comparator */
0203     { 0x047F, 0x047F, 0x0000 }, /* R180 - DCDC1 Control */
0204     { 0xFFC0, 0xFFC0, 0x0000 }, /* R181 - DCDC1 Timeouts */
0205     { 0x737F, 0x737F, 0x0000 }, /* R182 - DCDC1 Low Power */
0206     { 0x535B, 0x535B, 0x0000 }, /* R183 - DCDC2 Control */
0207     { 0xFFC0, 0xFFC0, 0x0000 }, /* R184 - DCDC2 Timeouts */
0208     { 0x0000, 0x0000, 0x0000 }, /* R185 */
0209     { 0x047F, 0x047F, 0x0000 }, /* R186 - DCDC3 Control */
0210     { 0xFFC0, 0xFFC0, 0x0000 }, /* R187 - DCDC3 Timeouts */
0211     { 0x737F, 0x737F, 0x0000 }, /* R188 - DCDC3 Low Power */
0212     { 0x047F, 0x047F, 0x0000 }, /* R189 - DCDC4 Control */
0213     { 0xFFC0, 0xFFC0, 0x0000 }, /* R190 - DCDC4 Timeouts */
0214     { 0x737F, 0x737F, 0x0000 }, /* R191 - DCDC4 Low Power */
0215     { 0x535B, 0x535B, 0x0000 }, /* R192 - DCDC5 Control */
0216     { 0xFFC0, 0xFFC0, 0x0000 }, /* R193 - DCDC5 Timeouts */
0217     { 0x0000, 0x0000, 0x0000 }, /* R194 */
0218     { 0x047F, 0x047F, 0x0000 }, /* R195 - DCDC6 Control */
0219     { 0xFFC0, 0xFFC0, 0x0000 }, /* R196 - DCDC6 Timeouts */
0220     { 0x737F, 0x737F, 0x0000 }, /* R197 - DCDC6 Low Power */
0221     { 0x0000, 0x0000, 0x0000 }, /* R198 */
0222     { 0xFFD3, 0xFFD3, 0x0000 }, /* R199 - Limit Switch Control */
0223     { 0x441F, 0x441F, 0x0000 }, /* R200 - LDO1 Control */
0224     { 0xFFC0, 0xFFC0, 0x0000 }, /* R201 - LDO1 Timeouts */
0225     { 0x331F, 0x331F, 0x0000 }, /* R202 - LDO1 Low Power */
0226     { 0x441F, 0x441F, 0x0000 }, /* R203 - LDO2 Control */
0227     { 0xFFC0, 0xFFC0, 0x0000 }, /* R204 - LDO2 Timeouts */
0228     { 0x331F, 0x331F, 0x0000 }, /* R205 - LDO2 Low Power */
0229     { 0x441F, 0x441F, 0x0000 }, /* R206 - LDO3 Control */
0230     { 0xFFC0, 0xFFC0, 0x0000 }, /* R207 - LDO3 Timeouts */
0231     { 0x331F, 0x331F, 0x0000 }, /* R208 - LDO3 Low Power */
0232     { 0x441F, 0x441F, 0x0000 }, /* R209 - LDO4 Control */
0233     { 0xFFC0, 0xFFC0, 0x0000 }, /* R210 - LDO4 Timeouts */
0234     { 0x331F, 0x331F, 0x0000 }, /* R211 - LDO4 Low Power */
0235     { 0x0000, 0x0000, 0x0000 }, /* R212 */
0236     { 0x0000, 0x0000, 0x0000 }, /* R213 */
0237     { 0x0000, 0x0000, 0x0000 }, /* R214 */
0238     { 0x8F3F, 0x8F3F, 0x0000 }, /* R215 - VCC_FAULT Masks */
0239     { 0xFF3F, 0xE03F, 0x0000 }, /* R216 - Main Bandgap Control */
0240     { 0xEF2F, 0xE02F, 0x0000 }, /* R217 - OSC Control */
0241     { 0xF3FF, 0xB3FF, 0xc000 }, /* R218 - RTC Tick Control */
0242     { 0xFFFF, 0xFFFF, 0x0000 }, /* R219 - Security */
0243     { 0x09FF, 0x01FF, 0x0000 }, /* R220 - RAM BIST 1 */
0244     { 0x0000, 0x0000, 0x0000 }, /* R221 */
0245     { 0xFFFF, 0xFFFF, 0xFFFF }, /* R222 */
0246     { 0xFFFF, 0xFFFF, 0xFFFF }, /* R223 */
0247     { 0x0000, 0x0000, 0x0000 }, /* R224 */
0248     { 0x8F3F, 0x0000, 0xFFFF }, /* R225 - DCDC/LDO status */
0249     { 0x0000, 0x0000, 0xFFFF }, /* R226 - Charger status */
0250     { 0x34FE, 0x0000, 0xFFFF }, /* R227 */
0251     { 0x0000, 0x0000, 0x0000 }, /* R228 */
0252     { 0x0000, 0x0000, 0x0000 }, /* R229 */
0253     { 0xFFFF, 0x1FFF, 0xFFFF }, /* R230 - GPIO Pin Status */
0254     { 0xFFFF, 0x1FFF, 0xFFFF }, /* R231 */
0255     { 0xFFFF, 0x1FFF, 0xFFFF }, /* R232 */
0256     { 0xFFFF, 0x1FFF, 0xFFFF }, /* R233 */
0257     { 0x0000, 0x0000, 0x0000 }, /* R234 */
0258     { 0x0000, 0x0000, 0x0000 }, /* R235 */
0259     { 0x0000, 0x0000, 0x0000 }, /* R236 */
0260     { 0x0000, 0x0000, 0x0000 }, /* R237 */
0261     { 0x0000, 0x0000, 0x0000 }, /* R238 */
0262     { 0x0000, 0x0000, 0x0000 }, /* R239 */
0263     { 0x0000, 0x0000, 0x0000 }, /* R240 */
0264     { 0x0000, 0x0000, 0x0000 }, /* R241 */
0265     { 0x0000, 0x0000, 0x0000 }, /* R242 */
0266     { 0x0000, 0x0000, 0x0000 }, /* R243 */
0267     { 0x0000, 0x0000, 0x0000 }, /* R244 */
0268     { 0x0000, 0x0000, 0x0000 }, /* R245 */
0269     { 0x0000, 0x0000, 0x0000 }, /* R246 */
0270     { 0x0000, 0x0000, 0x0000 }, /* R247 */
0271     { 0xFFFF, 0x0010, 0xFFFF }, /* R248 */
0272     { 0x0000, 0x0000, 0x0000 }, /* R249 */
0273     { 0xFFFF, 0x0010, 0xFFFF }, /* R250 */
0274     { 0xFFFF, 0x0010, 0xFFFF }, /* R251 */
0275     { 0x0000, 0x0000, 0x0000 }, /* R252 */
0276     { 0xFFFF, 0x0010, 0xFFFF }, /* R253 */
0277     { 0x0000, 0x0000, 0x0000 }, /* R254 */
0278     { 0x0000, 0x0000, 0x0000 }, /* R255 */
0279 };
0280 
0281 static bool wm8350_readable(struct device *dev, unsigned int reg)
0282 {
0283     return wm8350_reg_io_map[reg].readable;
0284 }
0285 
0286 static bool wm8350_writeable(struct device *dev, unsigned int reg)
0287 {
0288     struct wm8350 *wm8350 = dev_get_drvdata(dev);
0289 
0290     if (!wm8350->unlocked) {
0291         if ((reg >= WM8350_GPIO_FUNCTION_SELECT_1 &&
0292              reg <= WM8350_GPIO_FUNCTION_SELECT_4) ||
0293             (reg >= WM8350_BATTERY_CHARGER_CONTROL_1 &&
0294              reg <= WM8350_BATTERY_CHARGER_CONTROL_3))
0295             return false;
0296     }
0297 
0298     return wm8350_reg_io_map[reg].writable;
0299 }
0300 
0301 static bool wm8350_volatile(struct device *dev, unsigned int reg)
0302 {
0303     return wm8350_reg_io_map[reg].vol;
0304 }
0305 
0306 static bool wm8350_precious(struct device *dev, unsigned int reg)
0307 {
0308     switch (reg) {
0309     case WM8350_SYSTEM_INTERRUPTS:
0310     case WM8350_INT_STATUS_1:
0311     case WM8350_INT_STATUS_2:
0312     case WM8350_POWER_UP_INT_STATUS:
0313     case WM8350_UNDER_VOLTAGE_INT_STATUS:
0314     case WM8350_OVER_CURRENT_INT_STATUS:
0315     case WM8350_GPIO_INT_STATUS:
0316     case WM8350_COMPARATOR_INT_STATUS:
0317         return true;
0318 
0319     default:
0320         return false;
0321     }
0322 }
0323 
0324 const struct regmap_config wm8350_regmap = {
0325     .reg_bits = 8,
0326     .val_bits = 16,
0327 
0328     .cache_type = REGCACHE_RBTREE,
0329 
0330     .max_register = WM8350_MAX_REGISTER,
0331     .readable_reg = wm8350_readable,
0332     .writeable_reg = wm8350_writeable,
0333     .volatile_reg = wm8350_volatile,
0334     .precious_reg = wm8350_precious,
0335 };
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