Back to home page

OSCL-LXR
 
 

     

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * MFD driver for TWL6040 audio device
0004  *
0005  * Authors: Misael Lopez Cruz <misael.lopez@ti.com>
0006  *      Jorge Eduardo Candelaria <jorge.candelaria@ti.com>
0007  *      Peter Ujfalusi <peter.ujfalusi@ti.com>
0008  *
0009  * Copyright:   (C) 2011 Texas Instruments, Inc.
0010  */
0011 
0012 #include <linux/module.h>
0013 #include <linux/types.h>
0014 #include <linux/slab.h>
0015 #include <linux/kernel.h>
0016 #include <linux/err.h>
0017 #include <linux/platform_device.h>
0018 #include <linux/of.h>
0019 #include <linux/of_irq.h>
0020 #include <linux/of_gpio.h>
0021 #include <linux/of_platform.h>
0022 #include <linux/gpio.h>
0023 #include <linux/delay.h>
0024 #include <linux/i2c.h>
0025 #include <linux/regmap.h>
0026 #include <linux/mfd/core.h>
0027 #include <linux/mfd/twl6040.h>
0028 #include <linux/regulator/consumer.h>
0029 
0030 #define VIBRACTRL_MEMBER(reg) ((reg == TWL6040_REG_VIBCTLL) ? 0 : 1)
0031 #define TWL6040_NUM_SUPPLIES    (2)
0032 
0033 static const struct reg_default twl6040_defaults[] = {
0034     { 0x01, 0x4B }, /* REG_ASICID   (ro) */
0035     { 0x02, 0x00 }, /* REG_ASICREV  (ro) */
0036     { 0x03, 0x00 }, /* REG_INTID    */
0037     { 0x04, 0x00 }, /* REG_INTMR    */
0038     { 0x05, 0x00 }, /* REG_NCPCTRL  */
0039     { 0x06, 0x00 }, /* REG_LDOCTL   */
0040     { 0x07, 0x60 }, /* REG_HPPLLCTL */
0041     { 0x08, 0x00 }, /* REG_LPPLLCTL */
0042     { 0x09, 0x4A }, /* REG_LPPLLDIV */
0043     { 0x0A, 0x00 }, /* REG_AMICBCTL */
0044     { 0x0B, 0x00 }, /* REG_DMICBCTL */
0045     { 0x0C, 0x00 }, /* REG_MICLCTL  */
0046     { 0x0D, 0x00 }, /* REG_MICRCTL  */
0047     { 0x0E, 0x00 }, /* REG_MICGAIN  */
0048     { 0x0F, 0x1B }, /* REG_LINEGAIN */
0049     { 0x10, 0x00 }, /* REG_HSLCTL   */
0050     { 0x11, 0x00 }, /* REG_HSRCTL   */
0051     { 0x12, 0x00 }, /* REG_HSGAIN   */
0052     { 0x13, 0x00 }, /* REG_EARCTL   */
0053     { 0x14, 0x00 }, /* REG_HFLCTL   */
0054     { 0x15, 0x00 }, /* REG_HFLGAIN  */
0055     { 0x16, 0x00 }, /* REG_HFRCTL   */
0056     { 0x17, 0x00 }, /* REG_HFRGAIN  */
0057     { 0x18, 0x00 }, /* REG_VIBCTLL  */
0058     { 0x19, 0x00 }, /* REG_VIBDATL  */
0059     { 0x1A, 0x00 }, /* REG_VIBCTLR  */
0060     { 0x1B, 0x00 }, /* REG_VIBDATR  */
0061     { 0x1C, 0x00 }, /* REG_HKCTL1   */
0062     { 0x1D, 0x00 }, /* REG_HKCTL2   */
0063     { 0x1E, 0x00 }, /* REG_GPOCTL   */
0064     { 0x1F, 0x00 }, /* REG_ALB  */
0065     { 0x20, 0x00 }, /* REG_DLB  */
0066     /* 0x28, REG_TRIM1 */
0067     /* 0x29, REG_TRIM2 */
0068     /* 0x2A, REG_TRIM3 */
0069     /* 0x2B, REG_HSOTRIM */
0070     /* 0x2C, REG_HFOTRIM */
0071     { 0x2D, 0x08 }, /* REG_ACCCTL   */
0072     { 0x2E, 0x00 }, /* REG_STATUS   (ro) */
0073 };
0074 
0075 static struct reg_sequence twl6040_patch[] = {
0076     /*
0077      * Select I2C bus access to dual access registers
0078      * Interrupt register is cleared on read
0079      * Select fast mode for i2c (400KHz)
0080      */
0081     { TWL6040_REG_ACCCTL,
0082         TWL6040_I2CSEL | TWL6040_INTCLRMODE | TWL6040_I2CMODE(1) },
0083 };
0084 
0085 
0086 static bool twl6040_has_vibra(struct device_node *parent)
0087 {
0088     struct device_node *node;
0089 
0090     node = of_get_child_by_name(parent, "vibra");
0091     if (node) {
0092         of_node_put(node);
0093         return true;
0094     }
0095 
0096     return false;
0097 }
0098 
0099 int twl6040_reg_read(struct twl6040 *twl6040, unsigned int reg)
0100 {
0101     int ret;
0102     unsigned int val;
0103 
0104     ret = regmap_read(twl6040->regmap, reg, &val);
0105     if (ret < 0)
0106         return ret;
0107 
0108     return val;
0109 }
0110 EXPORT_SYMBOL(twl6040_reg_read);
0111 
0112 int twl6040_reg_write(struct twl6040 *twl6040, unsigned int reg, u8 val)
0113 {
0114     int ret;
0115 
0116     ret = regmap_write(twl6040->regmap, reg, val);
0117 
0118     return ret;
0119 }
0120 EXPORT_SYMBOL(twl6040_reg_write);
0121 
0122 int twl6040_set_bits(struct twl6040 *twl6040, unsigned int reg, u8 mask)
0123 {
0124     return regmap_update_bits(twl6040->regmap, reg, mask, mask);
0125 }
0126 EXPORT_SYMBOL(twl6040_set_bits);
0127 
0128 int twl6040_clear_bits(struct twl6040 *twl6040, unsigned int reg, u8 mask)
0129 {
0130     return regmap_update_bits(twl6040->regmap, reg, mask, 0);
0131 }
0132 EXPORT_SYMBOL(twl6040_clear_bits);
0133 
0134 /* twl6040 codec manual power-up sequence */
0135 static int twl6040_power_up_manual(struct twl6040 *twl6040)
0136 {
0137     u8 ldoctl, ncpctl, lppllctl;
0138     int ret;
0139 
0140     /* enable high-side LDO, reference system and internal oscillator */
0141     ldoctl = TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA;
0142     ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
0143     if (ret)
0144         return ret;
0145     usleep_range(10000, 10500);
0146 
0147     /* enable negative charge pump */
0148     ncpctl = TWL6040_NCPENA;
0149     ret = twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl);
0150     if (ret)
0151         goto ncp_err;
0152     usleep_range(1000, 1500);
0153 
0154     /* enable low-side LDO */
0155     ldoctl |= TWL6040_LSLDOENA;
0156     ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
0157     if (ret)
0158         goto lsldo_err;
0159     usleep_range(1000, 1500);
0160 
0161     /* enable low-power PLL */
0162     lppllctl = TWL6040_LPLLENA;
0163     ret = twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
0164     if (ret)
0165         goto lppll_err;
0166     usleep_range(5000, 5500);
0167 
0168     /* disable internal oscillator */
0169     ldoctl &= ~TWL6040_OSCENA;
0170     ret = twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
0171     if (ret)
0172         goto osc_err;
0173 
0174     return 0;
0175 
0176 osc_err:
0177     lppllctl &= ~TWL6040_LPLLENA;
0178     twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
0179 lppll_err:
0180     ldoctl &= ~TWL6040_LSLDOENA;
0181     twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
0182 lsldo_err:
0183     ncpctl &= ~TWL6040_NCPENA;
0184     twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl);
0185 ncp_err:
0186     ldoctl &= ~(TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA);
0187     twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
0188 
0189     dev_err(twl6040->dev, "manual power-up failed\n");
0190     return ret;
0191 }
0192 
0193 /* twl6040 manual power-down sequence */
0194 static void twl6040_power_down_manual(struct twl6040 *twl6040)
0195 {
0196     u8 ncpctl, ldoctl, lppllctl;
0197 
0198     ncpctl = twl6040_reg_read(twl6040, TWL6040_REG_NCPCTL);
0199     ldoctl = twl6040_reg_read(twl6040, TWL6040_REG_LDOCTL);
0200     lppllctl = twl6040_reg_read(twl6040, TWL6040_REG_LPPLLCTL);
0201 
0202     /* enable internal oscillator */
0203     ldoctl |= TWL6040_OSCENA;
0204     twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
0205     usleep_range(1000, 1500);
0206 
0207     /* disable low-power PLL */
0208     lppllctl &= ~TWL6040_LPLLENA;
0209     twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL, lppllctl);
0210 
0211     /* disable low-side LDO */
0212     ldoctl &= ~TWL6040_LSLDOENA;
0213     twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
0214 
0215     /* disable negative charge pump */
0216     ncpctl &= ~TWL6040_NCPENA;
0217     twl6040_reg_write(twl6040, TWL6040_REG_NCPCTL, ncpctl);
0218 
0219     /* disable high-side LDO, reference system and internal oscillator */
0220     ldoctl &= ~(TWL6040_HSLDOENA | TWL6040_REFENA | TWL6040_OSCENA);
0221     twl6040_reg_write(twl6040, TWL6040_REG_LDOCTL, ldoctl);
0222 }
0223 
0224 static irqreturn_t twl6040_readyint_handler(int irq, void *data)
0225 {
0226     struct twl6040 *twl6040 = data;
0227 
0228     complete(&twl6040->ready);
0229 
0230     return IRQ_HANDLED;
0231 }
0232 
0233 static irqreturn_t twl6040_thint_handler(int irq, void *data)
0234 {
0235     struct twl6040 *twl6040 = data;
0236     u8 status;
0237 
0238     status = twl6040_reg_read(twl6040, TWL6040_REG_STATUS);
0239     if (status & TWL6040_TSHUTDET) {
0240         dev_warn(twl6040->dev, "Thermal shutdown, powering-off");
0241         twl6040_power(twl6040, 0);
0242     } else {
0243         dev_warn(twl6040->dev, "Leaving thermal shutdown, powering-on");
0244         twl6040_power(twl6040, 1);
0245     }
0246 
0247     return IRQ_HANDLED;
0248 }
0249 
0250 static int twl6040_power_up_automatic(struct twl6040 *twl6040)
0251 {
0252     int time_left;
0253 
0254     gpio_set_value(twl6040->audpwron, 1);
0255 
0256     time_left = wait_for_completion_timeout(&twl6040->ready,
0257                         msecs_to_jiffies(144));
0258     if (!time_left) {
0259         u8 intid;
0260 
0261         dev_warn(twl6040->dev, "timeout waiting for READYINT\n");
0262         intid = twl6040_reg_read(twl6040, TWL6040_REG_INTID);
0263         if (!(intid & TWL6040_READYINT)) {
0264             dev_err(twl6040->dev, "automatic power-up failed\n");
0265             gpio_set_value(twl6040->audpwron, 0);
0266             return -ETIMEDOUT;
0267         }
0268     }
0269 
0270     return 0;
0271 }
0272 
0273 int twl6040_power(struct twl6040 *twl6040, int on)
0274 {
0275     int ret = 0;
0276 
0277     mutex_lock(&twl6040->mutex);
0278 
0279     if (on) {
0280         /* already powered-up */
0281         if (twl6040->power_count++)
0282             goto out;
0283 
0284         ret = clk_prepare_enable(twl6040->clk32k);
0285         if (ret) {
0286             twl6040->power_count = 0;
0287             goto out;
0288         }
0289 
0290         /* Allow writes to the chip */
0291         regcache_cache_only(twl6040->regmap, false);
0292 
0293         if (gpio_is_valid(twl6040->audpwron)) {
0294             /* use automatic power-up sequence */
0295             ret = twl6040_power_up_automatic(twl6040);
0296             if (ret) {
0297                 clk_disable_unprepare(twl6040->clk32k);
0298                 twl6040->power_count = 0;
0299                 goto out;
0300             }
0301         } else {
0302             /* use manual power-up sequence */
0303             ret = twl6040_power_up_manual(twl6040);
0304             if (ret) {
0305                 clk_disable_unprepare(twl6040->clk32k);
0306                 twl6040->power_count = 0;
0307                 goto out;
0308             }
0309         }
0310 
0311         /*
0312          * Register access can produce errors after power-up unless we
0313          * wait at least 8ms based on measurements on duovero.
0314          */
0315         usleep_range(10000, 12000);
0316 
0317         /* Sync with the HW */
0318         ret = regcache_sync(twl6040->regmap);
0319         if (ret) {
0320             dev_err(twl6040->dev, "Failed to sync with the HW: %i\n",
0321                 ret);
0322             goto out;
0323         }
0324 
0325         /* Default PLL configuration after power up */
0326         twl6040->pll = TWL6040_SYSCLK_SEL_LPPLL;
0327         twl6040->sysclk_rate = 19200000;
0328     } else {
0329         /* already powered-down */
0330         if (!twl6040->power_count) {
0331             dev_err(twl6040->dev,
0332                 "device is already powered-off\n");
0333             ret = -EPERM;
0334             goto out;
0335         }
0336 
0337         if (--twl6040->power_count)
0338             goto out;
0339 
0340         if (gpio_is_valid(twl6040->audpwron)) {
0341             /* use AUDPWRON line */
0342             gpio_set_value(twl6040->audpwron, 0);
0343 
0344             /* power-down sequence latency */
0345             usleep_range(500, 700);
0346         } else {
0347             /* use manual power-down sequence */
0348             twl6040_power_down_manual(twl6040);
0349         }
0350 
0351         /* Set regmap to cache only and mark it as dirty */
0352         regcache_cache_only(twl6040->regmap, true);
0353         regcache_mark_dirty(twl6040->regmap);
0354 
0355         twl6040->sysclk_rate = 0;
0356 
0357         if (twl6040->pll == TWL6040_SYSCLK_SEL_HPPLL) {
0358             clk_disable_unprepare(twl6040->mclk);
0359             twl6040->mclk_rate = 0;
0360         }
0361 
0362         clk_disable_unprepare(twl6040->clk32k);
0363     }
0364 
0365 out:
0366     mutex_unlock(&twl6040->mutex);
0367     return ret;
0368 }
0369 EXPORT_SYMBOL(twl6040_power);
0370 
0371 int twl6040_set_pll(struct twl6040 *twl6040, int pll_id,
0372             unsigned int freq_in, unsigned int freq_out)
0373 {
0374     u8 hppllctl, lppllctl;
0375     int ret = 0;
0376 
0377     mutex_lock(&twl6040->mutex);
0378 
0379     hppllctl = twl6040_reg_read(twl6040, TWL6040_REG_HPPLLCTL);
0380     lppllctl = twl6040_reg_read(twl6040, TWL6040_REG_LPPLLCTL);
0381 
0382     /* Force full reconfiguration when switching between PLL */
0383     if (pll_id != twl6040->pll) {
0384         twl6040->sysclk_rate = 0;
0385         twl6040->mclk_rate = 0;
0386     }
0387 
0388     switch (pll_id) {
0389     case TWL6040_SYSCLK_SEL_LPPLL:
0390         /* low-power PLL divider */
0391         /* Change the sysclk configuration only if it has been canged */
0392         if (twl6040->sysclk_rate != freq_out) {
0393             switch (freq_out) {
0394             case 17640000:
0395                 lppllctl |= TWL6040_LPLLFIN;
0396                 break;
0397             case 19200000:
0398                 lppllctl &= ~TWL6040_LPLLFIN;
0399                 break;
0400             default:
0401                 dev_err(twl6040->dev,
0402                     "freq_out %d not supported\n",
0403                     freq_out);
0404                 ret = -EINVAL;
0405                 goto pll_out;
0406             }
0407             twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
0408                       lppllctl);
0409         }
0410 
0411         /* The PLL in use has not been change, we can exit */
0412         if (twl6040->pll == pll_id)
0413             break;
0414 
0415         switch (freq_in) {
0416         case 32768:
0417             lppllctl |= TWL6040_LPLLENA;
0418             twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
0419                       lppllctl);
0420             mdelay(5);
0421             lppllctl &= ~TWL6040_HPLLSEL;
0422             twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
0423                       lppllctl);
0424             hppllctl &= ~TWL6040_HPLLENA;
0425             twl6040_reg_write(twl6040, TWL6040_REG_HPPLLCTL,
0426                       hppllctl);
0427             break;
0428         default:
0429             dev_err(twl6040->dev,
0430                 "freq_in %d not supported\n", freq_in);
0431             ret = -EINVAL;
0432             goto pll_out;
0433         }
0434 
0435         clk_disable_unprepare(twl6040->mclk);
0436         break;
0437     case TWL6040_SYSCLK_SEL_HPPLL:
0438         /* high-performance PLL can provide only 19.2 MHz */
0439         if (freq_out != 19200000) {
0440             dev_err(twl6040->dev,
0441                 "freq_out %d not supported\n", freq_out);
0442             ret = -EINVAL;
0443             goto pll_out;
0444         }
0445 
0446         if (twl6040->mclk_rate != freq_in) {
0447             hppllctl &= ~TWL6040_MCLK_MSK;
0448 
0449             switch (freq_in) {
0450             case 12000000:
0451                 /* PLL enabled, active mode */
0452                 hppllctl |= TWL6040_MCLK_12000KHZ |
0453                         TWL6040_HPLLENA;
0454                 break;
0455             case 19200000:
0456                 /* PLL enabled, bypass mode */
0457                 hppllctl |= TWL6040_MCLK_19200KHZ |
0458                         TWL6040_HPLLBP | TWL6040_HPLLENA;
0459                 break;
0460             case 26000000:
0461                 /* PLL enabled, active mode */
0462                 hppllctl |= TWL6040_MCLK_26000KHZ |
0463                         TWL6040_HPLLENA;
0464                 break;
0465             case 38400000:
0466                 /* PLL enabled, bypass mode */
0467                 hppllctl |= TWL6040_MCLK_38400KHZ |
0468                         TWL6040_HPLLBP | TWL6040_HPLLENA;
0469                 break;
0470             default:
0471                 dev_err(twl6040->dev,
0472                     "freq_in %d not supported\n", freq_in);
0473                 ret = -EINVAL;
0474                 goto pll_out;
0475             }
0476 
0477             /* When switching to HPPLL, enable the mclk first */
0478             if (pll_id != twl6040->pll)
0479                 clk_prepare_enable(twl6040->mclk);
0480             /*
0481              * enable clock slicer to ensure input waveform is
0482              * square
0483              */
0484             hppllctl |= TWL6040_HPLLSQRENA;
0485 
0486             twl6040_reg_write(twl6040, TWL6040_REG_HPPLLCTL,
0487                       hppllctl);
0488             usleep_range(500, 700);
0489             lppllctl |= TWL6040_HPLLSEL;
0490             twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
0491                       lppllctl);
0492             lppllctl &= ~TWL6040_LPLLENA;
0493             twl6040_reg_write(twl6040, TWL6040_REG_LPPLLCTL,
0494                       lppllctl);
0495 
0496             twl6040->mclk_rate = freq_in;
0497         }
0498         break;
0499     default:
0500         dev_err(twl6040->dev, "unknown pll id %d\n", pll_id);
0501         ret = -EINVAL;
0502         goto pll_out;
0503     }
0504 
0505     twl6040->sysclk_rate = freq_out;
0506     twl6040->pll = pll_id;
0507 
0508 pll_out:
0509     mutex_unlock(&twl6040->mutex);
0510     return ret;
0511 }
0512 EXPORT_SYMBOL(twl6040_set_pll);
0513 
0514 int twl6040_get_pll(struct twl6040 *twl6040)
0515 {
0516     if (twl6040->power_count)
0517         return twl6040->pll;
0518     else
0519         return -ENODEV;
0520 }
0521 EXPORT_SYMBOL(twl6040_get_pll);
0522 
0523 unsigned int twl6040_get_sysclk(struct twl6040 *twl6040)
0524 {
0525     return twl6040->sysclk_rate;
0526 }
0527 EXPORT_SYMBOL(twl6040_get_sysclk);
0528 
0529 /* Get the combined status of the vibra control register */
0530 int twl6040_get_vibralr_status(struct twl6040 *twl6040)
0531 {
0532     unsigned int reg;
0533     int ret;
0534     u8 status;
0535 
0536     ret = regmap_read(twl6040->regmap, TWL6040_REG_VIBCTLL, &reg);
0537     if (ret != 0)
0538         return ret;
0539     status = reg;
0540 
0541     ret = regmap_read(twl6040->regmap, TWL6040_REG_VIBCTLR, &reg);
0542     if (ret != 0)
0543         return ret;
0544     status |= reg;
0545 
0546     status &= (TWL6040_VIBENA | TWL6040_VIBSEL);
0547 
0548     return status;
0549 }
0550 EXPORT_SYMBOL(twl6040_get_vibralr_status);
0551 
0552 static struct resource twl6040_vibra_rsrc[] = {
0553     {
0554         .flags = IORESOURCE_IRQ,
0555     },
0556 };
0557 
0558 static struct resource twl6040_codec_rsrc[] = {
0559     {
0560         .flags = IORESOURCE_IRQ,
0561     },
0562 };
0563 
0564 static bool twl6040_readable_reg(struct device *dev, unsigned int reg)
0565 {
0566     /* Register 0 is not readable */
0567     if (!reg)
0568         return false;
0569     return true;
0570 }
0571 
0572 static bool twl6040_volatile_reg(struct device *dev, unsigned int reg)
0573 {
0574     switch (reg) {
0575     case TWL6040_REG_ASICID:
0576     case TWL6040_REG_ASICREV:
0577     case TWL6040_REG_INTID:
0578     case TWL6040_REG_LPPLLCTL:
0579     case TWL6040_REG_HPPLLCTL:
0580     case TWL6040_REG_STATUS:
0581         return true;
0582     default:
0583         return false;
0584     }
0585 }
0586 
0587 static bool twl6040_writeable_reg(struct device *dev, unsigned int reg)
0588 {
0589     switch (reg) {
0590     case TWL6040_REG_ASICID:
0591     case TWL6040_REG_ASICREV:
0592     case TWL6040_REG_STATUS:
0593         return false;
0594     default:
0595         return true;
0596     }
0597 }
0598 
0599 static const struct regmap_config twl6040_regmap_config = {
0600     .reg_bits = 8,
0601     .val_bits = 8,
0602 
0603     .reg_defaults = twl6040_defaults,
0604     .num_reg_defaults = ARRAY_SIZE(twl6040_defaults),
0605 
0606     .max_register = TWL6040_REG_STATUS, /* 0x2e */
0607 
0608     .readable_reg = twl6040_readable_reg,
0609     .volatile_reg = twl6040_volatile_reg,
0610     .writeable_reg = twl6040_writeable_reg,
0611 
0612     .cache_type = REGCACHE_RBTREE,
0613     .use_single_read = true,
0614     .use_single_write = true,
0615 };
0616 
0617 static const struct regmap_irq twl6040_irqs[] = {
0618     { .reg_offset = 0, .mask = TWL6040_THINT, },
0619     { .reg_offset = 0, .mask = TWL6040_PLUGINT | TWL6040_UNPLUGINT, },
0620     { .reg_offset = 0, .mask = TWL6040_HOOKINT, },
0621     { .reg_offset = 0, .mask = TWL6040_HFINT, },
0622     { .reg_offset = 0, .mask = TWL6040_VIBINT, },
0623     { .reg_offset = 0, .mask = TWL6040_READYINT, },
0624 };
0625 
0626 static struct regmap_irq_chip twl6040_irq_chip = {
0627     .name = "twl6040",
0628     .irqs = twl6040_irqs,
0629     .num_irqs = ARRAY_SIZE(twl6040_irqs),
0630 
0631     .num_regs = 1,
0632     .status_base = TWL6040_REG_INTID,
0633     .mask_base = TWL6040_REG_INTMR,
0634 };
0635 
0636 static int twl6040_probe(struct i2c_client *client,
0637              const struct i2c_device_id *id)
0638 {
0639     struct device_node *node = client->dev.of_node;
0640     struct twl6040 *twl6040;
0641     struct mfd_cell *cell = NULL;
0642     int irq, ret, children = 0;
0643 
0644     if (!node) {
0645         dev_err(&client->dev, "of node is missing\n");
0646         return -EINVAL;
0647     }
0648 
0649     /* In order to operate correctly we need valid interrupt config */
0650     if (!client->irq) {
0651         dev_err(&client->dev, "Invalid IRQ configuration\n");
0652         return -EINVAL;
0653     }
0654 
0655     twl6040 = devm_kzalloc(&client->dev, sizeof(struct twl6040),
0656                    GFP_KERNEL);
0657     if (!twl6040)
0658         return -ENOMEM;
0659 
0660     twl6040->regmap = devm_regmap_init_i2c(client, &twl6040_regmap_config);
0661     if (IS_ERR(twl6040->regmap))
0662         return PTR_ERR(twl6040->regmap);
0663 
0664     i2c_set_clientdata(client, twl6040);
0665 
0666     twl6040->clk32k = devm_clk_get(&client->dev, "clk32k");
0667     if (IS_ERR(twl6040->clk32k)) {
0668         if (PTR_ERR(twl6040->clk32k) == -EPROBE_DEFER)
0669             return -EPROBE_DEFER;
0670         dev_dbg(&client->dev, "clk32k is not handled\n");
0671         twl6040->clk32k = NULL;
0672     }
0673 
0674     twl6040->mclk = devm_clk_get(&client->dev, "mclk");
0675     if (IS_ERR(twl6040->mclk)) {
0676         if (PTR_ERR(twl6040->mclk) == -EPROBE_DEFER)
0677             return -EPROBE_DEFER;
0678         dev_dbg(&client->dev, "mclk is not handled\n");
0679         twl6040->mclk = NULL;
0680     }
0681 
0682     twl6040->supplies[0].supply = "vio";
0683     twl6040->supplies[1].supply = "v2v1";
0684     ret = devm_regulator_bulk_get(&client->dev, TWL6040_NUM_SUPPLIES,
0685                       twl6040->supplies);
0686     if (ret != 0) {
0687         dev_err(&client->dev, "Failed to get supplies: %d\n", ret);
0688         return ret;
0689     }
0690 
0691     ret = regulator_bulk_enable(TWL6040_NUM_SUPPLIES, twl6040->supplies);
0692     if (ret != 0) {
0693         dev_err(&client->dev, "Failed to enable supplies: %d\n", ret);
0694         return ret;
0695     }
0696 
0697     twl6040->dev = &client->dev;
0698     twl6040->irq = client->irq;
0699 
0700     mutex_init(&twl6040->mutex);
0701     init_completion(&twl6040->ready);
0702 
0703     regmap_register_patch(twl6040->regmap, twl6040_patch,
0704                   ARRAY_SIZE(twl6040_patch));
0705 
0706     twl6040->rev = twl6040_reg_read(twl6040, TWL6040_REG_ASICREV);
0707     if (twl6040->rev < 0) {
0708         dev_err(&client->dev, "Failed to read revision register: %d\n",
0709             twl6040->rev);
0710         ret = twl6040->rev;
0711         goto gpio_err;
0712     }
0713 
0714     /* ERRATA: Automatic power-up is not possible in ES1.0 */
0715     if (twl6040_get_revid(twl6040) > TWL6040_REV_ES1_0)
0716         twl6040->audpwron = of_get_named_gpio(node,
0717                               "ti,audpwron-gpio", 0);
0718     else
0719         twl6040->audpwron = -EINVAL;
0720 
0721     if (gpio_is_valid(twl6040->audpwron)) {
0722         ret = devm_gpio_request_one(&client->dev, twl6040->audpwron,
0723                         GPIOF_OUT_INIT_LOW, "audpwron");
0724         if (ret)
0725             goto gpio_err;
0726 
0727         /* Clear any pending interrupt */
0728         twl6040_reg_read(twl6040, TWL6040_REG_INTID);
0729     }
0730 
0731     ret = regmap_add_irq_chip(twl6040->regmap, twl6040->irq, IRQF_ONESHOT,
0732                   0, &twl6040_irq_chip, &twl6040->irq_data);
0733     if (ret < 0)
0734         goto gpio_err;
0735 
0736     twl6040->irq_ready = regmap_irq_get_virq(twl6040->irq_data,
0737                          TWL6040_IRQ_READY);
0738     twl6040->irq_th = regmap_irq_get_virq(twl6040->irq_data,
0739                           TWL6040_IRQ_TH);
0740 
0741     ret = devm_request_threaded_irq(twl6040->dev, twl6040->irq_ready, NULL,
0742                     twl6040_readyint_handler, IRQF_ONESHOT,
0743                     "twl6040_irq_ready", twl6040);
0744     if (ret) {
0745         dev_err(twl6040->dev, "READY IRQ request failed: %d\n", ret);
0746         goto readyirq_err;
0747     }
0748 
0749     ret = devm_request_threaded_irq(twl6040->dev, twl6040->irq_th, NULL,
0750                     twl6040_thint_handler, IRQF_ONESHOT,
0751                     "twl6040_irq_th", twl6040);
0752     if (ret) {
0753         dev_err(twl6040->dev, "Thermal IRQ request failed: %d\n", ret);
0754         goto readyirq_err;
0755     }
0756 
0757     /*
0758      * The main functionality of twl6040 to provide audio on OMAP4+ systems.
0759      * We can add the ASoC codec child whenever this driver has been loaded.
0760      */
0761     irq = regmap_irq_get_virq(twl6040->irq_data, TWL6040_IRQ_PLUG);
0762     cell = &twl6040->cells[children];
0763     cell->name = "twl6040-codec";
0764     twl6040_codec_rsrc[0].start = irq;
0765     twl6040_codec_rsrc[0].end = irq;
0766     cell->resources = twl6040_codec_rsrc;
0767     cell->num_resources = ARRAY_SIZE(twl6040_codec_rsrc);
0768     children++;
0769 
0770     /* Vibra input driver support */
0771     if (twl6040_has_vibra(node)) {
0772         irq = regmap_irq_get_virq(twl6040->irq_data, TWL6040_IRQ_VIB);
0773 
0774         cell = &twl6040->cells[children];
0775         cell->name = "twl6040-vibra";
0776         twl6040_vibra_rsrc[0].start = irq;
0777         twl6040_vibra_rsrc[0].end = irq;
0778         cell->resources = twl6040_vibra_rsrc;
0779         cell->num_resources = ARRAY_SIZE(twl6040_vibra_rsrc);
0780         children++;
0781     }
0782 
0783     /* GPO support */
0784     cell = &twl6040->cells[children];
0785     cell->name = "twl6040-gpo";
0786     children++;
0787 
0788     /* PDM clock support  */
0789     cell = &twl6040->cells[children];
0790     cell->name = "twl6040-pdmclk";
0791     children++;
0792 
0793     /* The chip is powered down so mark regmap to cache only and dirty */
0794     regcache_cache_only(twl6040->regmap, true);
0795     regcache_mark_dirty(twl6040->regmap);
0796 
0797     ret = mfd_add_devices(&client->dev, -1, twl6040->cells, children,
0798                   NULL, 0, NULL);
0799     if (ret)
0800         goto readyirq_err;
0801 
0802     return 0;
0803 
0804 readyirq_err:
0805     regmap_del_irq_chip(twl6040->irq, twl6040->irq_data);
0806 gpio_err:
0807     regulator_bulk_disable(TWL6040_NUM_SUPPLIES, twl6040->supplies);
0808     return ret;
0809 }
0810 
0811 static int twl6040_remove(struct i2c_client *client)
0812 {
0813     struct twl6040 *twl6040 = i2c_get_clientdata(client);
0814 
0815     if (twl6040->power_count)
0816         twl6040_power(twl6040, 0);
0817 
0818     regmap_del_irq_chip(twl6040->irq, twl6040->irq_data);
0819 
0820     mfd_remove_devices(&client->dev);
0821 
0822     regulator_bulk_disable(TWL6040_NUM_SUPPLIES, twl6040->supplies);
0823 
0824     return 0;
0825 }
0826 
0827 static const struct i2c_device_id twl6040_i2c_id[] = {
0828     { "twl6040", 0, },
0829     { "twl6041", 0, },
0830     { },
0831 };
0832 MODULE_DEVICE_TABLE(i2c, twl6040_i2c_id);
0833 
0834 static struct i2c_driver twl6040_driver = {
0835     .driver = {
0836         .name = "twl6040",
0837     },
0838     .probe      = twl6040_probe,
0839     .remove     = twl6040_remove,
0840     .id_table   = twl6040_i2c_id,
0841 };
0842 
0843 module_i2c_driver(twl6040_driver);
0844 
0845 MODULE_DESCRIPTION("TWL6040 MFD");
0846 MODULE_AUTHOR("Misael Lopez Cruz <misael.lopez@ti.com>");
0847 MODULE_AUTHOR("Jorge Eduardo Candelaria <jorge.candelaria@ti.com>");
0848 MODULE_LICENSE("GPL");
[ Source navigation ] [ Diff markup ] [ Identifier search ] [ general search ]

This page was automatically generated by the 2.1.0 LXR engine.

The LXR team
Valid CSS 2.1! Valid HTML 4.01!