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0001 // SPDX-License-Identifier: GPL-2.0-or-later
0002 /*
0003  * twl_core.c - driver for TWL4030/TWL5030/TWL60X0/TPS659x0 PM
0004  * and audio CODEC devices
0005  *
0006  * Copyright (C) 2005-2006 Texas Instruments, Inc.
0007  *
0008  * Modifications to defer interrupt handling to a kernel thread:
0009  * Copyright (C) 2006 MontaVista Software, Inc.
0010  *
0011  * Based on tlv320aic23.c:
0012  * Copyright (c) by Kai Svahn <kai.svahn@nokia.com>
0013  *
0014  * Code cleanup and modifications to IRQ handler.
0015  * by syed khasim <x0khasim@ti.com>
0016  */
0017 
0018 #include <linux/init.h>
0019 #include <linux/mutex.h>
0020 #include <linux/platform_device.h>
0021 #include <linux/regmap.h>
0022 #include <linux/clk.h>
0023 #include <linux/err.h>
0024 #include <linux/device.h>
0025 #include <linux/of.h>
0026 #include <linux/of_irq.h>
0027 #include <linux/of_platform.h>
0028 #include <linux/irq.h>
0029 #include <linux/irqdomain.h>
0030 
0031 #include <linux/regulator/machine.h>
0032 
0033 #include <linux/i2c.h>
0034 #include <linux/mfd/twl.h>
0035 
0036 /* Register descriptions for audio */
0037 #include <linux/mfd/twl4030-audio.h>
0038 
0039 #include "twl-core.h"
0040 
0041 /*
0042  * The TWL4030 "Triton 2" is one of a family of a multi-function "Power
0043  * Management and System Companion Device" chips originally designed for
0044  * use in OMAP2 and OMAP 3 based systems.  Its control interfaces use I2C,
0045  * often at around 3 Mbit/sec, including for interrupt handling.
0046  *
0047  * This driver core provides genirq support for the interrupts emitted,
0048  * by the various modules, and exports register access primitives.
0049  *
0050  * FIXME this driver currently requires use of the first interrupt line
0051  * (and associated registers).
0052  */
0053 
0054 #define DRIVER_NAME         "twl"
0055 
0056 /* Triton Core internal information (BEGIN) */
0057 
0058 /* Base Address defns for twl4030_map[] */
0059 
0060 /* subchip/slave 0 - USB ID */
0061 #define TWL4030_BASEADD_USB     0x0000
0062 
0063 /* subchip/slave 1 - AUD ID */
0064 #define TWL4030_BASEADD_AUDIO_VOICE 0x0000
0065 #define TWL4030_BASEADD_GPIO        0x0098
0066 #define TWL4030_BASEADD_INTBR       0x0085
0067 #define TWL4030_BASEADD_PIH     0x0080
0068 #define TWL4030_BASEADD_TEST        0x004C
0069 
0070 /* subchip/slave 2 - AUX ID */
0071 #define TWL4030_BASEADD_INTERRUPTS  0x00B9
0072 #define TWL4030_BASEADD_LED     0x00EE
0073 #define TWL4030_BASEADD_MADC        0x0000
0074 #define TWL4030_BASEADD_MAIN_CHARGE 0x0074
0075 #define TWL4030_BASEADD_PRECHARGE   0x00AA
0076 #define TWL4030_BASEADD_PWM     0x00F8
0077 #define TWL4030_BASEADD_KEYPAD      0x00D2
0078 
0079 #define TWL5031_BASEADD_ACCESSORY   0x0074 /* Replaces Main Charge */
0080 #define TWL5031_BASEADD_INTERRUPTS  0x00B9 /* Different than TWL4030's
0081                           one */
0082 
0083 /* subchip/slave 3 - POWER ID */
0084 #define TWL4030_BASEADD_BACKUP      0x0014
0085 #define TWL4030_BASEADD_INT     0x002E
0086 #define TWL4030_BASEADD_PM_MASTER   0x0036
0087 
0088 #define TWL4030_BASEADD_PM_RECEIVER 0x005B
0089 #define TWL4030_DCDC_GLOBAL_CFG     0x06
0090 #define SMARTREFLEX_ENABLE      BIT(3)
0091 
0092 #define TWL4030_BASEADD_RTC     0x001C
0093 #define TWL4030_BASEADD_SECURED_REG 0x0000
0094 
0095 /* Triton Core internal information (END) */
0096 
0097 
0098 /* subchip/slave 0 0x48 - POWER */
0099 #define TWL6030_BASEADD_RTC     0x0000
0100 #define TWL6030_BASEADD_SECURED_REG 0x0017
0101 #define TWL6030_BASEADD_PM_MASTER   0x001F
0102 #define TWL6030_BASEADD_PM_SLAVE_MISC   0x0030 /* PM_RECEIVER */
0103 #define TWL6030_BASEADD_PM_MISC     0x00E2
0104 #define TWL6030_BASEADD_PM_PUPD     0x00F0
0105 
0106 /* subchip/slave 1 0x49 - FEATURE */
0107 #define TWL6030_BASEADD_USB     0x0000
0108 #define TWL6030_BASEADD_GPADC_CTRL  0x002E
0109 #define TWL6030_BASEADD_AUX     0x0090
0110 #define TWL6030_BASEADD_PWM     0x00BA
0111 #define TWL6030_BASEADD_GASGAUGE    0x00C0
0112 #define TWL6030_BASEADD_PIH     0x00D0
0113 #define TWL6030_BASEADD_CHARGER     0x00E0
0114 #define TWL6032_BASEADD_CHARGER     0x00DA
0115 #define TWL6030_BASEADD_LED     0x00F4
0116 
0117 /* subchip/slave 2 0x4A - DFT */
0118 #define TWL6030_BASEADD_DIEID       0x00C0
0119 
0120 /* subchip/slave 3 0x4B - AUDIO */
0121 #define TWL6030_BASEADD_AUDIO       0x0000
0122 #define TWL6030_BASEADD_RSV     0x0000
0123 #define TWL6030_BASEADD_ZERO        0x0000
0124 
0125 /* Few power values */
0126 #define R_CFG_BOOT          0x05
0127 
0128 /* some fields in R_CFG_BOOT */
0129 #define HFCLK_FREQ_19p2_MHZ     (1 << 0)
0130 #define HFCLK_FREQ_26_MHZ       (2 << 0)
0131 #define HFCLK_FREQ_38p4_MHZ     (3 << 0)
0132 #define HIGH_PERF_SQ            (1 << 3)
0133 #define CK32K_LOWPWR_EN         (1 << 7)
0134 
0135 /*----------------------------------------------------------------------*/
0136 
0137 /* Structure for each TWL4030/TWL6030 Slave */
0138 struct twl_client {
0139     struct i2c_client *client;
0140     struct regmap *regmap;
0141 };
0142 
0143 /* mapping the module id to slave id and base address */
0144 struct twl_mapping {
0145     unsigned char sid;  /* Slave ID */
0146     unsigned char base; /* base address */
0147 };
0148 
0149 struct twl_private {
0150     bool ready; /* The core driver is ready to be used */
0151     u32 twl_idcode; /* TWL IDCODE Register value */
0152     unsigned int twl_id;
0153 
0154     struct twl_mapping *twl_map;
0155     struct twl_client *twl_modules;
0156 };
0157 
0158 static struct twl_private *twl_priv;
0159 
0160 static struct twl_mapping twl4030_map[] = {
0161     /*
0162      * NOTE:  don't change this table without updating the
0163      * <linux/mfd/twl.h> defines for TWL4030_MODULE_*
0164      * so they continue to match the order in this table.
0165      */
0166 
0167     /* Common IPs */
0168     { 0, TWL4030_BASEADD_USB },
0169     { 1, TWL4030_BASEADD_PIH },
0170     { 2, TWL4030_BASEADD_MAIN_CHARGE },
0171     { 3, TWL4030_BASEADD_PM_MASTER },
0172     { 3, TWL4030_BASEADD_PM_RECEIVER },
0173 
0174     { 3, TWL4030_BASEADD_RTC },
0175     { 2, TWL4030_BASEADD_PWM },
0176     { 2, TWL4030_BASEADD_LED },
0177     { 3, TWL4030_BASEADD_SECURED_REG },
0178 
0179     /* TWL4030 specific IPs */
0180     { 1, TWL4030_BASEADD_AUDIO_VOICE },
0181     { 1, TWL4030_BASEADD_GPIO },
0182     { 1, TWL4030_BASEADD_INTBR },
0183     { 1, TWL4030_BASEADD_TEST },
0184     { 2, TWL4030_BASEADD_KEYPAD },
0185 
0186     { 2, TWL4030_BASEADD_MADC },
0187     { 2, TWL4030_BASEADD_INTERRUPTS },
0188     { 2, TWL4030_BASEADD_PRECHARGE },
0189     { 3, TWL4030_BASEADD_BACKUP },
0190     { 3, TWL4030_BASEADD_INT },
0191 
0192     { 2, TWL5031_BASEADD_ACCESSORY },
0193     { 2, TWL5031_BASEADD_INTERRUPTS },
0194 };
0195 
0196 static const struct reg_default twl4030_49_defaults[] = {
0197     /* Audio Registers */
0198     { 0x01, 0x00}, /* CODEC_MODE    */
0199     { 0x02, 0x00}, /* OPTION    */
0200     /* 0x03  Unused */
0201     { 0x04, 0x00}, /* MICBIAS_CTL   */
0202     { 0x05, 0x00}, /* ANAMICL   */
0203     { 0x06, 0x00}, /* ANAMICR   */
0204     { 0x07, 0x00}, /* AVADC_CTL */
0205     { 0x08, 0x00}, /* ADCMICSEL */
0206     { 0x09, 0x00}, /* DIGMIXING */
0207     { 0x0a, 0x0f}, /* ATXL1PGA  */
0208     { 0x0b, 0x0f}, /* ATXR1PGA  */
0209     { 0x0c, 0x0f}, /* AVTXL2PGA */
0210     { 0x0d, 0x0f}, /* AVTXR2PGA */
0211     { 0x0e, 0x00}, /* AUDIO_IF  */
0212     { 0x0f, 0x00}, /* VOICE_IF  */
0213     { 0x10, 0x3f}, /* ARXR1PGA  */
0214     { 0x11, 0x3f}, /* ARXL1PGA  */
0215     { 0x12, 0x3f}, /* ARXR2PGA  */
0216     { 0x13, 0x3f}, /* ARXL2PGA  */
0217     { 0x14, 0x25}, /* VRXPGA    */
0218     { 0x15, 0x00}, /* VSTPGA    */
0219     { 0x16, 0x00}, /* VRX2ARXPGA    */
0220     { 0x17, 0x00}, /* AVDAC_CTL */
0221     { 0x18, 0x00}, /* ARX2VTXPGA    */
0222     { 0x19, 0x32}, /* ARXL1_APGA_CTL*/
0223     { 0x1a, 0x32}, /* ARXR1_APGA_CTL*/
0224     { 0x1b, 0x32}, /* ARXL2_APGA_CTL*/
0225     { 0x1c, 0x32}, /* ARXR2_APGA_CTL*/
0226     { 0x1d, 0x00}, /* ATX2ARXPGA    */
0227     { 0x1e, 0x00}, /* BT_IF     */
0228     { 0x1f, 0x55}, /* BTPGA     */
0229     { 0x20, 0x00}, /* BTSTPGA   */
0230     { 0x21, 0x00}, /* EAR_CTL   */
0231     { 0x22, 0x00}, /* HS_SEL    */
0232     { 0x23, 0x00}, /* HS_GAIN_SET   */
0233     { 0x24, 0x00}, /* HS_POPN_SET   */
0234     { 0x25, 0x00}, /* PREDL_CTL */
0235     { 0x26, 0x00}, /* PREDR_CTL */
0236     { 0x27, 0x00}, /* PRECKL_CTL    */
0237     { 0x28, 0x00}, /* PRECKR_CTL    */
0238     { 0x29, 0x00}, /* HFL_CTL   */
0239     { 0x2a, 0x00}, /* HFR_CTL   */
0240     { 0x2b, 0x05}, /* ALC_CTL   */
0241     { 0x2c, 0x00}, /* ALC_SET1  */
0242     { 0x2d, 0x00}, /* ALC_SET2  */
0243     { 0x2e, 0x00}, /* BOOST_CTL */
0244     { 0x2f, 0x00}, /* SOFTVOL_CTL   */
0245     { 0x30, 0x13}, /* DTMF_FREQSEL  */
0246     { 0x31, 0x00}, /* DTMF_TONEXT1H */
0247     { 0x32, 0x00}, /* DTMF_TONEXT1L */
0248     { 0x33, 0x00}, /* DTMF_TONEXT2H */
0249     { 0x34, 0x00}, /* DTMF_TONEXT2L */
0250     { 0x35, 0x79}, /* DTMF_TONOFF   */
0251     { 0x36, 0x11}, /* DTMF_WANONOFF */
0252     { 0x37, 0x00}, /* I2S_RX_SCRAMBLE_H */
0253     { 0x38, 0x00}, /* I2S_RX_SCRAMBLE_M */
0254     { 0x39, 0x00}, /* I2S_RX_SCRAMBLE_L */
0255     { 0x3a, 0x06}, /* APLL_CTL */
0256     { 0x3b, 0x00}, /* DTMF_CTL */
0257     { 0x3c, 0x44}, /* DTMF_PGA_CTL2 (0x3C) */
0258     { 0x3d, 0x69}, /* DTMF_PGA_CTL1 (0x3D) */
0259     { 0x3e, 0x00}, /* MISC_SET_1 */
0260     { 0x3f, 0x00}, /* PCMBTMUX */
0261     /* 0x40 - 0x42  Unused */
0262     { 0x43, 0x00}, /* RX_PATH_SEL */
0263     { 0x44, 0x32}, /* VDL_APGA_CTL */
0264     { 0x45, 0x00}, /* VIBRA_CTL */
0265     { 0x46, 0x00}, /* VIBRA_SET */
0266     { 0x47, 0x00}, /* VIBRA_PWM_SET */
0267     { 0x48, 0x00}, /* ANAMIC_GAIN   */
0268     { 0x49, 0x00}, /* MISC_SET_2    */
0269     /* End of Audio Registers */
0270 };
0271 
0272 static bool twl4030_49_nop_reg(struct device *dev, unsigned int reg)
0273 {
0274     switch (reg) {
0275     case 0x00:
0276     case 0x03:
0277     case 0x40:
0278     case 0x41:
0279     case 0x42:
0280         return false;
0281     default:
0282         return true;
0283     }
0284 }
0285 
0286 static const struct regmap_range twl4030_49_volatile_ranges[] = {
0287     regmap_reg_range(TWL4030_BASEADD_TEST, 0xff),
0288 };
0289 
0290 static const struct regmap_access_table twl4030_49_volatile_table = {
0291     .yes_ranges = twl4030_49_volatile_ranges,
0292     .n_yes_ranges = ARRAY_SIZE(twl4030_49_volatile_ranges),
0293 };
0294 
0295 static const struct regmap_config twl4030_regmap_config[4] = {
0296     {
0297         /* Address 0x48 */
0298         .reg_bits = 8,
0299         .val_bits = 8,
0300         .max_register = 0xff,
0301     },
0302     {
0303         /* Address 0x49 */
0304         .reg_bits = 8,
0305         .val_bits = 8,
0306         .max_register = 0xff,
0307 
0308         .readable_reg = twl4030_49_nop_reg,
0309         .writeable_reg = twl4030_49_nop_reg,
0310 
0311         .volatile_table = &twl4030_49_volatile_table,
0312 
0313         .reg_defaults = twl4030_49_defaults,
0314         .num_reg_defaults = ARRAY_SIZE(twl4030_49_defaults),
0315         .cache_type = REGCACHE_RBTREE,
0316     },
0317     {
0318         /* Address 0x4a */
0319         .reg_bits = 8,
0320         .val_bits = 8,
0321         .max_register = 0xff,
0322     },
0323     {
0324         /* Address 0x4b */
0325         .reg_bits = 8,
0326         .val_bits = 8,
0327         .max_register = 0xff,
0328     },
0329 };
0330 
0331 static struct twl_mapping twl6030_map[] = {
0332     /*
0333      * NOTE:  don't change this table without updating the
0334      * <linux/mfd/twl.h> defines for TWL4030_MODULE_*
0335      * so they continue to match the order in this table.
0336      */
0337 
0338     /* Common IPs */
0339     { 1, TWL6030_BASEADD_USB },
0340     { 1, TWL6030_BASEADD_PIH },
0341     { 1, TWL6030_BASEADD_CHARGER },
0342     { 0, TWL6030_BASEADD_PM_MASTER },
0343     { 0, TWL6030_BASEADD_PM_SLAVE_MISC },
0344 
0345     { 0, TWL6030_BASEADD_RTC },
0346     { 1, TWL6030_BASEADD_PWM },
0347     { 1, TWL6030_BASEADD_LED },
0348     { 0, TWL6030_BASEADD_SECURED_REG },
0349 
0350     /* TWL6030 specific IPs */
0351     { 0, TWL6030_BASEADD_ZERO },
0352     { 1, TWL6030_BASEADD_ZERO },
0353     { 2, TWL6030_BASEADD_ZERO },
0354     { 1, TWL6030_BASEADD_GPADC_CTRL },
0355     { 1, TWL6030_BASEADD_GASGAUGE },
0356 };
0357 
0358 static const struct regmap_config twl6030_regmap_config[3] = {
0359     {
0360         /* Address 0x48 */
0361         .reg_bits = 8,
0362         .val_bits = 8,
0363         .max_register = 0xff,
0364     },
0365     {
0366         /* Address 0x49 */
0367         .reg_bits = 8,
0368         .val_bits = 8,
0369         .max_register = 0xff,
0370     },
0371     {
0372         /* Address 0x4a */
0373         .reg_bits = 8,
0374         .val_bits = 8,
0375         .max_register = 0xff,
0376     },
0377 };
0378 
0379 /*----------------------------------------------------------------------*/
0380 
0381 static inline int twl_get_num_slaves(void)
0382 {
0383     if (twl_class_is_4030())
0384         return 4; /* TWL4030 class have four slave address */
0385     else
0386         return 3; /* TWL6030 class have three slave address */
0387 }
0388 
0389 static inline int twl_get_last_module(void)
0390 {
0391     if (twl_class_is_4030())
0392         return TWL4030_MODULE_LAST;
0393     else
0394         return TWL6030_MODULE_LAST;
0395 }
0396 
0397 /* Exported Functions */
0398 
0399 unsigned int twl_rev(void)
0400 {
0401     return twl_priv ? twl_priv->twl_id : 0;
0402 }
0403 EXPORT_SYMBOL(twl_rev);
0404 
0405 /**
0406  * twl_get_regmap - Get the regmap associated with the given module
0407  * @mod_no: module number
0408  *
0409  * Returns the regmap pointer or NULL in case of failure.
0410  */
0411 static struct regmap *twl_get_regmap(u8 mod_no)
0412 {
0413     int sid;
0414     struct twl_client *twl;
0415 
0416     if (unlikely(!twl_priv || !twl_priv->ready)) {
0417         pr_err("%s: not initialized\n", DRIVER_NAME);
0418         return NULL;
0419     }
0420     if (unlikely(mod_no >= twl_get_last_module())) {
0421         pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no);
0422         return NULL;
0423     }
0424 
0425     sid = twl_priv->twl_map[mod_no].sid;
0426     twl = &twl_priv->twl_modules[sid];
0427 
0428     return twl->regmap;
0429 }
0430 
0431 /**
0432  * twl_i2c_write - Writes a n bit register in TWL4030/TWL5030/TWL60X0
0433  * @mod_no: module number
0434  * @value: an array of num_bytes+1 containing data to write
0435  * @reg: register address (just offset will do)
0436  * @num_bytes: number of bytes to transfer
0437  *
0438  * Returns 0 on success or else a negative error code.
0439  */
0440 int twl_i2c_write(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes)
0441 {
0442     struct regmap *regmap = twl_get_regmap(mod_no);
0443     int ret;
0444 
0445     if (!regmap)
0446         return -EPERM;
0447 
0448     ret = regmap_bulk_write(regmap, twl_priv->twl_map[mod_no].base + reg,
0449                 value, num_bytes);
0450 
0451     if (ret)
0452         pr_err("%s: Write failed (mod %d, reg 0x%02x count %d)\n",
0453                DRIVER_NAME, mod_no, reg, num_bytes);
0454 
0455     return ret;
0456 }
0457 EXPORT_SYMBOL(twl_i2c_write);
0458 
0459 /**
0460  * twl_i2c_read - Reads a n bit register in TWL4030/TWL5030/TWL60X0
0461  * @mod_no: module number
0462  * @value: an array of num_bytes containing data to be read
0463  * @reg: register address (just offset will do)
0464  * @num_bytes: number of bytes to transfer
0465  *
0466  * Returns 0 on success or else a negative error code.
0467  */
0468 int twl_i2c_read(u8 mod_no, u8 *value, u8 reg, unsigned num_bytes)
0469 {
0470     struct regmap *regmap = twl_get_regmap(mod_no);
0471     int ret;
0472 
0473     if (!regmap)
0474         return -EPERM;
0475 
0476     ret = regmap_bulk_read(regmap, twl_priv->twl_map[mod_no].base + reg,
0477                    value, num_bytes);
0478 
0479     if (ret)
0480         pr_err("%s: Read failed (mod %d, reg 0x%02x count %d)\n",
0481                DRIVER_NAME, mod_no, reg, num_bytes);
0482 
0483     return ret;
0484 }
0485 EXPORT_SYMBOL(twl_i2c_read);
0486 
0487 /**
0488  * twl_set_regcache_bypass - Configure the regcache bypass for the regmap associated
0489  *           with the module
0490  * @mod_no: module number
0491  * @enable: Regcache bypass state
0492  *
0493  * Returns 0 else failure.
0494  */
0495 int twl_set_regcache_bypass(u8 mod_no, bool enable)
0496 {
0497     struct regmap *regmap = twl_get_regmap(mod_no);
0498 
0499     if (!regmap)
0500         return -EPERM;
0501 
0502     regcache_cache_bypass(regmap, enable);
0503 
0504     return 0;
0505 }
0506 EXPORT_SYMBOL(twl_set_regcache_bypass);
0507 
0508 /*----------------------------------------------------------------------*/
0509 
0510 /**
0511  * twl_read_idcode_register - API to read the IDCODE register.
0512  *
0513  * Unlocks the IDCODE register and read the 32 bit value.
0514  */
0515 static int twl_read_idcode_register(void)
0516 {
0517     int err;
0518 
0519     err = twl_i2c_write_u8(TWL4030_MODULE_INTBR, TWL_EEPROM_R_UNLOCK,
0520                         REG_UNLOCK_TEST_REG);
0521     if (err) {
0522         pr_err("TWL4030 Unable to unlock IDCODE registers -%d\n", err);
0523         goto fail;
0524     }
0525 
0526     err = twl_i2c_read(TWL4030_MODULE_INTBR, (u8 *)(&twl_priv->twl_idcode),
0527                         REG_IDCODE_7_0, 4);
0528     if (err) {
0529         pr_err("TWL4030: unable to read IDCODE -%d\n", err);
0530         goto fail;
0531     }
0532 
0533     err = twl_i2c_write_u8(TWL4030_MODULE_INTBR, 0x0, REG_UNLOCK_TEST_REG);
0534     if (err)
0535         pr_err("TWL4030 Unable to relock IDCODE registers -%d\n", err);
0536 fail:
0537     return err;
0538 }
0539 
0540 /**
0541  * twl_get_type - API to get TWL Si type.
0542  *
0543  * Api to get the TWL Si type from IDCODE value.
0544  */
0545 int twl_get_type(void)
0546 {
0547     return TWL_SIL_TYPE(twl_priv->twl_idcode);
0548 }
0549 EXPORT_SYMBOL_GPL(twl_get_type);
0550 
0551 /**
0552  * twl_get_version - API to get TWL Si version.
0553  *
0554  * Api to get the TWL Si version from IDCODE value.
0555  */
0556 int twl_get_version(void)
0557 {
0558     return TWL_SIL_REV(twl_priv->twl_idcode);
0559 }
0560 EXPORT_SYMBOL_GPL(twl_get_version);
0561 
0562 /**
0563  * twl_get_hfclk_rate - API to get TWL external HFCLK clock rate.
0564  *
0565  * Api to get the TWL HFCLK rate based on BOOT_CFG register.
0566  */
0567 int twl_get_hfclk_rate(void)
0568 {
0569     u8 ctrl;
0570     int rate;
0571 
0572     twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &ctrl, R_CFG_BOOT);
0573 
0574     switch (ctrl & 0x3) {
0575     case HFCLK_FREQ_19p2_MHZ:
0576         rate = 19200000;
0577         break;
0578     case HFCLK_FREQ_26_MHZ:
0579         rate = 26000000;
0580         break;
0581     case HFCLK_FREQ_38p4_MHZ:
0582         rate = 38400000;
0583         break;
0584     default:
0585         pr_err("TWL4030: HFCLK is not configured\n");
0586         rate = -EINVAL;
0587         break;
0588     }
0589 
0590     return rate;
0591 }
0592 EXPORT_SYMBOL_GPL(twl_get_hfclk_rate);
0593 
0594 static struct device *
0595 add_numbered_child(unsigned mod_no, const char *name, int num,
0596         void *pdata, unsigned pdata_len,
0597         bool can_wakeup, int irq0, int irq1)
0598 {
0599     struct platform_device  *pdev;
0600     struct twl_client   *twl;
0601     int         status, sid;
0602 
0603     if (unlikely(mod_no >= twl_get_last_module())) {
0604         pr_err("%s: invalid module number %d\n", DRIVER_NAME, mod_no);
0605         return ERR_PTR(-EPERM);
0606     }
0607     sid = twl_priv->twl_map[mod_no].sid;
0608     twl = &twl_priv->twl_modules[sid];
0609 
0610     pdev = platform_device_alloc(name, num);
0611     if (!pdev)
0612         return ERR_PTR(-ENOMEM);
0613 
0614     pdev->dev.parent = &twl->client->dev;
0615 
0616     if (pdata) {
0617         status = platform_device_add_data(pdev, pdata, pdata_len);
0618         if (status < 0) {
0619             dev_dbg(&pdev->dev, "can't add platform_data\n");
0620             goto put_device;
0621         }
0622     }
0623 
0624     if (irq0) {
0625         struct resource r[2] = {
0626             { .start = irq0, .flags = IORESOURCE_IRQ, },
0627             { .start = irq1, .flags = IORESOURCE_IRQ, },
0628         };
0629 
0630         status = platform_device_add_resources(pdev, r, irq1 ? 2 : 1);
0631         if (status < 0) {
0632             dev_dbg(&pdev->dev, "can't add irqs\n");
0633             goto put_device;
0634         }
0635     }
0636 
0637     status = platform_device_add(pdev);
0638     if (status)
0639         goto put_device;
0640 
0641     device_init_wakeup(&pdev->dev, can_wakeup);
0642 
0643     return &pdev->dev;
0644 
0645 put_device:
0646     platform_device_put(pdev);
0647     dev_err(&twl->client->dev, "failed to add device %s\n", name);
0648     return ERR_PTR(status);
0649 }
0650 
0651 static inline struct device *add_child(unsigned mod_no, const char *name,
0652         void *pdata, unsigned pdata_len,
0653         bool can_wakeup, int irq0, int irq1)
0654 {
0655     return add_numbered_child(mod_no, name, -1, pdata, pdata_len,
0656         can_wakeup, irq0, irq1);
0657 }
0658 
0659 /*----------------------------------------------------------------------*/
0660 
0661 /*
0662  * These three functions initialize the on-chip clock framework,
0663  * letting it generate the right frequencies for USB, MADC, and
0664  * other purposes.
0665  */
0666 static inline int protect_pm_master(void)
0667 {
0668     int e = 0;
0669 
0670     e = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, 0,
0671                  TWL4030_PM_MASTER_PROTECT_KEY);
0672     return e;
0673 }
0674 
0675 static inline int unprotect_pm_master(void)
0676 {
0677     int e = 0;
0678 
0679     e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG1,
0680                   TWL4030_PM_MASTER_PROTECT_KEY);
0681     e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG2,
0682                   TWL4030_PM_MASTER_PROTECT_KEY);
0683 
0684     return e;
0685 }
0686 
0687 static void clocks_init(struct device *dev)
0688 {
0689     int e = 0;
0690     struct clk *osc;
0691     u32 rate;
0692     u8 ctrl = HFCLK_FREQ_26_MHZ;
0693 
0694     osc = clk_get(dev, "fck");
0695     if (IS_ERR(osc)) {
0696         printk(KERN_WARNING "Skipping twl internal clock init and "
0697                 "using bootloader value (unknown osc rate)\n");
0698         return;
0699     }
0700 
0701     rate = clk_get_rate(osc);
0702     clk_put(osc);
0703 
0704     switch (rate) {
0705     case 19200000:
0706         ctrl = HFCLK_FREQ_19p2_MHZ;
0707         break;
0708     case 26000000:
0709         ctrl = HFCLK_FREQ_26_MHZ;
0710         break;
0711     case 38400000:
0712         ctrl = HFCLK_FREQ_38p4_MHZ;
0713         break;
0714     }
0715 
0716     ctrl |= HIGH_PERF_SQ;
0717 
0718     e |= unprotect_pm_master();
0719     /* effect->MADC+USB ck en */
0720     e |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, ctrl, R_CFG_BOOT);
0721     e |= protect_pm_master();
0722 
0723     if (e < 0)
0724         pr_err("%s: clock init err [%d]\n", DRIVER_NAME, e);
0725 }
0726 
0727 /*----------------------------------------------------------------------*/
0728 
0729 
0730 static int twl_remove(struct i2c_client *client)
0731 {
0732     unsigned i, num_slaves;
0733 
0734     if (twl_class_is_4030())
0735         twl4030_exit_irq();
0736     else
0737         twl6030_exit_irq();
0738 
0739     num_slaves = twl_get_num_slaves();
0740     for (i = 0; i < num_slaves; i++) {
0741         struct twl_client   *twl = &twl_priv->twl_modules[i];
0742 
0743         if (twl->client && twl->client != client)
0744             i2c_unregister_device(twl->client);
0745         twl->client = NULL;
0746     }
0747     twl_priv->ready = false;
0748     return 0;
0749 }
0750 
0751 static struct of_dev_auxdata twl_auxdata_lookup[] = {
0752     OF_DEV_AUXDATA("ti,twl4030-gpio", 0, "twl4030-gpio", NULL),
0753     { /* sentinel */ },
0754 };
0755 
0756 /* NOTE: This driver only handles a single twl4030/tps659x0 chip */
0757 static int
0758 twl_probe(struct i2c_client *client, const struct i2c_device_id *id)
0759 {
0760     struct device_node      *node = client->dev.of_node;
0761     struct platform_device      *pdev;
0762     const struct regmap_config  *twl_regmap_config;
0763     int             irq_base = 0;
0764     int             status;
0765     unsigned            i, num_slaves;
0766 
0767     if (!node) {
0768         dev_err(&client->dev, "no platform data\n");
0769         return -EINVAL;
0770     }
0771 
0772     if (twl_priv) {
0773         dev_dbg(&client->dev, "only one instance of %s allowed\n",
0774             DRIVER_NAME);
0775         return -EBUSY;
0776     }
0777 
0778     pdev = platform_device_alloc(DRIVER_NAME, -1);
0779     if (!pdev) {
0780         dev_err(&client->dev, "can't alloc pdev\n");
0781         return -ENOMEM;
0782     }
0783 
0784     status = platform_device_add(pdev);
0785     if (status) {
0786         platform_device_put(pdev);
0787         return status;
0788     }
0789 
0790     if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C) == 0) {
0791         dev_dbg(&client->dev, "can't talk I2C?\n");
0792         status = -EIO;
0793         goto free;
0794     }
0795 
0796     twl_priv = devm_kzalloc(&client->dev, sizeof(struct twl_private),
0797                 GFP_KERNEL);
0798     if (!twl_priv) {
0799         status = -ENOMEM;
0800         goto free;
0801     }
0802 
0803     if ((id->driver_data) & TWL6030_CLASS) {
0804         twl_priv->twl_id = TWL6030_CLASS_ID;
0805         twl_priv->twl_map = &twl6030_map[0];
0806         /* The charger base address is different in twl6032 */
0807         if ((id->driver_data) & TWL6032_SUBCLASS)
0808             twl_priv->twl_map[TWL_MODULE_MAIN_CHARGE].base =
0809                             TWL6032_BASEADD_CHARGER;
0810         twl_regmap_config = twl6030_regmap_config;
0811     } else {
0812         twl_priv->twl_id = TWL4030_CLASS_ID;
0813         twl_priv->twl_map = &twl4030_map[0];
0814         twl_regmap_config = twl4030_regmap_config;
0815     }
0816 
0817     num_slaves = twl_get_num_slaves();
0818     twl_priv->twl_modules = devm_kcalloc(&client->dev,
0819                      num_slaves,
0820                      sizeof(struct twl_client),
0821                      GFP_KERNEL);
0822     if (!twl_priv->twl_modules) {
0823         status = -ENOMEM;
0824         goto free;
0825     }
0826 
0827     for (i = 0; i < num_slaves; i++) {
0828         struct twl_client *twl = &twl_priv->twl_modules[i];
0829 
0830         if (i == 0) {
0831             twl->client = client;
0832         } else {
0833             twl->client = i2c_new_dummy_device(client->adapter,
0834                             client->addr + i);
0835             if (IS_ERR(twl->client)) {
0836                 dev_err(&client->dev,
0837                     "can't attach client %d\n", i);
0838                 status = PTR_ERR(twl->client);
0839                 goto fail;
0840             }
0841         }
0842 
0843         twl->regmap = devm_regmap_init_i2c(twl->client,
0844                            &twl_regmap_config[i]);
0845         if (IS_ERR(twl->regmap)) {
0846             status = PTR_ERR(twl->regmap);
0847             dev_err(&client->dev,
0848                 "Failed to allocate regmap %d, err: %d\n", i,
0849                 status);
0850             goto fail;
0851         }
0852     }
0853 
0854     twl_priv->ready = true;
0855 
0856     /* setup clock framework */
0857     clocks_init(&client->dev);
0858 
0859     /* read TWL IDCODE Register */
0860     if (twl_class_is_4030()) {
0861         status = twl_read_idcode_register();
0862         WARN(status < 0, "Error: reading twl_idcode register value\n");
0863     }
0864 
0865     /* Maybe init the T2 Interrupt subsystem */
0866     if (client->irq) {
0867         if (twl_class_is_4030()) {
0868             twl4030_init_chip_irq(id->name);
0869             irq_base = twl4030_init_irq(&client->dev, client->irq);
0870         } else {
0871             irq_base = twl6030_init_irq(&client->dev, client->irq);
0872         }
0873 
0874         if (irq_base < 0) {
0875             status = irq_base;
0876             goto fail;
0877         }
0878     }
0879 
0880     /*
0881      * Disable TWL4030/TWL5030 I2C Pull-up on I2C1 and I2C4(SR) interface.
0882      * Program I2C_SCL_CTRL_PU(bit 0)=0, I2C_SDA_CTRL_PU (bit 2)=0,
0883      * SR_I2C_SCL_CTRL_PU(bit 4)=0 and SR_I2C_SDA_CTRL_PU(bit 6)=0.
0884      *
0885      * Also, always enable SmartReflex bit as that's needed for omaps to
0886      * to do anything over I2C4 for voltage scaling even if SmartReflex
0887      * is disabled. Without the SmartReflex bit omap sys_clkreq idle
0888      * signal will never trigger for retention idle.
0889      */
0890     if (twl_class_is_4030()) {
0891         u8 temp;
0892 
0893         twl_i2c_read_u8(TWL4030_MODULE_INTBR, &temp, REG_GPPUPDCTR1);
0894         temp &= ~(SR_I2C_SDA_CTRL_PU | SR_I2C_SCL_CTRL_PU | \
0895             I2C_SDA_CTRL_PU | I2C_SCL_CTRL_PU);
0896         twl_i2c_write_u8(TWL4030_MODULE_INTBR, temp, REG_GPPUPDCTR1);
0897 
0898         twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &temp,
0899                 TWL4030_DCDC_GLOBAL_CFG);
0900         temp |= SMARTREFLEX_ENABLE;
0901         twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, temp,
0902                  TWL4030_DCDC_GLOBAL_CFG);
0903     }
0904 
0905     status = of_platform_populate(node, NULL, twl_auxdata_lookup,
0906                       &client->dev);
0907 
0908 fail:
0909     if (status < 0)
0910         twl_remove(client);
0911 free:
0912     if (status < 0)
0913         platform_device_unregister(pdev);
0914 
0915     return status;
0916 }
0917 
0918 static int __maybe_unused twl_suspend(struct device *dev)
0919 {
0920     struct i2c_client *client = to_i2c_client(dev);
0921 
0922     if (client->irq)
0923         disable_irq(client->irq);
0924 
0925     return 0;
0926 }
0927 
0928 static int __maybe_unused twl_resume(struct device *dev)
0929 {
0930     struct i2c_client *client = to_i2c_client(dev);
0931 
0932     if (client->irq)
0933         enable_irq(client->irq);
0934 
0935     return 0;
0936 }
0937 
0938 static SIMPLE_DEV_PM_OPS(twl_dev_pm_ops, twl_suspend, twl_resume);
0939 
0940 static const struct i2c_device_id twl_ids[] = {
0941     { "twl4030", TWL4030_VAUX2 },   /* "Triton 2" */
0942     { "twl5030", 0 },       /* T2 updated */
0943     { "twl5031", TWL5031 },     /* TWL5030 updated */
0944     { "tps65950", 0 },      /* catalog version of twl5030 */
0945     { "tps65930", TPS_SUBSET }, /* fewer LDOs and DACs; no charger */
0946     { "tps65920", TPS_SUBSET }, /* fewer LDOs; no codec or charger */
0947     { "tps65921", TPS_SUBSET }, /* fewer LDOs; no codec, no LED
0948                        and vibrator. Charger in USB module*/
0949     { "twl6030", TWL6030_CLASS },   /* "Phoenix power chip" */
0950     { "twl6032", TWL6030_CLASS | TWL6032_SUBCLASS }, /* "Phoenix lite" */
0951     { /* end of list */ },
0952 };
0953 
0954 /* One Client Driver , 4 Clients */
0955 static struct i2c_driver twl_driver = {
0956     .driver.name    = DRIVER_NAME,
0957     .driver.pm  = &twl_dev_pm_ops,
0958     .id_table   = twl_ids,
0959     .probe      = twl_probe,
0960     .remove     = twl_remove,
0961 };
0962 builtin_i2c_driver(twl_driver);
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