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0011 #include <linux/init.h>
0012 #include <linux/err.h>
0013 #include <linux/slab.h>
0014 #include <linux/i2c.h>
0015 #include <linux/interrupt.h>
0016 #include <linux/irq.h>
0017 #include <linux/irqdomain.h>
0018 #include <linux/mfd/core.h>
0019 #include <linux/regmap.h>
0020 #include <linux/mfd/tps65910.h>
0021 #include <linux/of.h>
0022 #include <linux/of_device.h>
0023
0024 static const struct resource rtc_resources[] = {
0025 {
0026 .start = TPS65910_IRQ_RTC_ALARM,
0027 .end = TPS65910_IRQ_RTC_ALARM,
0028 .flags = IORESOURCE_IRQ,
0029 }
0030 };
0031
0032 static const struct mfd_cell tps65910s[] = {
0033 {
0034 .name = "tps65910-gpio",
0035 },
0036 {
0037 .name = "tps65910-pmic",
0038 },
0039 {
0040 .name = "tps65910-rtc",
0041 .num_resources = ARRAY_SIZE(rtc_resources),
0042 .resources = &rtc_resources[0],
0043 },
0044 {
0045 .name = "tps65910-power",
0046 },
0047 };
0048
0049
0050 static const struct regmap_irq tps65911_irqs[] = {
0051
0052 [TPS65911_IRQ_PWRHOLD_F] = {
0053 .mask = INT_MSK_PWRHOLD_F_IT_MSK_MASK,
0054 .reg_offset = 0,
0055 },
0056 [TPS65911_IRQ_VBAT_VMHI] = {
0057 .mask = INT_MSK_VMBHI_IT_MSK_MASK,
0058 .reg_offset = 0,
0059 },
0060 [TPS65911_IRQ_PWRON] = {
0061 .mask = INT_MSK_PWRON_IT_MSK_MASK,
0062 .reg_offset = 0,
0063 },
0064 [TPS65911_IRQ_PWRON_LP] = {
0065 .mask = INT_MSK_PWRON_LP_IT_MSK_MASK,
0066 .reg_offset = 0,
0067 },
0068 [TPS65911_IRQ_PWRHOLD_R] = {
0069 .mask = INT_MSK_PWRHOLD_R_IT_MSK_MASK,
0070 .reg_offset = 0,
0071 },
0072 [TPS65911_IRQ_HOTDIE] = {
0073 .mask = INT_MSK_HOTDIE_IT_MSK_MASK,
0074 .reg_offset = 0,
0075 },
0076 [TPS65911_IRQ_RTC_ALARM] = {
0077 .mask = INT_MSK_RTC_ALARM_IT_MSK_MASK,
0078 .reg_offset = 0,
0079 },
0080 [TPS65911_IRQ_RTC_PERIOD] = {
0081 .mask = INT_MSK_RTC_PERIOD_IT_MSK_MASK,
0082 .reg_offset = 0,
0083 },
0084
0085
0086 [TPS65911_IRQ_GPIO0_R] = {
0087 .mask = INT_MSK2_GPIO0_R_IT_MSK_MASK,
0088 .reg_offset = 1,
0089 },
0090 [TPS65911_IRQ_GPIO0_F] = {
0091 .mask = INT_MSK2_GPIO0_F_IT_MSK_MASK,
0092 .reg_offset = 1,
0093 },
0094 [TPS65911_IRQ_GPIO1_R] = {
0095 .mask = INT_MSK2_GPIO1_R_IT_MSK_MASK,
0096 .reg_offset = 1,
0097 },
0098 [TPS65911_IRQ_GPIO1_F] = {
0099 .mask = INT_MSK2_GPIO1_F_IT_MSK_MASK,
0100 .reg_offset = 1,
0101 },
0102 [TPS65911_IRQ_GPIO2_R] = {
0103 .mask = INT_MSK2_GPIO2_R_IT_MSK_MASK,
0104 .reg_offset = 1,
0105 },
0106 [TPS65911_IRQ_GPIO2_F] = {
0107 .mask = INT_MSK2_GPIO2_F_IT_MSK_MASK,
0108 .reg_offset = 1,
0109 },
0110 [TPS65911_IRQ_GPIO3_R] = {
0111 .mask = INT_MSK2_GPIO3_R_IT_MSK_MASK,
0112 .reg_offset = 1,
0113 },
0114 [TPS65911_IRQ_GPIO3_F] = {
0115 .mask = INT_MSK2_GPIO3_F_IT_MSK_MASK,
0116 .reg_offset = 1,
0117 },
0118
0119
0120 [TPS65911_IRQ_GPIO4_R] = {
0121 .mask = INT_MSK3_GPIO4_R_IT_MSK_MASK,
0122 .reg_offset = 2,
0123 },
0124 [TPS65911_IRQ_GPIO4_F] = {
0125 .mask = INT_MSK3_GPIO4_F_IT_MSK_MASK,
0126 .reg_offset = 2,
0127 },
0128 [TPS65911_IRQ_GPIO5_R] = {
0129 .mask = INT_MSK3_GPIO5_R_IT_MSK_MASK,
0130 .reg_offset = 2,
0131 },
0132 [TPS65911_IRQ_GPIO5_F] = {
0133 .mask = INT_MSK3_GPIO5_F_IT_MSK_MASK,
0134 .reg_offset = 2,
0135 },
0136 [TPS65911_IRQ_WTCHDG] = {
0137 .mask = INT_MSK3_WTCHDG_IT_MSK_MASK,
0138 .reg_offset = 2,
0139 },
0140 [TPS65911_IRQ_VMBCH2_H] = {
0141 .mask = INT_MSK3_VMBCH2_H_IT_MSK_MASK,
0142 .reg_offset = 2,
0143 },
0144 [TPS65911_IRQ_VMBCH2_L] = {
0145 .mask = INT_MSK3_VMBCH2_L_IT_MSK_MASK,
0146 .reg_offset = 2,
0147 },
0148 [TPS65911_IRQ_PWRDN] = {
0149 .mask = INT_MSK3_PWRDN_IT_MSK_MASK,
0150 .reg_offset = 2,
0151 },
0152 };
0153
0154 static const struct regmap_irq tps65910_irqs[] = {
0155
0156 [TPS65910_IRQ_VBAT_VMBDCH] = {
0157 .mask = TPS65910_INT_MSK_VMBDCH_IT_MSK_MASK,
0158 .reg_offset = 0,
0159 },
0160 [TPS65910_IRQ_VBAT_VMHI] = {
0161 .mask = TPS65910_INT_MSK_VMBHI_IT_MSK_MASK,
0162 .reg_offset = 0,
0163 },
0164 [TPS65910_IRQ_PWRON] = {
0165 .mask = TPS65910_INT_MSK_PWRON_IT_MSK_MASK,
0166 .reg_offset = 0,
0167 },
0168 [TPS65910_IRQ_PWRON_LP] = {
0169 .mask = TPS65910_INT_MSK_PWRON_LP_IT_MSK_MASK,
0170 .reg_offset = 0,
0171 },
0172 [TPS65910_IRQ_PWRHOLD] = {
0173 .mask = TPS65910_INT_MSK_PWRHOLD_IT_MSK_MASK,
0174 .reg_offset = 0,
0175 },
0176 [TPS65910_IRQ_HOTDIE] = {
0177 .mask = TPS65910_INT_MSK_HOTDIE_IT_MSK_MASK,
0178 .reg_offset = 0,
0179 },
0180 [TPS65910_IRQ_RTC_ALARM] = {
0181 .mask = TPS65910_INT_MSK_RTC_ALARM_IT_MSK_MASK,
0182 .reg_offset = 0,
0183 },
0184 [TPS65910_IRQ_RTC_PERIOD] = {
0185 .mask = TPS65910_INT_MSK_RTC_PERIOD_IT_MSK_MASK,
0186 .reg_offset = 0,
0187 },
0188
0189
0190 [TPS65910_IRQ_GPIO_R] = {
0191 .mask = TPS65910_INT_MSK2_GPIO0_F_IT_MSK_MASK,
0192 .reg_offset = 1,
0193 },
0194 [TPS65910_IRQ_GPIO_F] = {
0195 .mask = TPS65910_INT_MSK2_GPIO0_R_IT_MSK_MASK,
0196 .reg_offset = 1,
0197 },
0198 };
0199
0200 static struct regmap_irq_chip tps65911_irq_chip = {
0201 .name = "tps65910",
0202 .irqs = tps65911_irqs,
0203 .num_irqs = ARRAY_SIZE(tps65911_irqs),
0204 .num_regs = 3,
0205 .irq_reg_stride = 2,
0206 .status_base = TPS65910_INT_STS,
0207 .mask_base = TPS65910_INT_MSK,
0208 .ack_base = TPS65910_INT_STS,
0209 };
0210
0211 static struct regmap_irq_chip tps65910_irq_chip = {
0212 .name = "tps65910",
0213 .irqs = tps65910_irqs,
0214 .num_irqs = ARRAY_SIZE(tps65910_irqs),
0215 .num_regs = 2,
0216 .irq_reg_stride = 2,
0217 .status_base = TPS65910_INT_STS,
0218 .mask_base = TPS65910_INT_MSK,
0219 .ack_base = TPS65910_INT_STS,
0220 };
0221
0222 static int tps65910_irq_init(struct tps65910 *tps65910, int irq,
0223 struct tps65910_platform_data *pdata)
0224 {
0225 int ret;
0226 static struct regmap_irq_chip *tps6591x_irqs_chip;
0227
0228 if (!irq) {
0229 dev_warn(tps65910->dev, "No interrupt support, no core IRQ\n");
0230 return -EINVAL;
0231 }
0232
0233 if (!pdata) {
0234 dev_warn(tps65910->dev, "No interrupt support, no pdata\n");
0235 return -EINVAL;
0236 }
0237
0238 switch (tps65910_chip_id(tps65910)) {
0239 case TPS65910:
0240 tps6591x_irqs_chip = &tps65910_irq_chip;
0241 break;
0242 case TPS65911:
0243 tps6591x_irqs_chip = &tps65911_irq_chip;
0244 break;
0245 }
0246
0247 tps65910->chip_irq = irq;
0248 ret = devm_regmap_add_irq_chip(tps65910->dev, tps65910->regmap,
0249 tps65910->chip_irq,
0250 IRQF_ONESHOT, pdata->irq_base,
0251 tps6591x_irqs_chip, &tps65910->irq_data);
0252 if (ret < 0) {
0253 dev_warn(tps65910->dev, "Failed to add irq_chip %d\n", ret);
0254 tps65910->chip_irq = 0;
0255 }
0256 return ret;
0257 }
0258
0259 static bool is_volatile_reg(struct device *dev, unsigned int reg)
0260 {
0261 struct tps65910 *tps65910 = dev_get_drvdata(dev);
0262
0263
0264
0265
0266
0267
0268 if ((reg >= TPS65910_VIO) && (reg <= TPS65910_VDAC)) {
0269
0270 if (tps65910_chip_id(tps65910) == TPS65910)
0271 if ((reg == TPS65911_VDDCTRL_OP) ||
0272 (reg == TPS65911_VDDCTRL_SR))
0273 return true;
0274 return false;
0275 }
0276 return true;
0277 }
0278
0279 static const struct regmap_config tps65910_regmap_config = {
0280 .reg_bits = 8,
0281 .val_bits = 8,
0282 .volatile_reg = is_volatile_reg,
0283 .max_register = TPS65910_MAX_REGISTER - 1,
0284 .cache_type = REGCACHE_RBTREE,
0285 };
0286
0287 static int tps65910_ck32k_init(struct tps65910 *tps65910,
0288 struct tps65910_board *pmic_pdata)
0289 {
0290 int ret;
0291
0292 if (!pmic_pdata->en_ck32k_xtal)
0293 return 0;
0294
0295 ret = regmap_clear_bits(tps65910->regmap, TPS65910_DEVCTRL,
0296 DEVCTRL_CK32K_CTRL_MASK);
0297 if (ret < 0) {
0298 dev_err(tps65910->dev, "clear ck32k_ctrl failed: %d\n", ret);
0299 return ret;
0300 }
0301
0302 return 0;
0303 }
0304
0305 static int tps65910_sleepinit(struct tps65910 *tps65910,
0306 struct tps65910_board *pmic_pdata)
0307 {
0308 struct device *dev;
0309 int ret;
0310
0311 if (!pmic_pdata->en_dev_slp)
0312 return 0;
0313
0314 dev = tps65910->dev;
0315
0316
0317 ret = regmap_set_bits(tps65910->regmap, TPS65910_DEVCTRL,
0318 DEVCTRL_DEV_SLP_MASK);
0319 if (ret < 0) {
0320 dev_err(dev, "set dev_slp failed: %d\n", ret);
0321 goto err_sleep_init;
0322 }
0323
0324 if (pmic_pdata->slp_keepon.therm_keepon) {
0325 ret = regmap_set_bits(tps65910->regmap,
0326 TPS65910_SLEEP_KEEP_RES_ON,
0327 SLEEP_KEEP_RES_ON_THERM_KEEPON_MASK);
0328 if (ret < 0) {
0329 dev_err(dev, "set therm_keepon failed: %d\n", ret);
0330 goto disable_dev_slp;
0331 }
0332 }
0333
0334 if (pmic_pdata->slp_keepon.clkout32k_keepon) {
0335 ret = regmap_set_bits(tps65910->regmap,
0336 TPS65910_SLEEP_KEEP_RES_ON,
0337 SLEEP_KEEP_RES_ON_CLKOUT32K_KEEPON_MASK);
0338 if (ret < 0) {
0339 dev_err(dev, "set clkout32k_keepon failed: %d\n", ret);
0340 goto disable_dev_slp;
0341 }
0342 }
0343
0344 if (pmic_pdata->slp_keepon.i2chs_keepon) {
0345 ret = regmap_set_bits(tps65910->regmap,
0346 TPS65910_SLEEP_KEEP_RES_ON,
0347 SLEEP_KEEP_RES_ON_I2CHS_KEEPON_MASK);
0348 if (ret < 0) {
0349 dev_err(dev, "set i2chs_keepon failed: %d\n", ret);
0350 goto disable_dev_slp;
0351 }
0352 }
0353
0354 return 0;
0355
0356 disable_dev_slp:
0357 regmap_clear_bits(tps65910->regmap, TPS65910_DEVCTRL,
0358 DEVCTRL_DEV_SLP_MASK);
0359
0360 err_sleep_init:
0361 return ret;
0362 }
0363
0364 #ifdef CONFIG_OF
0365 static const struct of_device_id tps65910_of_match[] = {
0366 { .compatible = "ti,tps65910", .data = (void *)TPS65910},
0367 { .compatible = "ti,tps65911", .data = (void *)TPS65911},
0368 { },
0369 };
0370
0371 static struct tps65910_board *tps65910_parse_dt(struct i2c_client *client,
0372 unsigned long *chip_id)
0373 {
0374 struct device_node *np = client->dev.of_node;
0375 struct tps65910_board *board_info;
0376 unsigned int prop;
0377 const struct of_device_id *match;
0378 int ret;
0379
0380 match = of_match_device(tps65910_of_match, &client->dev);
0381 if (!match) {
0382 dev_err(&client->dev, "Failed to find matching dt id\n");
0383 return NULL;
0384 }
0385
0386 *chip_id = (unsigned long)match->data;
0387
0388 board_info = devm_kzalloc(&client->dev, sizeof(*board_info),
0389 GFP_KERNEL);
0390 if (!board_info)
0391 return NULL;
0392
0393 ret = of_property_read_u32(np, "ti,vmbch-threshold", &prop);
0394 if (!ret)
0395 board_info->vmbch_threshold = prop;
0396
0397 ret = of_property_read_u32(np, "ti,vmbch2-threshold", &prop);
0398 if (!ret)
0399 board_info->vmbch2_threshold = prop;
0400
0401 prop = of_property_read_bool(np, "ti,en-ck32k-xtal");
0402 board_info->en_ck32k_xtal = prop;
0403
0404 prop = of_property_read_bool(np, "ti,sleep-enable");
0405 board_info->en_dev_slp = prop;
0406
0407 prop = of_property_read_bool(np, "ti,sleep-keep-therm");
0408 board_info->slp_keepon.therm_keepon = prop;
0409
0410 prop = of_property_read_bool(np, "ti,sleep-keep-ck32k");
0411 board_info->slp_keepon.clkout32k_keepon = prop;
0412
0413 prop = of_property_read_bool(np, "ti,sleep-keep-hsclk");
0414 board_info->slp_keepon.i2chs_keepon = prop;
0415
0416 board_info->irq = client->irq;
0417 board_info->irq_base = -1;
0418 board_info->pm_off = of_property_read_bool(np,
0419 "ti,system-power-controller");
0420
0421 return board_info;
0422 }
0423 #else
0424 static inline
0425 struct tps65910_board *tps65910_parse_dt(struct i2c_client *client,
0426 unsigned long *chip_id)
0427 {
0428 return NULL;
0429 }
0430 #endif
0431
0432 static struct i2c_client *tps65910_i2c_client;
0433 static void tps65910_power_off(void)
0434 {
0435 struct tps65910 *tps65910;
0436
0437 tps65910 = dev_get_drvdata(&tps65910_i2c_client->dev);
0438
0439 regmap_update_bits(tps65910->regmap, TPS65910_DEVCTRL,
0440 DEVCTRL_DEV_OFF_MASK | DEVCTRL_DEV_ON_MASK,
0441 DEVCTRL_DEV_OFF_MASK);
0442 }
0443
0444 static int tps65910_i2c_probe(struct i2c_client *i2c,
0445 const struct i2c_device_id *id)
0446 {
0447 struct tps65910 *tps65910;
0448 struct tps65910_board *pmic_plat_data;
0449 struct tps65910_board *of_pmic_plat_data = NULL;
0450 struct tps65910_platform_data *init_data;
0451 unsigned long chip_id = id->driver_data;
0452 int ret;
0453
0454 pmic_plat_data = dev_get_platdata(&i2c->dev);
0455
0456 if (!pmic_plat_data && i2c->dev.of_node) {
0457 pmic_plat_data = tps65910_parse_dt(i2c, &chip_id);
0458 of_pmic_plat_data = pmic_plat_data;
0459 }
0460
0461 if (!pmic_plat_data)
0462 return -EINVAL;
0463
0464 init_data = devm_kzalloc(&i2c->dev, sizeof(*init_data), GFP_KERNEL);
0465 if (init_data == NULL)
0466 return -ENOMEM;
0467
0468 tps65910 = devm_kzalloc(&i2c->dev, sizeof(*tps65910), GFP_KERNEL);
0469 if (tps65910 == NULL)
0470 return -ENOMEM;
0471
0472 tps65910->of_plat_data = of_pmic_plat_data;
0473 i2c_set_clientdata(i2c, tps65910);
0474 tps65910->dev = &i2c->dev;
0475 tps65910->i2c_client = i2c;
0476 tps65910->id = chip_id;
0477
0478
0479
0480
0481
0482 i2c_master_send(i2c, "", 1);
0483 tps65910->regmap = devm_regmap_init_i2c(i2c, &tps65910_regmap_config);
0484 if (IS_ERR(tps65910->regmap)) {
0485 ret = PTR_ERR(tps65910->regmap);
0486 dev_err(&i2c->dev, "regmap initialization failed: %d\n", ret);
0487 return ret;
0488 }
0489
0490 init_data->irq = pmic_plat_data->irq;
0491 init_data->irq_base = pmic_plat_data->irq_base;
0492
0493 tps65910_irq_init(tps65910, init_data->irq, init_data);
0494 tps65910_ck32k_init(tps65910, pmic_plat_data);
0495 tps65910_sleepinit(tps65910, pmic_plat_data);
0496
0497 if (pmic_plat_data->pm_off && !pm_power_off) {
0498
0499
0500
0501
0502
0503 ret = regmap_set_bits(tps65910->regmap, TPS65910_DEVCTRL,
0504 DEVCTRL_PWR_OFF_MASK);
0505 if (ret) {
0506 dev_err(&i2c->dev, "failed to set power-off mode: %d\n",
0507 ret);
0508 return ret;
0509 }
0510
0511 tps65910_i2c_client = i2c;
0512 pm_power_off = tps65910_power_off;
0513 }
0514
0515 ret = devm_mfd_add_devices(tps65910->dev, -1,
0516 tps65910s, ARRAY_SIZE(tps65910s),
0517 NULL, 0,
0518 regmap_irq_get_domain(tps65910->irq_data));
0519 if (ret < 0) {
0520 dev_err(&i2c->dev, "mfd_add_devices failed: %d\n", ret);
0521 return ret;
0522 }
0523
0524 return ret;
0525 }
0526
0527 static const struct i2c_device_id tps65910_i2c_id[] = {
0528 { "tps65910", TPS65910 },
0529 { "tps65911", TPS65911 },
0530 { }
0531 };
0532
0533 static struct i2c_driver tps65910_i2c_driver = {
0534 .driver = {
0535 .name = "tps65910",
0536 .of_match_table = of_match_ptr(tps65910_of_match),
0537 },
0538 .probe = tps65910_i2c_probe,
0539 .id_table = tps65910_i2c_id,
0540 };
0541
0542 static int __init tps65910_i2c_init(void)
0543 {
0544 return i2c_add_driver(&tps65910_i2c_driver);
0545 }
0546
0547 subsys_initcall(tps65910_i2c_init);