drivers/mfd/tmio_core.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Copyright(c) 2009 Ian Molton <spyro@f2s.com>
0004  */
0005
0006 #include <linux/export.h>
0007 #include <linux/mfd/tmio.h>
0008
0009 #define CNF_CMD     0x04
0010 #define CNF_CTL_BASE   0x10
0011 #define CNF_INT_PIN  0x3d
0012 #define CNF_STOP_CLK_CTL 0x40
0013 #define CNF_GCLK_CTL 0x41
0014 #define CNF_SD_CLK_MODE 0x42
0015 #define CNF_PIN_STATUS 0x44
0016 #define CNF_PWR_CTL_1 0x48
0017 #define CNF_PWR_CTL_2 0x49
0018 #define CNF_PWR_CTL_3 0x4a
0019 #define CNF_CARD_DETECT_MODE 0x4c
0020 #define CNF_SD_SLOT 0x50
0021 #define CNF_EXT_GCLK_CTL_1 0xf0
0022 #define CNF_EXT_GCLK_CTL_2 0xf1
0023 #define CNF_EXT_GCLK_CTL_3 0xf9
0024 #define CNF_SD_LED_EN_1 0xfa
0025 #define CNF_SD_LED_EN_2 0xfe
0026
0027 #define   SDCREN 0x2   /* Enable access to MMC CTL regs. (flag in COMMAND_REG)*/
0028
0029 int tmio_core_mmc_enable(void __iomem *cnf, int shift, unsigned long base)
0030 {
0031     /* Enable the MMC/SD Control registers */
0032     sd_config_write16(cnf, shift, CNF_CMD, SDCREN);
0033     sd_config_write32(cnf, shift, CNF_CTL_BASE, base & 0xfffe);
0034
0035     /* Disable SD power during suspend */
0036     sd_config_write8(cnf, shift, CNF_PWR_CTL_3, 0x01);
0037
0038     /* The below is required but why? FIXME */
0039     sd_config_write8(cnf, shift, CNF_STOP_CLK_CTL, 0x1f);
0040
0041     /* Power down SD bus */
0042     sd_config_write8(cnf, shift, CNF_PWR_CTL_2, 0x00);
0043
0044     return 0;
0045 }
0046 EXPORT_SYMBOL(tmio_core_mmc_enable);
0047
0048 int tmio_core_mmc_resume(void __iomem *cnf, int shift, unsigned long base)
0049 {
0050
0051     /* Enable the MMC/SD Control registers */
0052     sd_config_write16(cnf, shift, CNF_CMD, SDCREN);
0053     sd_config_write32(cnf, shift, CNF_CTL_BASE, base & 0xfffe);
0054
0055     return 0;
0056 }
0057 EXPORT_SYMBOL(tmio_core_mmc_resume);
0058
0059 void tmio_core_mmc_pwr(void __iomem *cnf, int shift, int state)
0060 {
0061     sd_config_write8(cnf, shift, CNF_PWR_CTL_2, state ? 0x02 : 0x00);
0062 }
0063 EXPORT_SYMBOL(tmio_core_mmc_pwr);
0064
0065 void tmio_core_mmc_clk_div(void __iomem *cnf, int shift, int state)
0066 {
0067     sd_config_write8(cnf, shift, CNF_SD_CLK_MODE, state ? 1 : 0);
0068 }
0069 EXPORT_SYMBOL(tmio_core_mmc_clk_div);
0070