drivers/mfd/rk808.c

0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * MFD core driver for Rockchip RK808/RK818
0004  *
0005  * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
0006  *
0007  * Author: Chris Zhong <zyw@rock-chips.com>
0008  * Author: Zhang Qing <zhangqing@rock-chips.com>
0009  *
0010  * Copyright (C) 2016 PHYTEC Messtechnik GmbH
0011  *
0012  * Author: Wadim Egorov <w.egorov@phytec.de>
0013  */
0014
0015 #include <linux/i2c.h>
0016 #include <linux/interrupt.h>
0017 #include <linux/mfd/rk808.h>
0018 #include <linux/mfd/core.h>
0019 #include <linux/module.h>
0020 #include <linux/of_device.h>
0021 #include <linux/regmap.h>
0022 #include <linux/reboot.h>
0023
0024 struct rk808_reg_data {
0025     int addr;
0026     int mask;
0027     int value;
0028 };
0029
0030 static bool rk808_is_volatile_reg(struct device *dev, unsigned int reg)
0031 {
0032     /*
0033      * Notes:
0034      * - Technically the ROUND_30s bit makes RTC_CTRL_REG volatile, but
0035      *   we don't use that feature.  It's better to cache.
0036      * - It's unlikely we care that RK808_DEVCTRL_REG is volatile since
0037      *   bits are cleared in case when we shutoff anyway, but better safe.
0038      */
0039
0040     switch (reg) {
0041     case RK808_SECONDS_REG ... RK808_WEEKS_REG:
0042     case RK808_RTC_STATUS_REG:
0043     case RK808_VB_MON_REG:
0044     case RK808_THERMAL_REG:
0045     case RK808_DCDC_UV_STS_REG:
0046     case RK808_LDO_UV_STS_REG:
0047     case RK808_DCDC_PG_REG:
0048     case RK808_LDO_PG_REG:
0049     case RK808_DEVCTRL_REG:
0050     case RK808_INT_STS_REG1:
0051     case RK808_INT_STS_REG2:
0052         return true;
0053     }
0054
0055     return false;
0056 }
0057
0058 static bool rk817_is_volatile_reg(struct device *dev, unsigned int reg)
0059 {
0060     /*
0061      * Notes:
0062      * - Technically the ROUND_30s bit makes RTC_CTRL_REG volatile, but
0063      *   we don't use that feature.  It's better to cache.
0064      */
0065
0066     switch (reg) {
0067     case RK817_SECONDS_REG ... RK817_WEEKS_REG:
0068     case RK817_RTC_STATUS_REG:
0069     case RK817_CODEC_DTOP_LPT_SRST:
0070     case RK817_INT_STS_REG0:
0071     case RK817_INT_STS_REG1:
0072     case RK817_INT_STS_REG2:
0073     case RK817_SYS_STS:
0074         return true;
0075     }
0076
0077     return true;
0078 }
0079
0080 static const struct regmap_config rk818_regmap_config = {
0081     .reg_bits = 8,
0082     .val_bits = 8,
0083     .max_register = RK818_USB_CTRL_REG,
0084     .cache_type = REGCACHE_RBTREE,
0085     .volatile_reg = rk808_is_volatile_reg,
0086 };
0087
0088 static const struct regmap_config rk805_regmap_config = {
0089     .reg_bits = 8,
0090     .val_bits = 8,
0091     .max_register = RK805_OFF_SOURCE_REG,
0092     .cache_type = REGCACHE_RBTREE,
0093     .volatile_reg = rk808_is_volatile_reg,
0094 };
0095
0096 static const struct regmap_config rk808_regmap_config = {
0097     .reg_bits = 8,
0098     .val_bits = 8,
0099     .max_register = RK808_IO_POL_REG,
0100     .cache_type = REGCACHE_RBTREE,
0101     .volatile_reg = rk808_is_volatile_reg,
0102 };
0103
0104 static const struct regmap_config rk817_regmap_config = {
0105     .reg_bits = 8,
0106     .val_bits = 8,
0107     .max_register = RK817_GPIO_INT_CFG,
0108     .cache_type = REGCACHE_NONE,
0109     .volatile_reg = rk817_is_volatile_reg,
0110 };
0111
0112 static const struct resource rtc_resources[] = {
0113     DEFINE_RES_IRQ(RK808_IRQ_RTC_ALARM),
0114 };
0115
0116 static const struct resource rk817_rtc_resources[] = {
0117     DEFINE_RES_IRQ(RK817_IRQ_RTC_ALARM),
0118 };
0119
0120 static const struct resource rk805_key_resources[] = {
0121     DEFINE_RES_IRQ(RK805_IRQ_PWRON_RISE),
0122     DEFINE_RES_IRQ(RK805_IRQ_PWRON_FALL),
0123 };
0124
0125 static const struct resource rk817_pwrkey_resources[] = {
0126     DEFINE_RES_IRQ(RK817_IRQ_PWRON_RISE),
0127     DEFINE_RES_IRQ(RK817_IRQ_PWRON_FALL),
0128 };
0129
0130 static const struct mfd_cell rk805s[] = {
0131     { .name = "rk808-clkout", },
0132     { .name = "rk808-regulator", },
0133     { .name = "rk805-pinctrl", },
0134     {
0135         .name = "rk808-rtc",
0136         .num_resources = ARRAY_SIZE(rtc_resources),
0137         .resources = &rtc_resources[0],
0138     },
0139     {   .name = "rk805-pwrkey",
0140         .num_resources = ARRAY_SIZE(rk805_key_resources),
0141         .resources = &rk805_key_resources[0],
0142     },
0143 };
0144
0145 static const struct mfd_cell rk808s[] = {
0146     { .name = "rk808-clkout", },
0147     { .name = "rk808-regulator", },
0148     {
0149         .name = "rk808-rtc",
0150         .num_resources = ARRAY_SIZE(rtc_resources),
0151         .resources = rtc_resources,
0152     },
0153 };
0154
0155 static const struct mfd_cell rk817s[] = {
0156     { .name = "rk808-clkout",},
0157     { .name = "rk808-regulator",},
0158     {
0159         .name = "rk805-pwrkey",
0160         .num_resources = ARRAY_SIZE(rk817_pwrkey_resources),
0161         .resources = &rk817_pwrkey_resources[0],
0162     },
0163     {
0164         .name = "rk808-rtc",
0165         .num_resources = ARRAY_SIZE(rk817_rtc_resources),
0166         .resources = &rk817_rtc_resources[0],
0167     },
0168     { .name = "rk817-codec",},
0169 };
0170
0171 static const struct mfd_cell rk818s[] = {
0172     { .name = "rk808-clkout", },
0173     { .name = "rk808-regulator", },
0174     {
0175         .name = "rk808-rtc",
0176         .num_resources = ARRAY_SIZE(rtc_resources),
0177         .resources = rtc_resources,
0178     },
0179 };
0180
0181 static const struct rk808_reg_data rk805_pre_init_reg[] = {
0182     {RK805_BUCK1_CONFIG_REG, RK805_BUCK1_2_ILMAX_MASK,
0183                  RK805_BUCK1_2_ILMAX_4000MA},
0184     {RK805_BUCK2_CONFIG_REG, RK805_BUCK1_2_ILMAX_MASK,
0185                  RK805_BUCK1_2_ILMAX_4000MA},
0186     {RK805_BUCK3_CONFIG_REG, RK805_BUCK3_4_ILMAX_MASK,
0187                  RK805_BUCK3_ILMAX_3000MA},
0188     {RK805_BUCK4_CONFIG_REG, RK805_BUCK3_4_ILMAX_MASK,
0189                  RK805_BUCK4_ILMAX_3500MA},
0190     {RK805_BUCK4_CONFIG_REG, BUCK_ILMIN_MASK, BUCK_ILMIN_400MA},
0191     {RK805_THERMAL_REG, TEMP_HOTDIE_MSK, TEMP115C},
0192 };
0193
0194 static const struct rk808_reg_data rk808_pre_init_reg[] = {
0195     { RK808_BUCK3_CONFIG_REG, BUCK_ILMIN_MASK,  BUCK_ILMIN_150MA },
0196     { RK808_BUCK4_CONFIG_REG, BUCK_ILMIN_MASK,  BUCK_ILMIN_200MA },
0197     { RK808_BOOST_CONFIG_REG, BOOST_ILMIN_MASK, BOOST_ILMIN_100MA },
0198     { RK808_BUCK1_CONFIG_REG, BUCK1_RATE_MASK,  BUCK_ILMIN_200MA },
0199     { RK808_BUCK2_CONFIG_REG, BUCK2_RATE_MASK,  BUCK_ILMIN_200MA },
0200     { RK808_DCDC_UV_ACT_REG,  BUCK_UV_ACT_MASK, BUCK_UV_ACT_DISABLE},
0201     { RK808_VB_MON_REG,       MASK_ALL,         VB_LO_ACT |
0202                             VB_LO_SEL_3500MV },
0203 };
0204
0205 static const struct rk808_reg_data rk817_pre_init_reg[] = {
0206     {RK817_RTC_CTRL_REG, RTC_STOP, RTC_STOP},
0207     /* Codec specific registers */
0208     { RK817_CODEC_DTOP_VUCTL, MASK_ALL, 0x03 },
0209     { RK817_CODEC_DTOP_VUCTIME, MASK_ALL, 0x00 },
0210     { RK817_CODEC_DTOP_LPT_SRST, MASK_ALL, 0x00 },
0211     { RK817_CODEC_DTOP_DIGEN_CLKE, MASK_ALL, 0x00 },
0212     /* from vendor driver, CODEC_AREF_RTCFG0 not defined in data sheet */
0213     { RK817_CODEC_AREF_RTCFG0, MASK_ALL, 0x00 },
0214     { RK817_CODEC_AREF_RTCFG1, MASK_ALL, 0x06 },
0215     { RK817_CODEC_AADC_CFG0, MASK_ALL, 0xc8 },
0216     /* from vendor driver, CODEC_AADC_CFG1 not defined in data sheet */
0217     { RK817_CODEC_AADC_CFG1, MASK_ALL, 0x00 },
0218     { RK817_CODEC_DADC_VOLL, MASK_ALL, 0x00 },
0219     { RK817_CODEC_DADC_VOLR, MASK_ALL, 0x00 },
0220     { RK817_CODEC_DADC_SR_ACL0, MASK_ALL, 0x00 },
0221     { RK817_CODEC_DADC_ALC1, MASK_ALL, 0x00 },
0222     { RK817_CODEC_DADC_ALC2, MASK_ALL, 0x00 },
0223     { RK817_CODEC_DADC_NG, MASK_ALL, 0x00 },
0224     { RK817_CODEC_DADC_HPF, MASK_ALL, 0x00 },
0225     { RK817_CODEC_DADC_RVOLL, MASK_ALL, 0xff },
0226     { RK817_CODEC_DADC_RVOLR, MASK_ALL, 0xff },
0227     { RK817_CODEC_AMIC_CFG0, MASK_ALL, 0x70 },
0228     { RK817_CODEC_AMIC_CFG1, MASK_ALL, 0x00 },
0229     { RK817_CODEC_DMIC_PGA_GAIN, MASK_ALL, 0x66 },
0230     { RK817_CODEC_DMIC_LMT1, MASK_ALL, 0x00 },
0231     { RK817_CODEC_DMIC_LMT2, MASK_ALL, 0x00 },
0232     { RK817_CODEC_DMIC_NG1, MASK_ALL, 0x00 },
0233     { RK817_CODEC_DMIC_NG2, MASK_ALL, 0x00 },
0234     /* from vendor driver, CODEC_ADAC_CFG0 not defined in data sheet */
0235     { RK817_CODEC_ADAC_CFG0, MASK_ALL, 0x00 },
0236     { RK817_CODEC_ADAC_CFG1, MASK_ALL, 0x07 },
0237     { RK817_CODEC_DDAC_POPD_DACST, MASK_ALL, 0x82 },
0238     { RK817_CODEC_DDAC_VOLL, MASK_ALL, 0x00 },
0239     { RK817_CODEC_DDAC_VOLR, MASK_ALL, 0x00 },
0240     { RK817_CODEC_DDAC_SR_LMT0, MASK_ALL, 0x00 },
0241     { RK817_CODEC_DDAC_LMT1, MASK_ALL, 0x00 },
0242     { RK817_CODEC_DDAC_LMT2, MASK_ALL, 0x00 },
0243     { RK817_CODEC_DDAC_MUTE_MIXCTL, MASK_ALL, 0xa0 },
0244     { RK817_CODEC_DDAC_RVOLL, MASK_ALL, 0xff },
0245     { RK817_CODEC_DADC_RVOLR, MASK_ALL, 0xff },
0246     { RK817_CODEC_AMIC_CFG0, MASK_ALL, 0x70 },
0247     { RK817_CODEC_AMIC_CFG1, MASK_ALL, 0x00 },
0248     { RK817_CODEC_DMIC_PGA_GAIN, MASK_ALL, 0x66 },
0249     { RK817_CODEC_DMIC_LMT1, MASK_ALL, 0x00 },
0250     { RK817_CODEC_DMIC_LMT2, MASK_ALL, 0x00 },
0251     { RK817_CODEC_DMIC_NG1, MASK_ALL, 0x00 },
0252     { RK817_CODEC_DMIC_NG2, MASK_ALL, 0x00 },
0253     /* from vendor driver, CODEC_ADAC_CFG0 not defined in data sheet */
0254     { RK817_CODEC_ADAC_CFG0, MASK_ALL, 0x00 },
0255     { RK817_CODEC_ADAC_CFG1, MASK_ALL, 0x07 },
0256     { RK817_CODEC_DDAC_POPD_DACST, MASK_ALL, 0x82 },
0257     { RK817_CODEC_DDAC_VOLL, MASK_ALL, 0x00 },
0258     { RK817_CODEC_DDAC_VOLR, MASK_ALL, 0x00 },
0259     { RK817_CODEC_DDAC_SR_LMT0, MASK_ALL, 0x00 },
0260     { RK817_CODEC_DDAC_LMT1, MASK_ALL, 0x00 },
0261     { RK817_CODEC_DDAC_LMT2, MASK_ALL, 0x00 },
0262     { RK817_CODEC_DDAC_MUTE_MIXCTL, MASK_ALL, 0xa0 },
0263     { RK817_CODEC_DDAC_RVOLL, MASK_ALL, 0xff },
0264     { RK817_CODEC_DDAC_RVOLR, MASK_ALL, 0xff },
0265     { RK817_CODEC_AHP_ANTI0, MASK_ALL, 0x00 },
0266     { RK817_CODEC_AHP_ANTI1, MASK_ALL, 0x00 },
0267     { RK817_CODEC_AHP_CFG0, MASK_ALL, 0xe0 },
0268     { RK817_CODEC_AHP_CFG1, MASK_ALL, 0x1f },
0269     { RK817_CODEC_AHP_CP, MASK_ALL, 0x09 },
0270     { RK817_CODEC_ACLASSD_CFG1, MASK_ALL, 0x69 },
0271     { RK817_CODEC_ACLASSD_CFG2, MASK_ALL, 0x44 },
0272     { RK817_CODEC_APLL_CFG0, MASK_ALL, 0x04 },
0273     { RK817_CODEC_APLL_CFG1, MASK_ALL, 0x00 },
0274     { RK817_CODEC_APLL_CFG2, MASK_ALL, 0x30 },
0275     { RK817_CODEC_APLL_CFG3, MASK_ALL, 0x19 },
0276     { RK817_CODEC_APLL_CFG4, MASK_ALL, 0x65 },
0277     { RK817_CODEC_APLL_CFG5, MASK_ALL, 0x01 },
0278     { RK817_CODEC_DI2S_CKM, MASK_ALL, 0x01 },
0279     { RK817_CODEC_DI2S_RSD, MASK_ALL, 0x00 },
0280     { RK817_CODEC_DI2S_RXCR1, MASK_ALL, 0x00 },
0281     { RK817_CODEC_DI2S_RXCR2, MASK_ALL, 0x17 },
0282     { RK817_CODEC_DI2S_RXCMD_TSD, MASK_ALL, 0x00 },
0283     { RK817_CODEC_DI2S_TXCR1, MASK_ALL, 0x00 },
0284     { RK817_CODEC_DI2S_TXCR2, MASK_ALL, 0x17 },
0285     { RK817_CODEC_DI2S_TXCR3_TXCMD, MASK_ALL, 0x00 },
0286     {RK817_GPIO_INT_CFG, RK817_INT_POL_MSK, RK817_INT_POL_L},
0287     {RK817_SYS_CFG(1), RK817_HOTDIE_TEMP_MSK | RK817_TSD_TEMP_MSK,
0288                        RK817_HOTDIE_105 | RK817_TSD_140},
0289 };
0290
0291 static const struct rk808_reg_data rk818_pre_init_reg[] = {
0292     /* improve efficiency */
0293     { RK818_BUCK2_CONFIG_REG, BUCK2_RATE_MASK,  BUCK_ILMIN_250MA },
0294     { RK818_BUCK4_CONFIG_REG, BUCK_ILMIN_MASK,  BUCK_ILMIN_250MA },
0295     { RK818_BOOST_CONFIG_REG, BOOST_ILMIN_MASK, BOOST_ILMIN_100MA },
0296     { RK818_USB_CTRL_REG,     RK818_USB_ILIM_SEL_MASK,
0297                             RK818_USB_ILMIN_2000MA },
0298     /* close charger when usb lower then 3.4V */
0299     { RK818_USB_CTRL_REG,     RK818_USB_CHG_SD_VSEL_MASK,
0300                             (0x7 << 4) },
0301     /* no action when vref */
0302     { RK818_H5V_EN_REG,   BIT(1),       RK818_REF_RDY_CTRL },
0303     /* enable HDMI 5V */
0304     { RK818_H5V_EN_REG,   BIT(0),       RK818_H5V_EN },
0305     { RK808_VB_MON_REG,   MASK_ALL,     VB_LO_ACT |
0306                             VB_LO_SEL_3500MV },
0307 };
0308
0309 static const struct regmap_irq rk805_irqs[] = {
0310     [RK805_IRQ_PWRON_RISE] = {
0311         .mask = RK805_IRQ_PWRON_RISE_MSK,
0312         .reg_offset = 0,
0313     },
0314     [RK805_IRQ_VB_LOW] = {
0315         .mask = RK805_IRQ_VB_LOW_MSK,
0316         .reg_offset = 0,
0317     },
0318     [RK805_IRQ_PWRON] = {
0319         .mask = RK805_IRQ_PWRON_MSK,
0320         .reg_offset = 0,
0321     },
0322     [RK805_IRQ_PWRON_LP] = {
0323         .mask = RK805_IRQ_PWRON_LP_MSK,
0324         .reg_offset = 0,
0325     },
0326     [RK805_IRQ_HOTDIE] = {
0327         .mask = RK805_IRQ_HOTDIE_MSK,
0328         .reg_offset = 0,
0329     },
0330     [RK805_IRQ_RTC_ALARM] = {
0331         .mask = RK805_IRQ_RTC_ALARM_MSK,
0332         .reg_offset = 0,
0333     },
0334     [RK805_IRQ_RTC_PERIOD] = {
0335         .mask = RK805_IRQ_RTC_PERIOD_MSK,
0336         .reg_offset = 0,
0337     },
0338     [RK805_IRQ_PWRON_FALL] = {
0339         .mask = RK805_IRQ_PWRON_FALL_MSK,
0340         .reg_offset = 0,
0341     },
0342 };
0343
0344 static const struct regmap_irq rk808_irqs[] = {
0345     /* INT_STS */
0346     [RK808_IRQ_VOUT_LO] = {
0347         .mask = RK808_IRQ_VOUT_LO_MSK,
0348         .reg_offset = 0,
0349     },
0350     [RK808_IRQ_VB_LO] = {
0351         .mask = RK808_IRQ_VB_LO_MSK,
0352         .reg_offset = 0,
0353     },
0354     [RK808_IRQ_PWRON] = {
0355         .mask = RK808_IRQ_PWRON_MSK,
0356         .reg_offset = 0,
0357     },
0358     [RK808_IRQ_PWRON_LP] = {
0359         .mask = RK808_IRQ_PWRON_LP_MSK,
0360         .reg_offset = 0,
0361     },
0362     [RK808_IRQ_HOTDIE] = {
0363         .mask = RK808_IRQ_HOTDIE_MSK,
0364         .reg_offset = 0,
0365     },
0366     [RK808_IRQ_RTC_ALARM] = {
0367         .mask = RK808_IRQ_RTC_ALARM_MSK,
0368         .reg_offset = 0,
0369     },
0370     [RK808_IRQ_RTC_PERIOD] = {
0371         .mask = RK808_IRQ_RTC_PERIOD_MSK,
0372         .reg_offset = 0,
0373     },
0374
0375     /* INT_STS2 */
0376     [RK808_IRQ_PLUG_IN_INT] = {
0377         .mask = RK808_IRQ_PLUG_IN_INT_MSK,
0378         .reg_offset = 1,
0379     },
0380     [RK808_IRQ_PLUG_OUT_INT] = {
0381         .mask = RK808_IRQ_PLUG_OUT_INT_MSK,
0382         .reg_offset = 1,
0383     },
0384 };
0385
0386 static const struct regmap_irq rk818_irqs[] = {
0387     /* INT_STS */
0388     [RK818_IRQ_VOUT_LO] = {
0389         .mask = RK818_IRQ_VOUT_LO_MSK,
0390         .reg_offset = 0,
0391     },
0392     [RK818_IRQ_VB_LO] = {
0393         .mask = RK818_IRQ_VB_LO_MSK,
0394         .reg_offset = 0,
0395     },
0396     [RK818_IRQ_PWRON] = {
0397         .mask = RK818_IRQ_PWRON_MSK,
0398         .reg_offset = 0,
0399     },
0400     [RK818_IRQ_PWRON_LP] = {
0401         .mask = RK818_IRQ_PWRON_LP_MSK,
0402         .reg_offset = 0,
0403     },
0404     [RK818_IRQ_HOTDIE] = {
0405         .mask = RK818_IRQ_HOTDIE_MSK,
0406         .reg_offset = 0,
0407     },
0408     [RK818_IRQ_RTC_ALARM] = {
0409         .mask = RK818_IRQ_RTC_ALARM_MSK,
0410         .reg_offset = 0,
0411     },
0412     [RK818_IRQ_RTC_PERIOD] = {
0413         .mask = RK818_IRQ_RTC_PERIOD_MSK,
0414         .reg_offset = 0,
0415     },
0416     [RK818_IRQ_USB_OV] = {
0417         .mask = RK818_IRQ_USB_OV_MSK,
0418         .reg_offset = 0,
0419     },
0420
0421     /* INT_STS2 */
0422     [RK818_IRQ_PLUG_IN] = {
0423         .mask = RK818_IRQ_PLUG_IN_MSK,
0424         .reg_offset = 1,
0425     },
0426     [RK818_IRQ_PLUG_OUT] = {
0427         .mask = RK818_IRQ_PLUG_OUT_MSK,
0428         .reg_offset = 1,
0429     },
0430     [RK818_IRQ_CHG_OK] = {
0431         .mask = RK818_IRQ_CHG_OK_MSK,
0432         .reg_offset = 1,
0433     },
0434     [RK818_IRQ_CHG_TE] = {
0435         .mask = RK818_IRQ_CHG_TE_MSK,
0436         .reg_offset = 1,
0437     },
0438     [RK818_IRQ_CHG_TS1] = {
0439         .mask = RK818_IRQ_CHG_TS1_MSK,
0440         .reg_offset = 1,
0441     },
0442     [RK818_IRQ_TS2] = {
0443         .mask = RK818_IRQ_TS2_MSK,
0444         .reg_offset = 1,
0445     },
0446     [RK818_IRQ_CHG_CVTLIM] = {
0447         .mask = RK818_IRQ_CHG_CVTLIM_MSK,
0448         .reg_offset = 1,
0449     },
0450     [RK818_IRQ_DISCHG_ILIM] = {
0451         .mask = RK818_IRQ_DISCHG_ILIM_MSK,
0452         .reg_offset = 1,
0453     },
0454 };
0455
0456 static const struct regmap_irq rk817_irqs[RK817_IRQ_END] = {
0457     REGMAP_IRQ_REG_LINE(0, 8),
0458     REGMAP_IRQ_REG_LINE(1, 8),
0459     REGMAP_IRQ_REG_LINE(2, 8),
0460     REGMAP_IRQ_REG_LINE(3, 8),
0461     REGMAP_IRQ_REG_LINE(4, 8),
0462     REGMAP_IRQ_REG_LINE(5, 8),
0463     REGMAP_IRQ_REG_LINE(6, 8),
0464     REGMAP_IRQ_REG_LINE(7, 8),
0465     REGMAP_IRQ_REG_LINE(8, 8),
0466     REGMAP_IRQ_REG_LINE(9, 8),
0467     REGMAP_IRQ_REG_LINE(10, 8),
0468     REGMAP_IRQ_REG_LINE(11, 8),
0469     REGMAP_IRQ_REG_LINE(12, 8),
0470     REGMAP_IRQ_REG_LINE(13, 8),
0471     REGMAP_IRQ_REG_LINE(14, 8),
0472     REGMAP_IRQ_REG_LINE(15, 8),
0473     REGMAP_IRQ_REG_LINE(16, 8),
0474     REGMAP_IRQ_REG_LINE(17, 8),
0475     REGMAP_IRQ_REG_LINE(18, 8),
0476     REGMAP_IRQ_REG_LINE(19, 8),
0477     REGMAP_IRQ_REG_LINE(20, 8),
0478     REGMAP_IRQ_REG_LINE(21, 8),
0479     REGMAP_IRQ_REG_LINE(22, 8),
0480     REGMAP_IRQ_REG_LINE(23, 8)
0481 };
0482
0483 static struct regmap_irq_chip rk805_irq_chip = {
0484     .name = "rk805",
0485     .irqs = rk805_irqs,
0486     .num_irqs = ARRAY_SIZE(rk805_irqs),
0487     .num_regs = 1,
0488     .status_base = RK805_INT_STS_REG,
0489     .mask_base = RK805_INT_STS_MSK_REG,
0490     .ack_base = RK805_INT_STS_REG,
0491     .init_ack_masked = true,
0492 };
0493
0494 static const struct regmap_irq_chip rk808_irq_chip = {
0495     .name = "rk808",
0496     .irqs = rk808_irqs,
0497     .num_irqs = ARRAY_SIZE(rk808_irqs),
0498     .num_regs = 2,
0499     .irq_reg_stride = 2,
0500     .status_base = RK808_INT_STS_REG1,
0501     .mask_base = RK808_INT_STS_MSK_REG1,
0502     .ack_base = RK808_INT_STS_REG1,
0503     .init_ack_masked = true,
0504 };
0505
0506 static struct regmap_irq_chip rk817_irq_chip = {
0507     .name = "rk817",
0508     .irqs = rk817_irqs,
0509     .num_irqs = ARRAY_SIZE(rk817_irqs),
0510     .num_regs = 3,
0511     .irq_reg_stride = 2,
0512     .status_base = RK817_INT_STS_REG0,
0513     .mask_base = RK817_INT_STS_MSK_REG0,
0514     .ack_base = RK817_INT_STS_REG0,
0515     .init_ack_masked = true,
0516 };
0517
0518 static const struct regmap_irq_chip rk818_irq_chip = {
0519     .name = "rk818",
0520     .irqs = rk818_irqs,
0521     .num_irqs = ARRAY_SIZE(rk818_irqs),
0522     .num_regs = 2,
0523     .irq_reg_stride = 2,
0524     .status_base = RK818_INT_STS_REG1,
0525     .mask_base = RK818_INT_STS_MSK_REG1,
0526     .ack_base = RK818_INT_STS_REG1,
0527     .init_ack_masked = true,
0528 };
0529
0530 static struct i2c_client *rk808_i2c_client;
0531
0532 static void rk808_pm_power_off(void)
0533 {
0534     int ret;
0535     unsigned int reg, bit;
0536     struct rk808 *rk808 = i2c_get_clientdata(rk808_i2c_client);
0537
0538     switch (rk808->variant) {
0539     case RK805_ID:
0540         reg = RK805_DEV_CTRL_REG;
0541         bit = DEV_OFF;
0542         break;
0543     case RK808_ID:
0544         reg = RK808_DEVCTRL_REG,
0545         bit = DEV_OFF_RST;
0546         break;
0547     case RK809_ID:
0548     case RK817_ID:
0549         reg = RK817_SYS_CFG(3);
0550         bit = DEV_OFF;
0551         break;
0552     case RK818_ID:
0553         reg = RK818_DEVCTRL_REG;
0554         bit = DEV_OFF;
0555         break;
0556     default:
0557         return;
0558     }
0559     ret = regmap_update_bits(rk808->regmap, reg, bit, bit);
0560     if (ret)
0561         dev_err(&rk808_i2c_client->dev, "Failed to shutdown device!\n");
0562 }
0563
0564 static int rk808_restart_notify(struct notifier_block *this, unsigned long mode, void *cmd)
0565 {
0566     struct rk808 *rk808 = i2c_get_clientdata(rk808_i2c_client);
0567     unsigned int reg, bit;
0568     int ret;
0569
0570     switch (rk808->variant) {
0571     case RK809_ID:
0572     case RK817_ID:
0573         reg = RK817_SYS_CFG(3);
0574         bit = DEV_RST;
0575         break;
0576
0577     default:
0578         return NOTIFY_DONE;
0579     }
0580     ret = regmap_update_bits(rk808->regmap, reg, bit, bit);
0581     if (ret)
0582         dev_err(&rk808_i2c_client->dev, "Failed to restart device!\n");
0583
0584     return NOTIFY_DONE;
0585 }
0586
0587 static struct notifier_block rk808_restart_handler = {
0588     .notifier_call = rk808_restart_notify,
0589     .priority = 192,
0590 };
0591
0592 static void rk8xx_shutdown(struct i2c_client *client)
0593 {
0594     struct rk808 *rk808 = i2c_get_clientdata(client);
0595     int ret;
0596
0597     switch (rk808->variant) {
0598     case RK805_ID:
0599         ret = regmap_update_bits(rk808->regmap,
0600                      RK805_GPIO_IO_POL_REG,
0601                      SLP_SD_MSK,
0602                      SHUTDOWN_FUN);
0603         break;
0604     case RK809_ID:
0605     case RK817_ID:
0606         ret = regmap_update_bits(rk808->regmap,
0607                      RK817_SYS_CFG(3),
0608                      RK817_SLPPIN_FUNC_MSK,
0609                      SLPPIN_DN_FUN);
0610         break;
0611     default:
0612         return;
0613     }
0614     if (ret)
0615         dev_warn(&client->dev,
0616              "Cannot switch to power down function\n");
0617 }
0618
0619 static const struct of_device_id rk808_of_match[] = {
0620     { .compatible = "rockchip,rk805" },
0621     { .compatible = "rockchip,rk808" },
0622     { .compatible = "rockchip,rk809" },
0623     { .compatible = "rockchip,rk817" },
0624     { .compatible = "rockchip,rk818" },
0625     { },
0626 };
0627 MODULE_DEVICE_TABLE(of, rk808_of_match);
0628
0629 static int rk808_probe(struct i2c_client *client,
0630                const struct i2c_device_id *id)
0631 {
0632     struct device_node *np = client->dev.of_node;
0633     struct rk808 *rk808;
0634     const struct rk808_reg_data *pre_init_reg;
0635     const struct mfd_cell *cells;
0636     int nr_pre_init_regs;
0637     int nr_cells;
0638     int msb, lsb;
0639     unsigned char pmic_id_msb, pmic_id_lsb;
0640     int ret;
0641     int i;
0642
0643     rk808 = devm_kzalloc(&client->dev, sizeof(*rk808), GFP_KERNEL);
0644     if (!rk808)
0645         return -ENOMEM;
0646
0647     if (of_device_is_compatible(np, "rockchip,rk817") ||
0648         of_device_is_compatible(np, "rockchip,rk809")) {
0649         pmic_id_msb = RK817_ID_MSB;
0650         pmic_id_lsb = RK817_ID_LSB;
0651     } else {
0652         pmic_id_msb = RK808_ID_MSB;
0653         pmic_id_lsb = RK808_ID_LSB;
0654     }
0655
0656     /* Read chip variant */
0657     msb = i2c_smbus_read_byte_data(client, pmic_id_msb);
0658     if (msb < 0) {
0659         dev_err(&client->dev, "failed to read the chip id at 0x%x\n",
0660             RK808_ID_MSB);
0661         return msb;
0662     }
0663
0664     lsb = i2c_smbus_read_byte_data(client, pmic_id_lsb);
0665     if (lsb < 0) {
0666         dev_err(&client->dev, "failed to read the chip id at 0x%x\n",
0667             RK808_ID_LSB);
0668         return lsb;
0669     }
0670
0671     rk808->variant = ((msb << 8) | lsb) & RK8XX_ID_MSK;
0672     dev_info(&client->dev, "chip id: 0x%x\n", (unsigned int)rk808->variant);
0673
0674     switch (rk808->variant) {
0675     case RK805_ID:
0676         rk808->regmap_cfg = &rk805_regmap_config;
0677         rk808->regmap_irq_chip = &rk805_irq_chip;
0678         pre_init_reg = rk805_pre_init_reg;
0679         nr_pre_init_regs = ARRAY_SIZE(rk805_pre_init_reg);
0680         cells = rk805s;
0681         nr_cells = ARRAY_SIZE(rk805s);
0682         break;
0683     case RK808_ID:
0684         rk808->regmap_cfg = &rk808_regmap_config;
0685         rk808->regmap_irq_chip = &rk808_irq_chip;
0686         pre_init_reg = rk808_pre_init_reg;
0687         nr_pre_init_regs = ARRAY_SIZE(rk808_pre_init_reg);
0688         cells = rk808s;
0689         nr_cells = ARRAY_SIZE(rk808s);
0690         break;
0691     case RK818_ID:
0692         rk808->regmap_cfg = &rk818_regmap_config;
0693         rk808->regmap_irq_chip = &rk818_irq_chip;
0694         pre_init_reg = rk818_pre_init_reg;
0695         nr_pre_init_regs = ARRAY_SIZE(rk818_pre_init_reg);
0696         cells = rk818s;
0697         nr_cells = ARRAY_SIZE(rk818s);
0698         break;
0699     case RK809_ID:
0700     case RK817_ID:
0701         rk808->regmap_cfg = &rk817_regmap_config;
0702         rk808->regmap_irq_chip = &rk817_irq_chip;
0703         pre_init_reg = rk817_pre_init_reg;
0704         nr_pre_init_regs = ARRAY_SIZE(rk817_pre_init_reg);
0705         cells = rk817s;
0706         nr_cells = ARRAY_SIZE(rk817s);
0707         break;
0708     default:
0709         dev_err(&client->dev, "Unsupported RK8XX ID %lu\n",
0710             rk808->variant);
0711         return -EINVAL;
0712     }
0713
0714     rk808->i2c = client;
0715     i2c_set_clientdata(client, rk808);
0716
0717     rk808->regmap = devm_regmap_init_i2c(client, rk808->regmap_cfg);
0718     if (IS_ERR(rk808->regmap)) {
0719         dev_err(&client->dev, "regmap initialization failed\n");
0720         return PTR_ERR(rk808->regmap);
0721     }
0722
0723     if (!client->irq) {
0724         dev_err(&client->dev, "No interrupt support, no core IRQ\n");
0725         return -EINVAL;
0726     }
0727
0728     ret = regmap_add_irq_chip(rk808->regmap, client->irq,
0729                   IRQF_ONESHOT, -1,
0730                   rk808->regmap_irq_chip, &rk808->irq_data);
0731     if (ret) {
0732         dev_err(&client->dev, "Failed to add irq_chip %d\n", ret);
0733         return ret;
0734     }
0735
0736     for (i = 0; i < nr_pre_init_regs; i++) {
0737         ret = regmap_update_bits(rk808->regmap,
0738                     pre_init_reg[i].addr,
0739                     pre_init_reg[i].mask,
0740                     pre_init_reg[i].value);
0741         if (ret) {
0742             dev_err(&client->dev,
0743                 "0x%x write err\n",
0744                 pre_init_reg[i].addr);
0745             return ret;
0746         }
0747     }
0748
0749     ret = devm_mfd_add_devices(&client->dev, PLATFORM_DEVID_NONE,
0750                   cells, nr_cells, NULL, 0,
0751                   regmap_irq_get_domain(rk808->irq_data));
0752     if (ret) {
0753         dev_err(&client->dev, "failed to add MFD devices %d\n", ret);
0754         goto err_irq;
0755     }
0756
0757     if (of_property_read_bool(np, "rockchip,system-power-controller")) {
0758         rk808_i2c_client = client;
0759         pm_power_off = rk808_pm_power_off;
0760
0761         switch (rk808->variant) {
0762         case RK809_ID:
0763         case RK817_ID:
0764             ret = register_restart_handler(&rk808_restart_handler);
0765             if (ret)
0766                 dev_warn(&client->dev, "failed to register rst handler, %d\n", ret);
0767             break;
0768         default:
0769             dev_dbg(&client->dev, "pmic controlled board reset not supported\n");
0770             break;
0771         }
0772     }
0773
0774     return 0;
0775
0776 err_irq:
0777     regmap_del_irq_chip(client->irq, rk808->irq_data);
0778     return ret;
0779 }
0780
0781 static int rk808_remove(struct i2c_client *client)
0782 {
0783     struct rk808 *rk808 = i2c_get_clientdata(client);
0784
0785     regmap_del_irq_chip(client->irq, rk808->irq_data);
0786
0787     /**
0788      * pm_power_off may points to a function from another module.
0789      * Check if the pointer is set by us and only then overwrite it.
0790      */
0791     if (pm_power_off == rk808_pm_power_off)
0792         pm_power_off = NULL;
0793
0794     unregister_restart_handler(&rk808_restart_handler);
0795
0796     return 0;
0797 }
0798
0799 static int __maybe_unused rk8xx_suspend(struct device *dev)
0800 {
0801     struct rk808 *rk808 = i2c_get_clientdata(to_i2c_client(dev));
0802     int ret = 0;
0803
0804     switch (rk808->variant) {
0805     case RK805_ID:
0806         ret = regmap_update_bits(rk808->regmap,
0807                      RK805_GPIO_IO_POL_REG,
0808                      SLP_SD_MSK,
0809                      SLEEP_FUN);
0810         break;
0811     case RK809_ID:
0812     case RK817_ID:
0813         ret = regmap_update_bits(rk808->regmap,
0814                      RK817_SYS_CFG(3),
0815                      RK817_SLPPIN_FUNC_MSK,
0816                      SLPPIN_SLP_FUN);
0817         break;
0818     default:
0819         break;
0820     }
0821
0822     return ret;
0823 }
0824
0825 static int __maybe_unused rk8xx_resume(struct device *dev)
0826 {
0827     struct rk808 *rk808 = i2c_get_clientdata(to_i2c_client(dev));
0828     int ret = 0;
0829
0830     switch (rk808->variant) {
0831     case RK809_ID:
0832     case RK817_ID:
0833         ret = regmap_update_bits(rk808->regmap,
0834                      RK817_SYS_CFG(3),
0835                      RK817_SLPPIN_FUNC_MSK,
0836                      SLPPIN_NULL_FUN);
0837         break;
0838     default:
0839         break;
0840     }
0841
0842     return ret;
0843 }
0844 static SIMPLE_DEV_PM_OPS(rk8xx_pm_ops, rk8xx_suspend, rk8xx_resume);
0845
0846 static struct i2c_driver rk808_i2c_driver = {
0847     .driver = {
0848         .name = "rk808",
0849         .of_match_table = rk808_of_match,
0850         .pm = &rk8xx_pm_ops,
0851     },
0852     .probe    = rk808_probe,
0853     .remove   = rk808_remove,
0854     .shutdown = rk8xx_shutdown,
0855 };
0856
0857 module_i2c_driver(rk808_i2c_driver);
0858
0859 MODULE_LICENSE("GPL");
0860 MODULE_AUTHOR("Chris Zhong <zyw@rock-chips.com>");
0861 MODULE_AUTHOR("Zhang Qing <zhangqing@rock-chips.com>");
0862 MODULE_AUTHOR("Wadim Egorov <w.egorov@phytec.de>");
0863 MODULE_DESCRIPTION("RK808/RK818 PMIC driver");