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0001 // SPDX-License-Identifier: GPL-2.0-only
0002 /*
0003  * Base driver for Maxim MAX8925
0004  *
0005  * Copyright (C) 2009-2010 Marvell International Ltd.
0006  *  Haojian Zhuang <haojian.zhuang@marvell.com>
0007  */
0008 
0009 #include <linux/kernel.h>
0010 #include <linux/init.h>
0011 #include <linux/i2c.h>
0012 #include <linux/irq.h>
0013 #include <linux/interrupt.h>
0014 #include <linux/irqdomain.h>
0015 #include <linux/platform_device.h>
0016 #include <linux/regulator/machine.h>
0017 #include <linux/mfd/core.h>
0018 #include <linux/mfd/max8925.h>
0019 #include <linux/of.h>
0020 #include <linux/of_platform.h>
0021 
0022 static const struct resource bk_resources[] = {
0023     { 0x84, 0x84, "mode control", IORESOURCE_REG, },
0024     { 0x85, 0x85, "control",      IORESOURCE_REG, },
0025 };
0026 
0027 static struct mfd_cell bk_devs[] = {
0028     {
0029         .name       = "max8925-backlight",
0030         .num_resources  = ARRAY_SIZE(bk_resources),
0031         .resources  = &bk_resources[0],
0032         .id     = -1,
0033     },
0034 };
0035 
0036 static const struct resource touch_resources[] = {
0037     {
0038         .name   = "max8925-tsc",
0039         .start  = MAX8925_TSC_IRQ,
0040         .end    = MAX8925_ADC_RES_END,
0041         .flags  = IORESOURCE_REG,
0042     },
0043 };
0044 
0045 static const struct mfd_cell touch_devs[] = {
0046     {
0047         .name       = "max8925-touch",
0048         .num_resources  = 1,
0049         .resources  = &touch_resources[0],
0050         .id     = -1,
0051     },
0052 };
0053 
0054 static const struct resource power_supply_resources[] = {
0055     {
0056         .name   = "max8925-power",
0057         .start  = MAX8925_CHG_IRQ1,
0058         .end    = MAX8925_CHG_IRQ1_MASK,
0059         .flags  = IORESOURCE_REG,
0060     },
0061 };
0062 
0063 static const struct mfd_cell power_devs[] = {
0064     {
0065         .name       = "max8925-power",
0066         .num_resources  = 1,
0067         .resources  = &power_supply_resources[0],
0068         .id     = -1,
0069     },
0070 };
0071 
0072 static const struct resource rtc_resources[] = {
0073     {
0074         .name   = "max8925-rtc",
0075         .start  = MAX8925_IRQ_RTC_ALARM0,
0076         .end    = MAX8925_IRQ_RTC_ALARM0,
0077         .flags  = IORESOURCE_IRQ,
0078     },
0079 };
0080 
0081 static const struct mfd_cell rtc_devs[] = {
0082     {
0083         .name       = "max8925-rtc",
0084         .num_resources  = 1,
0085         .resources  = &rtc_resources[0],
0086         .id     = -1,
0087     },
0088 };
0089 
0090 static const struct resource onkey_resources[] = {
0091     {
0092         .name   = "max8925-onkey",
0093         .start  = MAX8925_IRQ_GPM_SW_R,
0094         .end    = MAX8925_IRQ_GPM_SW_R,
0095         .flags  = IORESOURCE_IRQ,
0096     }, {
0097         .name   = "max8925-onkey",
0098         .start  = MAX8925_IRQ_GPM_SW_F,
0099         .end    = MAX8925_IRQ_GPM_SW_F,
0100         .flags  = IORESOURCE_IRQ,
0101     },
0102 };
0103 
0104 static const struct mfd_cell onkey_devs[] = {
0105     {
0106         .name       = "max8925-onkey",
0107         .num_resources  = 2,
0108         .resources  = &onkey_resources[0],
0109         .id     = -1,
0110     },
0111 };
0112 
0113 static const struct resource sd1_resources[] = {
0114     {0x06, 0x06, "sdv", IORESOURCE_REG, },
0115 };
0116 
0117 static const struct resource sd2_resources[] = {
0118     {0x09, 0x09, "sdv", IORESOURCE_REG, },
0119 };
0120 
0121 static const struct resource sd3_resources[] = {
0122     {0x0c, 0x0c, "sdv", IORESOURCE_REG, },
0123 };
0124 
0125 static const struct resource ldo1_resources[] = {
0126     {0x1a, 0x1a, "ldov", IORESOURCE_REG, },
0127 };
0128 
0129 static const struct resource ldo2_resources[] = {
0130     {0x1e, 0x1e, "ldov", IORESOURCE_REG, },
0131 };
0132 
0133 static const struct resource ldo3_resources[] = {
0134     {0x22, 0x22, "ldov", IORESOURCE_REG, },
0135 };
0136 
0137 static const struct resource ldo4_resources[] = {
0138     {0x26, 0x26, "ldov", IORESOURCE_REG, },
0139 };
0140 
0141 static const struct resource ldo5_resources[] = {
0142     {0x2a, 0x2a, "ldov", IORESOURCE_REG, },
0143 };
0144 
0145 static const struct resource ldo6_resources[] = {
0146     {0x2e, 0x2e, "ldov", IORESOURCE_REG, },
0147 };
0148 
0149 static const struct resource ldo7_resources[] = {
0150     {0x32, 0x32, "ldov", IORESOURCE_REG, },
0151 };
0152 
0153 static const struct resource ldo8_resources[] = {
0154     {0x36, 0x36, "ldov", IORESOURCE_REG, },
0155 };
0156 
0157 static const struct resource ldo9_resources[] = {
0158     {0x3a, 0x3a, "ldov", IORESOURCE_REG, },
0159 };
0160 
0161 static const struct resource ldo10_resources[] = {
0162     {0x3e, 0x3e, "ldov", IORESOURCE_REG, },
0163 };
0164 
0165 static const struct resource ldo11_resources[] = {
0166     {0x42, 0x42, "ldov", IORESOURCE_REG, },
0167 };
0168 
0169 static const struct resource ldo12_resources[] = {
0170     {0x46, 0x46, "ldov", IORESOURCE_REG, },
0171 };
0172 
0173 static const struct resource ldo13_resources[] = {
0174     {0x4a, 0x4a, "ldov", IORESOURCE_REG, },
0175 };
0176 
0177 static const struct resource ldo14_resources[] = {
0178     {0x4e, 0x4e, "ldov", IORESOURCE_REG, },
0179 };
0180 
0181 static const struct resource ldo15_resources[] = {
0182     {0x52, 0x52, "ldov", IORESOURCE_REG, },
0183 };
0184 
0185 static const struct resource ldo16_resources[] = {
0186     {0x12, 0x12, "ldov", IORESOURCE_REG, },
0187 };
0188 
0189 static const struct resource ldo17_resources[] = {
0190     {0x16, 0x16, "ldov", IORESOURCE_REG, },
0191 };
0192 
0193 static const struct resource ldo18_resources[] = {
0194     {0x74, 0x74, "ldov", IORESOURCE_REG, },
0195 };
0196 
0197 static const struct resource ldo19_resources[] = {
0198     {0x5e, 0x5e, "ldov", IORESOURCE_REG, },
0199 };
0200 
0201 static const struct resource ldo20_resources[] = {
0202     {0x9e, 0x9e, "ldov", IORESOURCE_REG, },
0203 };
0204 
0205 static struct mfd_cell reg_devs[] = {
0206     {
0207         .name = "max8925-regulator",
0208         .id = 0,
0209         .num_resources = ARRAY_SIZE(sd1_resources),
0210         .resources = sd1_resources,
0211     }, {
0212         .name = "max8925-regulator",
0213         .id = 1,
0214         .num_resources = ARRAY_SIZE(sd2_resources),
0215         .resources = sd2_resources,
0216     }, {
0217         .name = "max8925-regulator",
0218         .id = 2,
0219         .num_resources = ARRAY_SIZE(sd3_resources),
0220         .resources = sd3_resources,
0221     }, {
0222         .name = "max8925-regulator",
0223         .id = 3,
0224         .num_resources = ARRAY_SIZE(ldo1_resources),
0225         .resources = ldo1_resources,
0226     }, {
0227         .name = "max8925-regulator",
0228         .id = 4,
0229         .num_resources = ARRAY_SIZE(ldo2_resources),
0230         .resources = ldo2_resources,
0231     }, {
0232         .name = "max8925-regulator",
0233         .id = 5,
0234         .num_resources = ARRAY_SIZE(ldo3_resources),
0235         .resources = ldo3_resources,
0236     }, {
0237         .name = "max8925-regulator",
0238         .id = 6,
0239         .num_resources = ARRAY_SIZE(ldo4_resources),
0240         .resources = ldo4_resources,
0241     }, {
0242         .name = "max8925-regulator",
0243         .id = 7,
0244         .num_resources = ARRAY_SIZE(ldo5_resources),
0245         .resources = ldo5_resources,
0246     }, {
0247         .name = "max8925-regulator",
0248         .id = 8,
0249         .num_resources = ARRAY_SIZE(ldo6_resources),
0250         .resources = ldo6_resources,
0251     }, {
0252         .name = "max8925-regulator",
0253         .id = 9,
0254         .num_resources = ARRAY_SIZE(ldo7_resources),
0255         .resources = ldo7_resources,
0256     }, {
0257         .name = "max8925-regulator",
0258         .id = 10,
0259         .num_resources = ARRAY_SIZE(ldo8_resources),
0260         .resources = ldo8_resources,
0261     }, {
0262         .name = "max8925-regulator",
0263         .id = 11,
0264         .num_resources = ARRAY_SIZE(ldo9_resources),
0265         .resources = ldo9_resources,
0266     }, {
0267         .name = "max8925-regulator",
0268         .id = 12,
0269         .num_resources = ARRAY_SIZE(ldo10_resources),
0270         .resources = ldo10_resources,
0271     }, {
0272         .name = "max8925-regulator",
0273         .id = 13,
0274         .num_resources = ARRAY_SIZE(ldo11_resources),
0275         .resources = ldo11_resources,
0276     }, {
0277         .name = "max8925-regulator",
0278         .id = 14,
0279         .num_resources = ARRAY_SIZE(ldo12_resources),
0280         .resources = ldo12_resources,
0281     }, {
0282         .name = "max8925-regulator",
0283         .id = 15,
0284         .num_resources = ARRAY_SIZE(ldo13_resources),
0285         .resources = ldo13_resources,
0286     }, {
0287         .name = "max8925-regulator",
0288         .id = 16,
0289         .num_resources = ARRAY_SIZE(ldo14_resources),
0290         .resources = ldo14_resources,
0291     }, {
0292         .name = "max8925-regulator",
0293         .id = 17,
0294         .num_resources = ARRAY_SIZE(ldo15_resources),
0295         .resources = ldo15_resources,
0296     }, {
0297         .name = "max8925-regulator",
0298         .id = 18,
0299         .num_resources = ARRAY_SIZE(ldo16_resources),
0300         .resources = ldo16_resources,
0301     }, {
0302         .name = "max8925-regulator",
0303         .id = 19,
0304         .num_resources = ARRAY_SIZE(ldo17_resources),
0305         .resources = ldo17_resources,
0306     }, {
0307         .name = "max8925-regulator",
0308         .id = 20,
0309         .num_resources = ARRAY_SIZE(ldo18_resources),
0310         .resources = ldo18_resources,
0311     }, {
0312         .name = "max8925-regulator",
0313         .id = 21,
0314         .num_resources = ARRAY_SIZE(ldo19_resources),
0315         .resources = ldo19_resources,
0316     }, {
0317         .name = "max8925-regulator",
0318         .id = 22,
0319         .num_resources = ARRAY_SIZE(ldo20_resources),
0320         .resources = ldo20_resources,
0321     },
0322 };
0323 
0324 enum {
0325     FLAGS_ADC = 1,  /* register in ADC component */
0326     FLAGS_RTC,  /* register in RTC component */
0327 };
0328 
0329 struct max8925_irq_data {
0330     int reg;
0331     int mask_reg;
0332     int enable;     /* enable or not */
0333     int offs;       /* bit offset in mask register */
0334     int flags;
0335     int tsc_irq;
0336 };
0337 
0338 static struct max8925_irq_data max8925_irqs[] = {
0339     [MAX8925_IRQ_VCHG_DC_OVP] = {
0340         .reg        = MAX8925_CHG_IRQ1,
0341         .mask_reg   = MAX8925_CHG_IRQ1_MASK,
0342         .offs       = 1 << 0,
0343     },
0344     [MAX8925_IRQ_VCHG_DC_F] = {
0345         .reg        = MAX8925_CHG_IRQ1,
0346         .mask_reg   = MAX8925_CHG_IRQ1_MASK,
0347         .offs       = 1 << 1,
0348     },
0349     [MAX8925_IRQ_VCHG_DC_R] = {
0350         .reg        = MAX8925_CHG_IRQ1,
0351         .mask_reg   = MAX8925_CHG_IRQ1_MASK,
0352         .offs       = 1 << 2,
0353     },
0354     [MAX8925_IRQ_VCHG_THM_OK_R] = {
0355         .reg        = MAX8925_CHG_IRQ2,
0356         .mask_reg   = MAX8925_CHG_IRQ2_MASK,
0357         .offs       = 1 << 0,
0358     },
0359     [MAX8925_IRQ_VCHG_THM_OK_F] = {
0360         .reg        = MAX8925_CHG_IRQ2,
0361         .mask_reg   = MAX8925_CHG_IRQ2_MASK,
0362         .offs       = 1 << 1,
0363     },
0364     [MAX8925_IRQ_VCHG_SYSLOW_F] = {
0365         .reg        = MAX8925_CHG_IRQ2,
0366         .mask_reg   = MAX8925_CHG_IRQ2_MASK,
0367         .offs       = 1 << 2,
0368     },
0369     [MAX8925_IRQ_VCHG_SYSLOW_R] = {
0370         .reg        = MAX8925_CHG_IRQ2,
0371         .mask_reg   = MAX8925_CHG_IRQ2_MASK,
0372         .offs       = 1 << 3,
0373     },
0374     [MAX8925_IRQ_VCHG_RST] = {
0375         .reg        = MAX8925_CHG_IRQ2,
0376         .mask_reg   = MAX8925_CHG_IRQ2_MASK,
0377         .offs       = 1 << 4,
0378     },
0379     [MAX8925_IRQ_VCHG_DONE] = {
0380         .reg        = MAX8925_CHG_IRQ2,
0381         .mask_reg   = MAX8925_CHG_IRQ2_MASK,
0382         .offs       = 1 << 5,
0383     },
0384     [MAX8925_IRQ_VCHG_TOPOFF] = {
0385         .reg        = MAX8925_CHG_IRQ2,
0386         .mask_reg   = MAX8925_CHG_IRQ2_MASK,
0387         .offs       = 1 << 6,
0388     },
0389     [MAX8925_IRQ_VCHG_TMR_FAULT] = {
0390         .reg        = MAX8925_CHG_IRQ2,
0391         .mask_reg   = MAX8925_CHG_IRQ2_MASK,
0392         .offs       = 1 << 7,
0393     },
0394     [MAX8925_IRQ_GPM_RSTIN] = {
0395         .reg        = MAX8925_ON_OFF_IRQ1,
0396         .mask_reg   = MAX8925_ON_OFF_IRQ1_MASK,
0397         .offs       = 1 << 0,
0398     },
0399     [MAX8925_IRQ_GPM_MPL] = {
0400         .reg        = MAX8925_ON_OFF_IRQ1,
0401         .mask_reg   = MAX8925_ON_OFF_IRQ1_MASK,
0402         .offs       = 1 << 1,
0403     },
0404     [MAX8925_IRQ_GPM_SW_3SEC] = {
0405         .reg        = MAX8925_ON_OFF_IRQ1,
0406         .mask_reg   = MAX8925_ON_OFF_IRQ1_MASK,
0407         .offs       = 1 << 2,
0408     },
0409     [MAX8925_IRQ_GPM_EXTON_F] = {
0410         .reg        = MAX8925_ON_OFF_IRQ1,
0411         .mask_reg   = MAX8925_ON_OFF_IRQ1_MASK,
0412         .offs       = 1 << 3,
0413     },
0414     [MAX8925_IRQ_GPM_EXTON_R] = {
0415         .reg        = MAX8925_ON_OFF_IRQ1,
0416         .mask_reg   = MAX8925_ON_OFF_IRQ1_MASK,
0417         .offs       = 1 << 4,
0418     },
0419     [MAX8925_IRQ_GPM_SW_1SEC] = {
0420         .reg        = MAX8925_ON_OFF_IRQ1,
0421         .mask_reg   = MAX8925_ON_OFF_IRQ1_MASK,
0422         .offs       = 1 << 5,
0423     },
0424     [MAX8925_IRQ_GPM_SW_F] = {
0425         .reg        = MAX8925_ON_OFF_IRQ1,
0426         .mask_reg   = MAX8925_ON_OFF_IRQ1_MASK,
0427         .offs       = 1 << 6,
0428     },
0429     [MAX8925_IRQ_GPM_SW_R] = {
0430         .reg        = MAX8925_ON_OFF_IRQ1,
0431         .mask_reg   = MAX8925_ON_OFF_IRQ1_MASK,
0432         .offs       = 1 << 7,
0433     },
0434     [MAX8925_IRQ_GPM_SYSCKEN_F] = {
0435         .reg        = MAX8925_ON_OFF_IRQ2,
0436         .mask_reg   = MAX8925_ON_OFF_IRQ2_MASK,
0437         .offs       = 1 << 0,
0438     },
0439     [MAX8925_IRQ_GPM_SYSCKEN_R] = {
0440         .reg        = MAX8925_ON_OFF_IRQ2,
0441         .mask_reg   = MAX8925_ON_OFF_IRQ2_MASK,
0442         .offs       = 1 << 1,
0443     },
0444     [MAX8925_IRQ_RTC_ALARM1] = {
0445         .reg        = MAX8925_RTC_IRQ,
0446         .mask_reg   = MAX8925_RTC_IRQ_MASK,
0447         .offs       = 1 << 2,
0448         .flags      = FLAGS_RTC,
0449     },
0450     [MAX8925_IRQ_RTC_ALARM0] = {
0451         .reg        = MAX8925_RTC_IRQ,
0452         .mask_reg   = MAX8925_RTC_IRQ_MASK,
0453         .offs       = 1 << 3,
0454         .flags      = FLAGS_RTC,
0455     },
0456     [MAX8925_IRQ_TSC_STICK] = {
0457         .reg        = MAX8925_TSC_IRQ,
0458         .mask_reg   = MAX8925_TSC_IRQ_MASK,
0459         .offs       = 1 << 0,
0460         .flags      = FLAGS_ADC,
0461         .tsc_irq    = 1,
0462     },
0463     [MAX8925_IRQ_TSC_NSTICK] = {
0464         .reg        = MAX8925_TSC_IRQ,
0465         .mask_reg   = MAX8925_TSC_IRQ_MASK,
0466         .offs       = 1 << 1,
0467         .flags      = FLAGS_ADC,
0468         .tsc_irq    = 1,
0469     },
0470 };
0471 
0472 static inline struct max8925_irq_data *irq_to_max8925(struct max8925_chip *chip,
0473                               int irq)
0474 {
0475     return &max8925_irqs[irq - chip->irq_base];
0476 }
0477 
0478 static irqreturn_t max8925_irq(int irq, void *data)
0479 {
0480     struct max8925_chip *chip = data;
0481     struct max8925_irq_data *irq_data;
0482     struct i2c_client *i2c;
0483     int read_reg = -1, value = 0;
0484     int i;
0485 
0486     for (i = 0; i < ARRAY_SIZE(max8925_irqs); i++) {
0487         irq_data = &max8925_irqs[i];
0488         /* TSC IRQ should be serviced in max8925_tsc_irq() */
0489         if (irq_data->tsc_irq)
0490             continue;
0491         if (irq_data->flags == FLAGS_RTC)
0492             i2c = chip->rtc;
0493         else if (irq_data->flags == FLAGS_ADC)
0494             i2c = chip->adc;
0495         else
0496             i2c = chip->i2c;
0497         if (read_reg != irq_data->reg) {
0498             read_reg = irq_data->reg;
0499             value = max8925_reg_read(i2c, irq_data->reg);
0500         }
0501         if (value & irq_data->enable)
0502             handle_nested_irq(chip->irq_base + i);
0503     }
0504     return IRQ_HANDLED;
0505 }
0506 
0507 static irqreturn_t max8925_tsc_irq(int irq, void *data)
0508 {
0509     struct max8925_chip *chip = data;
0510     struct max8925_irq_data *irq_data;
0511     struct i2c_client *i2c;
0512     int read_reg = -1, value = 0;
0513     int i;
0514 
0515     for (i = 0; i < ARRAY_SIZE(max8925_irqs); i++) {
0516         irq_data = &max8925_irqs[i];
0517         /* non TSC IRQ should be serviced in max8925_irq() */
0518         if (!irq_data->tsc_irq)
0519             continue;
0520         if (irq_data->flags == FLAGS_RTC)
0521             i2c = chip->rtc;
0522         else if (irq_data->flags == FLAGS_ADC)
0523             i2c = chip->adc;
0524         else
0525             i2c = chip->i2c;
0526         if (read_reg != irq_data->reg) {
0527             read_reg = irq_data->reg;
0528             value = max8925_reg_read(i2c, irq_data->reg);
0529         }
0530         if (value & irq_data->enable)
0531             handle_nested_irq(chip->irq_base + i);
0532     }
0533     return IRQ_HANDLED;
0534 }
0535 
0536 static void max8925_irq_lock(struct irq_data *data)
0537 {
0538     struct max8925_chip *chip = irq_data_get_irq_chip_data(data);
0539 
0540     mutex_lock(&chip->irq_lock);
0541 }
0542 
0543 static void max8925_irq_sync_unlock(struct irq_data *data)
0544 {
0545     struct max8925_chip *chip = irq_data_get_irq_chip_data(data);
0546     struct max8925_irq_data *irq_data;
0547     static unsigned char cache_chg[2] = {0xff, 0xff};
0548     static unsigned char cache_on[2] = {0xff, 0xff};
0549     static unsigned char cache_rtc = 0xff, cache_tsc = 0xff;
0550     unsigned char irq_chg[2], irq_on[2];
0551     unsigned char irq_rtc, irq_tsc;
0552     int i;
0553 
0554     /* Load cached value. In initial, all IRQs are masked */
0555     irq_chg[0] = cache_chg[0];
0556     irq_chg[1] = cache_chg[1];
0557     irq_on[0] = cache_on[0];
0558     irq_on[1] = cache_on[1];
0559     irq_rtc = cache_rtc;
0560     irq_tsc = cache_tsc;
0561     for (i = 0; i < ARRAY_SIZE(max8925_irqs); i++) {
0562         irq_data = &max8925_irqs[i];
0563         /* 1 -- disable, 0 -- enable */
0564         switch (irq_data->mask_reg) {
0565         case MAX8925_CHG_IRQ1_MASK:
0566             irq_chg[0] &= ~irq_data->enable;
0567             break;
0568         case MAX8925_CHG_IRQ2_MASK:
0569             irq_chg[1] &= ~irq_data->enable;
0570             break;
0571         case MAX8925_ON_OFF_IRQ1_MASK:
0572             irq_on[0] &= ~irq_data->enable;
0573             break;
0574         case MAX8925_ON_OFF_IRQ2_MASK:
0575             irq_on[1] &= ~irq_data->enable;
0576             break;
0577         case MAX8925_RTC_IRQ_MASK:
0578             irq_rtc &= ~irq_data->enable;
0579             break;
0580         case MAX8925_TSC_IRQ_MASK:
0581             irq_tsc &= ~irq_data->enable;
0582             break;
0583         default:
0584             dev_err(chip->dev, "wrong IRQ\n");
0585             break;
0586         }
0587     }
0588     /* update mask into registers */
0589     if (cache_chg[0] != irq_chg[0]) {
0590         cache_chg[0] = irq_chg[0];
0591         max8925_reg_write(chip->i2c, MAX8925_CHG_IRQ1_MASK,
0592             irq_chg[0]);
0593     }
0594     if (cache_chg[1] != irq_chg[1]) {
0595         cache_chg[1] = irq_chg[1];
0596         max8925_reg_write(chip->i2c, MAX8925_CHG_IRQ2_MASK,
0597             irq_chg[1]);
0598     }
0599     if (cache_on[0] != irq_on[0]) {
0600         cache_on[0] = irq_on[0];
0601         max8925_reg_write(chip->i2c, MAX8925_ON_OFF_IRQ1_MASK,
0602                 irq_on[0]);
0603     }
0604     if (cache_on[1] != irq_on[1]) {
0605         cache_on[1] = irq_on[1];
0606         max8925_reg_write(chip->i2c, MAX8925_ON_OFF_IRQ2_MASK,
0607                 irq_on[1]);
0608     }
0609     if (cache_rtc != irq_rtc) {
0610         cache_rtc = irq_rtc;
0611         max8925_reg_write(chip->rtc, MAX8925_RTC_IRQ_MASK, irq_rtc);
0612     }
0613     if (cache_tsc != irq_tsc) {
0614         cache_tsc = irq_tsc;
0615         max8925_reg_write(chip->adc, MAX8925_TSC_IRQ_MASK, irq_tsc);
0616     }
0617 
0618     mutex_unlock(&chip->irq_lock);
0619 }
0620 
0621 static void max8925_irq_enable(struct irq_data *data)
0622 {
0623     struct max8925_chip *chip = irq_data_get_irq_chip_data(data);
0624 
0625     max8925_irqs[data->irq - chip->irq_base].enable
0626         = max8925_irqs[data->irq - chip->irq_base].offs;
0627 }
0628 
0629 static void max8925_irq_disable(struct irq_data *data)
0630 {
0631     struct max8925_chip *chip = irq_data_get_irq_chip_data(data);
0632 
0633     max8925_irqs[data->irq - chip->irq_base].enable = 0;
0634 }
0635 
0636 static struct irq_chip max8925_irq_chip = {
0637     .name       = "max8925",
0638     .irq_bus_lock   = max8925_irq_lock,
0639     .irq_bus_sync_unlock = max8925_irq_sync_unlock,
0640     .irq_enable = max8925_irq_enable,
0641     .irq_disable    = max8925_irq_disable,
0642 };
0643 
0644 static int max8925_irq_domain_map(struct irq_domain *d, unsigned int virq,
0645                  irq_hw_number_t hw)
0646 {
0647     irq_set_chip_data(virq, d->host_data);
0648     irq_set_chip_and_handler(virq, &max8925_irq_chip, handle_edge_irq);
0649     irq_set_nested_thread(virq, 1);
0650     irq_set_noprobe(virq);
0651 
0652     return 0;
0653 }
0654 
0655 static const struct irq_domain_ops max8925_irq_domain_ops = {
0656     .map    = max8925_irq_domain_map,
0657     .xlate  = irq_domain_xlate_onetwocell,
0658 };
0659 
0660 
0661 static int max8925_irq_init(struct max8925_chip *chip, int irq,
0662                 struct max8925_platform_data *pdata)
0663 {
0664     unsigned long flags = IRQF_TRIGGER_FALLING | IRQF_ONESHOT;
0665     int ret;
0666     struct device_node *node = chip->dev->of_node;
0667 
0668     /* clear all interrupts */
0669     max8925_reg_read(chip->i2c, MAX8925_CHG_IRQ1);
0670     max8925_reg_read(chip->i2c, MAX8925_CHG_IRQ2);
0671     max8925_reg_read(chip->i2c, MAX8925_ON_OFF_IRQ1);
0672     max8925_reg_read(chip->i2c, MAX8925_ON_OFF_IRQ2);
0673     max8925_reg_read(chip->rtc, MAX8925_RTC_IRQ);
0674     max8925_reg_read(chip->adc, MAX8925_TSC_IRQ);
0675     /* mask all interrupts except for TSC */
0676     max8925_reg_write(chip->rtc, MAX8925_ALARM0_CNTL, 0);
0677     max8925_reg_write(chip->rtc, MAX8925_ALARM1_CNTL, 0);
0678     max8925_reg_write(chip->i2c, MAX8925_CHG_IRQ1_MASK, 0xff);
0679     max8925_reg_write(chip->i2c, MAX8925_CHG_IRQ2_MASK, 0xff);
0680     max8925_reg_write(chip->i2c, MAX8925_ON_OFF_IRQ1_MASK, 0xff);
0681     max8925_reg_write(chip->i2c, MAX8925_ON_OFF_IRQ2_MASK, 0xff);
0682     max8925_reg_write(chip->rtc, MAX8925_RTC_IRQ_MASK, 0xff);
0683 
0684     mutex_init(&chip->irq_lock);
0685     chip->irq_base = irq_alloc_descs(-1, 0, MAX8925_NR_IRQS, 0);
0686     if (chip->irq_base < 0) {
0687         dev_err(chip->dev, "Failed to allocate interrupts, ret:%d\n",
0688             chip->irq_base);
0689         return -EBUSY;
0690     }
0691 
0692     irq_domain_add_legacy(node, MAX8925_NR_IRQS, chip->irq_base, 0,
0693                   &max8925_irq_domain_ops, chip);
0694 
0695     /* request irq handler for pmic main irq*/
0696     chip->core_irq = irq;
0697     if (!chip->core_irq)
0698         return -EBUSY;
0699     ret = request_threaded_irq(irq, NULL, max8925_irq, flags | IRQF_ONESHOT,
0700                    "max8925", chip);
0701     if (ret) {
0702         dev_err(chip->dev, "Failed to request core IRQ: %d\n", ret);
0703         chip->core_irq = 0;
0704         return -EBUSY;
0705     }
0706 
0707     /* request irq handler for pmic tsc irq*/
0708 
0709     /* mask TSC interrupt */
0710     max8925_reg_write(chip->adc, MAX8925_TSC_IRQ_MASK, 0x0f);
0711 
0712     if (!pdata->tsc_irq) {
0713         dev_warn(chip->dev, "No interrupt support on TSC IRQ\n");
0714         return 0;
0715     }
0716     chip->tsc_irq = pdata->tsc_irq;
0717     ret = request_threaded_irq(chip->tsc_irq, NULL, max8925_tsc_irq,
0718                    flags | IRQF_ONESHOT, "max8925-tsc", chip);
0719     if (ret) {
0720         dev_err(chip->dev, "Failed to request TSC IRQ: %d\n", ret);
0721         chip->tsc_irq = 0;
0722     }
0723     return 0;
0724 }
0725 
0726 static void init_regulator(struct max8925_chip *chip,
0727                      struct max8925_platform_data *pdata)
0728 {
0729     int ret;
0730 
0731     if (!pdata)
0732         return;
0733     if (pdata->sd1) {
0734         reg_devs[0].platform_data = pdata->sd1;
0735         reg_devs[0].pdata_size = sizeof(struct regulator_init_data);
0736     }
0737     if (pdata->sd2) {
0738         reg_devs[1].platform_data = pdata->sd2;
0739         reg_devs[1].pdata_size = sizeof(struct regulator_init_data);
0740     }
0741     if (pdata->sd3) {
0742         reg_devs[2].platform_data = pdata->sd3;
0743         reg_devs[2].pdata_size = sizeof(struct regulator_init_data);
0744     }
0745     if (pdata->ldo1) {
0746         reg_devs[3].platform_data = pdata->ldo1;
0747         reg_devs[3].pdata_size = sizeof(struct regulator_init_data);
0748     }
0749     if (pdata->ldo2) {
0750         reg_devs[4].platform_data = pdata->ldo2;
0751         reg_devs[4].pdata_size = sizeof(struct regulator_init_data);
0752     }
0753     if (pdata->ldo3) {
0754         reg_devs[5].platform_data = pdata->ldo3;
0755         reg_devs[5].pdata_size = sizeof(struct regulator_init_data);
0756     }
0757     if (pdata->ldo4) {
0758         reg_devs[6].platform_data = pdata->ldo4;
0759         reg_devs[6].pdata_size = sizeof(struct regulator_init_data);
0760     }
0761     if (pdata->ldo5) {
0762         reg_devs[7].platform_data = pdata->ldo5;
0763         reg_devs[7].pdata_size = sizeof(struct regulator_init_data);
0764     }
0765     if (pdata->ldo6) {
0766         reg_devs[8].platform_data = pdata->ldo6;
0767         reg_devs[8].pdata_size = sizeof(struct regulator_init_data);
0768     }
0769     if (pdata->ldo7) {
0770         reg_devs[9].platform_data = pdata->ldo7;
0771         reg_devs[9].pdata_size = sizeof(struct regulator_init_data);
0772     }
0773     if (pdata->ldo8) {
0774         reg_devs[10].platform_data = pdata->ldo8;
0775         reg_devs[10].pdata_size = sizeof(struct regulator_init_data);
0776     }
0777     if (pdata->ldo9) {
0778         reg_devs[11].platform_data = pdata->ldo9;
0779         reg_devs[11].pdata_size = sizeof(struct regulator_init_data);
0780     }
0781     if (pdata->ldo10) {
0782         reg_devs[12].platform_data = pdata->ldo10;
0783         reg_devs[12].pdata_size = sizeof(struct regulator_init_data);
0784     }
0785     if (pdata->ldo11) {
0786         reg_devs[13].platform_data = pdata->ldo11;
0787         reg_devs[13].pdata_size = sizeof(struct regulator_init_data);
0788     }
0789     if (pdata->ldo12) {
0790         reg_devs[14].platform_data = pdata->ldo12;
0791         reg_devs[14].pdata_size = sizeof(struct regulator_init_data);
0792     }
0793     if (pdata->ldo13) {
0794         reg_devs[15].platform_data = pdata->ldo13;
0795         reg_devs[15].pdata_size = sizeof(struct regulator_init_data);
0796     }
0797     if (pdata->ldo14) {
0798         reg_devs[16].platform_data = pdata->ldo14;
0799         reg_devs[16].pdata_size = sizeof(struct regulator_init_data);
0800     }
0801     if (pdata->ldo15) {
0802         reg_devs[17].platform_data = pdata->ldo15;
0803         reg_devs[17].pdata_size = sizeof(struct regulator_init_data);
0804     }
0805     if (pdata->ldo16) {
0806         reg_devs[18].platform_data = pdata->ldo16;
0807         reg_devs[18].pdata_size = sizeof(struct regulator_init_data);
0808     }
0809     if (pdata->ldo17) {
0810         reg_devs[19].platform_data = pdata->ldo17;
0811         reg_devs[19].pdata_size = sizeof(struct regulator_init_data);
0812     }
0813     if (pdata->ldo18) {
0814         reg_devs[20].platform_data = pdata->ldo18;
0815         reg_devs[20].pdata_size = sizeof(struct regulator_init_data);
0816     }
0817     if (pdata->ldo19) {
0818         reg_devs[21].platform_data = pdata->ldo19;
0819         reg_devs[21].pdata_size = sizeof(struct regulator_init_data);
0820     }
0821     if (pdata->ldo20) {
0822         reg_devs[22].platform_data = pdata->ldo20;
0823         reg_devs[22].pdata_size = sizeof(struct regulator_init_data);
0824     }
0825     ret = mfd_add_devices(chip->dev, 0, reg_devs, ARRAY_SIZE(reg_devs),
0826                   NULL, 0, NULL);
0827     if (ret < 0) {
0828         dev_err(chip->dev, "Failed to add regulator subdev\n");
0829         return;
0830     }
0831 }
0832 
0833 int max8925_device_init(struct max8925_chip *chip,
0834                   struct max8925_platform_data *pdata)
0835 {
0836     int ret;
0837 
0838     max8925_irq_init(chip, chip->i2c->irq, pdata);
0839 
0840     if (pdata && (pdata->power || pdata->touch)) {
0841         /* enable ADC to control internal reference */
0842         max8925_set_bits(chip->i2c, MAX8925_RESET_CNFG, 1, 1);
0843         /* enable internal reference for ADC */
0844         max8925_set_bits(chip->adc, MAX8925_TSC_CNFG1, 3, 2);
0845         /* check for internal reference IRQ */
0846         do {
0847             ret = max8925_reg_read(chip->adc, MAX8925_TSC_IRQ);
0848         } while (ret & MAX8925_NREF_OK);
0849         /* enaable ADC scheduler, interval is 1 second */
0850         max8925_set_bits(chip->adc, MAX8925_ADC_SCHED, 3, 2);
0851     }
0852 
0853     /* enable Momentary Power Loss */
0854     max8925_set_bits(chip->rtc, MAX8925_MPL_CNTL, 1 << 4, 1 << 4);
0855 
0856     ret = mfd_add_devices(chip->dev, 0, &rtc_devs[0],
0857                   ARRAY_SIZE(rtc_devs),
0858                   NULL, chip->irq_base, NULL);
0859     if (ret < 0) {
0860         dev_err(chip->dev, "Failed to add rtc subdev\n");
0861         goto out;
0862     }
0863 
0864     ret = mfd_add_devices(chip->dev, 0, &onkey_devs[0],
0865                   ARRAY_SIZE(onkey_devs),
0866                   NULL, chip->irq_base, NULL);
0867     if (ret < 0) {
0868         dev_err(chip->dev, "Failed to add onkey subdev\n");
0869         goto out_dev;
0870     }
0871 
0872     init_regulator(chip, pdata);
0873 
0874     if (pdata && pdata->backlight) {
0875         bk_devs[0].platform_data = &pdata->backlight;
0876         bk_devs[0].pdata_size = sizeof(struct max8925_backlight_pdata);
0877     }
0878     ret = mfd_add_devices(chip->dev, 0, bk_devs, ARRAY_SIZE(bk_devs),
0879                   NULL, 0, NULL);
0880     if (ret < 0) {
0881         dev_err(chip->dev, "Failed to add backlight subdev\n");
0882         goto out_dev;
0883     }
0884 
0885     ret = mfd_add_devices(chip->dev, 0, &power_devs[0],
0886                   ARRAY_SIZE(power_devs),
0887                   NULL, 0, NULL);
0888     if (ret < 0) {
0889         dev_err(chip->dev,
0890             "Failed to add power supply subdev, err = %d\n", ret);
0891         goto out_dev;
0892     }
0893 
0894     if (pdata && pdata->touch) {
0895         ret = mfd_add_devices(chip->dev, 0, &touch_devs[0],
0896                       ARRAY_SIZE(touch_devs),
0897                       NULL, chip->tsc_irq, NULL);
0898         if (ret < 0) {
0899             dev_err(chip->dev, "Failed to add touch subdev\n");
0900             goto out_dev;
0901         }
0902     }
0903 
0904     return 0;
0905 out_dev:
0906     mfd_remove_devices(chip->dev);
0907 out:
0908     return ret;
0909 }
0910 
0911 void max8925_device_exit(struct max8925_chip *chip)
0912 {
0913     if (chip->core_irq)
0914         free_irq(chip->core_irq, chip);
0915     if (chip->tsc_irq)
0916         free_irq(chip->tsc_irq, chip);
0917     mfd_remove_devices(chip->dev);
0918 }
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