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0011 #include <linux/delay.h>
0012 #include <linux/device.h>
0013 #include <linux/err.h>
0014 #include <linux/gpio/consumer.h>
0015 #include <linux/i2c.h>
0016 #include <linux/lockdep.h>
0017 #include <linux/mfd/core.h>
0018 #include <linux/mutex.h>
0019 #include <linux/of.h>
0020 #include <linux/of_platform.h>
0021 #include <linux/regmap.h>
0022
0023 #include <linux/mfd/lochnagar.h>
0024 #include <linux/mfd/lochnagar1_regs.h>
0025 #include <linux/mfd/lochnagar2_regs.h>
0026
0027 #define LOCHNAGAR_BOOT_RETRIES 10
0028 #define LOCHNAGAR_BOOT_DELAY_MS 350
0029
0030 #define LOCHNAGAR_CONFIG_POLL_US 10000
0031
0032 static bool lochnagar1_readable_register(struct device *dev, unsigned int reg)
0033 {
0034 switch (reg) {
0035 case LOCHNAGAR_SOFTWARE_RESET:
0036 case LOCHNAGAR_FIRMWARE_ID1...LOCHNAGAR_FIRMWARE_ID2:
0037 case LOCHNAGAR1_CDC_AIF1_SEL...LOCHNAGAR1_CDC_AIF3_SEL:
0038 case LOCHNAGAR1_CDC_MCLK1_SEL...LOCHNAGAR1_CDC_MCLK2_SEL:
0039 case LOCHNAGAR1_CDC_AIF_CTRL1...LOCHNAGAR1_CDC_AIF_CTRL2:
0040 case LOCHNAGAR1_EXT_AIF_CTRL:
0041 case LOCHNAGAR1_DSP_AIF1_SEL...LOCHNAGAR1_DSP_AIF2_SEL:
0042 case LOCHNAGAR1_DSP_CLKIN_SEL:
0043 case LOCHNAGAR1_DSP_AIF:
0044 case LOCHNAGAR1_GF_AIF1...LOCHNAGAR1_GF_AIF2:
0045 case LOCHNAGAR1_PSIA_AIF:
0046 case LOCHNAGAR1_PSIA1_SEL...LOCHNAGAR1_PSIA2_SEL:
0047 case LOCHNAGAR1_SPDIF_AIF_SEL:
0048 case LOCHNAGAR1_GF_AIF3_SEL...LOCHNAGAR1_GF_AIF4_SEL:
0049 case LOCHNAGAR1_GF_CLKOUT1_SEL:
0050 case LOCHNAGAR1_GF_AIF1_SEL...LOCHNAGAR1_GF_AIF2_SEL:
0051 case LOCHNAGAR1_GF_GPIO2...LOCHNAGAR1_GF_GPIO7:
0052 case LOCHNAGAR1_RST:
0053 case LOCHNAGAR1_LED1...LOCHNAGAR1_LED2:
0054 case LOCHNAGAR1_I2C_CTRL:
0055 return true;
0056 default:
0057 return false;
0058 }
0059 }
0060
0061 static const struct regmap_config lochnagar1_i2c_regmap = {
0062 .reg_bits = 8,
0063 .val_bits = 8,
0064 .reg_format_endian = REGMAP_ENDIAN_BIG,
0065 .val_format_endian = REGMAP_ENDIAN_BIG,
0066
0067 .max_register = 0x50,
0068 .readable_reg = lochnagar1_readable_register,
0069
0070 .use_single_read = true,
0071 .use_single_write = true,
0072
0073 .cache_type = REGCACHE_RBTREE,
0074 };
0075
0076 static const struct reg_sequence lochnagar1_patch[] = {
0077 { 0x40, 0x0083 },
0078 { 0x47, 0x0018 },
0079 { 0x50, 0x0000 },
0080 };
0081
0082 static bool lochnagar2_readable_register(struct device *dev, unsigned int reg)
0083 {
0084 switch (reg) {
0085 case LOCHNAGAR_SOFTWARE_RESET:
0086 case LOCHNAGAR_FIRMWARE_ID1...LOCHNAGAR_FIRMWARE_ID2:
0087 case LOCHNAGAR2_CDC_AIF1_CTRL...LOCHNAGAR2_CDC_AIF3_CTRL:
0088 case LOCHNAGAR2_DSP_AIF1_CTRL...LOCHNAGAR2_DSP_AIF2_CTRL:
0089 case LOCHNAGAR2_PSIA1_CTRL...LOCHNAGAR2_PSIA2_CTRL:
0090 case LOCHNAGAR2_GF_AIF3_CTRL...LOCHNAGAR2_GF_AIF4_CTRL:
0091 case LOCHNAGAR2_GF_AIF1_CTRL...LOCHNAGAR2_GF_AIF2_CTRL:
0092 case LOCHNAGAR2_SPDIF_AIF_CTRL:
0093 case LOCHNAGAR2_USB_AIF1_CTRL...LOCHNAGAR2_USB_AIF2_CTRL:
0094 case LOCHNAGAR2_ADAT_AIF_CTRL:
0095 case LOCHNAGAR2_CDC_MCLK1_CTRL...LOCHNAGAR2_CDC_MCLK2_CTRL:
0096 case LOCHNAGAR2_DSP_CLKIN_CTRL:
0097 case LOCHNAGAR2_PSIA1_MCLK_CTRL...LOCHNAGAR2_PSIA2_MCLK_CTRL:
0098 case LOCHNAGAR2_SPDIF_MCLK_CTRL:
0099 case LOCHNAGAR2_GF_CLKOUT1_CTRL...LOCHNAGAR2_GF_CLKOUT2_CTRL:
0100 case LOCHNAGAR2_ADAT_MCLK_CTRL:
0101 case LOCHNAGAR2_SOUNDCARD_MCLK_CTRL:
0102 case LOCHNAGAR2_GPIO_FPGA_GPIO1...LOCHNAGAR2_GPIO_FPGA_GPIO6:
0103 case LOCHNAGAR2_GPIO_CDC_GPIO1...LOCHNAGAR2_GPIO_CDC_GPIO8:
0104 case LOCHNAGAR2_GPIO_DSP_GPIO1...LOCHNAGAR2_GPIO_DSP_GPIO6:
0105 case LOCHNAGAR2_GPIO_GF_GPIO2...LOCHNAGAR2_GPIO_GF_GPIO7:
0106 case LOCHNAGAR2_GPIO_CDC_AIF1_BCLK...LOCHNAGAR2_GPIO_CDC_AIF3_TXDAT:
0107 case LOCHNAGAR2_GPIO_DSP_AIF1_BCLK...LOCHNAGAR2_GPIO_DSP_AIF2_TXDAT:
0108 case LOCHNAGAR2_GPIO_PSIA1_BCLK...LOCHNAGAR2_GPIO_PSIA2_TXDAT:
0109 case LOCHNAGAR2_GPIO_GF_AIF3_BCLK...LOCHNAGAR2_GPIO_GF_AIF4_TXDAT:
0110 case LOCHNAGAR2_GPIO_GF_AIF1_BCLK...LOCHNAGAR2_GPIO_GF_AIF2_TXDAT:
0111 case LOCHNAGAR2_GPIO_DSP_UART1_RX...LOCHNAGAR2_GPIO_DSP_UART2_TX:
0112 case LOCHNAGAR2_GPIO_GF_UART2_RX...LOCHNAGAR2_GPIO_GF_UART2_TX:
0113 case LOCHNAGAR2_GPIO_USB_UART_RX:
0114 case LOCHNAGAR2_GPIO_CDC_PDMCLK1...LOCHNAGAR2_GPIO_CDC_PDMDAT2:
0115 case LOCHNAGAR2_GPIO_CDC_DMICCLK1...LOCHNAGAR2_GPIO_CDC_DMICDAT4:
0116 case LOCHNAGAR2_GPIO_DSP_DMICCLK1...LOCHNAGAR2_GPIO_DSP_DMICDAT2:
0117 case LOCHNAGAR2_GPIO_I2C2_SCL...LOCHNAGAR2_GPIO_I2C4_SDA:
0118 case LOCHNAGAR2_GPIO_DSP_STANDBY:
0119 case LOCHNAGAR2_GPIO_CDC_MCLK1...LOCHNAGAR2_GPIO_CDC_MCLK2:
0120 case LOCHNAGAR2_GPIO_DSP_CLKIN:
0121 case LOCHNAGAR2_GPIO_PSIA1_MCLK...LOCHNAGAR2_GPIO_PSIA2_MCLK:
0122 case LOCHNAGAR2_GPIO_GF_GPIO1...LOCHNAGAR2_GPIO_GF_GPIO5:
0123 case LOCHNAGAR2_GPIO_DSP_GPIO20:
0124 case LOCHNAGAR2_GPIO_CHANNEL1...LOCHNAGAR2_GPIO_CHANNEL16:
0125 case LOCHNAGAR2_MINICARD_RESETS:
0126 case LOCHNAGAR2_ANALOGUE_PATH_CTRL1...LOCHNAGAR2_ANALOGUE_PATH_CTRL2:
0127 case LOCHNAGAR2_COMMS_CTRL4:
0128 case LOCHNAGAR2_SPDIF_CTRL:
0129 case LOCHNAGAR2_IMON_CTRL1...LOCHNAGAR2_IMON_CTRL4:
0130 case LOCHNAGAR2_IMON_DATA1...LOCHNAGAR2_IMON_DATA2:
0131 case LOCHNAGAR2_POWER_CTRL:
0132 case LOCHNAGAR2_MICVDD_CTRL1:
0133 case LOCHNAGAR2_MICVDD_CTRL2:
0134 case LOCHNAGAR2_VDDCORE_CDC_CTRL1:
0135 case LOCHNAGAR2_VDDCORE_CDC_CTRL2:
0136 case LOCHNAGAR2_SOUNDCARD_AIF_CTRL:
0137 return true;
0138 default:
0139 return false;
0140 }
0141 }
0142
0143 static bool lochnagar2_volatile_register(struct device *dev, unsigned int reg)
0144 {
0145 switch (reg) {
0146 case LOCHNAGAR2_GPIO_CHANNEL1...LOCHNAGAR2_GPIO_CHANNEL16:
0147 case LOCHNAGAR2_ANALOGUE_PATH_CTRL1:
0148 case LOCHNAGAR2_IMON_CTRL3...LOCHNAGAR2_IMON_CTRL4:
0149 case LOCHNAGAR2_IMON_DATA1...LOCHNAGAR2_IMON_DATA2:
0150 return true;
0151 default:
0152 return false;
0153 }
0154 }
0155
0156 static const struct regmap_config lochnagar2_i2c_regmap = {
0157 .reg_bits = 16,
0158 .val_bits = 16,
0159 .reg_format_endian = REGMAP_ENDIAN_BIG,
0160 .val_format_endian = REGMAP_ENDIAN_BIG,
0161
0162 .max_register = 0x1F1F,
0163 .readable_reg = lochnagar2_readable_register,
0164 .volatile_reg = lochnagar2_volatile_register,
0165
0166 .cache_type = REGCACHE_RBTREE,
0167 };
0168
0169 static const struct reg_sequence lochnagar2_patch[] = {
0170 { 0x00EE, 0x0000 },
0171 };
0172
0173 struct lochnagar_config {
0174 int id;
0175 const char * const name;
0176 enum lochnagar_type type;
0177 const struct regmap_config *regmap;
0178 const struct reg_sequence *patch;
0179 int npatch;
0180 };
0181
0182 static struct lochnagar_config lochnagar_configs[] = {
0183 {
0184 .id = 0x50,
0185 .name = "lochnagar1",
0186 .type = LOCHNAGAR1,
0187 .regmap = &lochnagar1_i2c_regmap,
0188 .patch = lochnagar1_patch,
0189 .npatch = ARRAY_SIZE(lochnagar1_patch),
0190 },
0191 {
0192 .id = 0xCB58,
0193 .name = "lochnagar2",
0194 .type = LOCHNAGAR2,
0195 .regmap = &lochnagar2_i2c_regmap,
0196 .patch = lochnagar2_patch,
0197 .npatch = ARRAY_SIZE(lochnagar2_patch),
0198 },
0199 };
0200
0201 static const struct of_device_id lochnagar_of_match[] = {
0202 { .compatible = "cirrus,lochnagar1", .data = &lochnagar_configs[0] },
0203 { .compatible = "cirrus,lochnagar2", .data = &lochnagar_configs[1] },
0204 {},
0205 };
0206
0207 static int lochnagar_wait_for_boot(struct regmap *regmap, unsigned int *id)
0208 {
0209 int i, ret;
0210
0211 for (i = 0; i < LOCHNAGAR_BOOT_RETRIES; ++i) {
0212 msleep(LOCHNAGAR_BOOT_DELAY_MS);
0213
0214
0215 ret = regmap_read(regmap, LOCHNAGAR_SOFTWARE_RESET, id);
0216 if (!ret)
0217 return ret;
0218 }
0219
0220 return -ETIMEDOUT;
0221 }
0222
0223
0224
0225
0226
0227
0228
0229
0230
0231 int lochnagar_update_config(struct lochnagar *lochnagar)
0232 {
0233 struct regmap *regmap = lochnagar->regmap;
0234 unsigned int done = LOCHNAGAR2_ANALOGUE_PATH_UPDATE_STS_MASK;
0235 int timeout_ms = LOCHNAGAR_BOOT_DELAY_MS * LOCHNAGAR_BOOT_RETRIES;
0236 unsigned int val = 0;
0237 int ret;
0238
0239 lockdep_assert_held(&lochnagar->analogue_config_lock);
0240
0241 if (lochnagar->type != LOCHNAGAR2)
0242 return 0;
0243
0244
0245
0246
0247
0248
0249 ret = regmap_write(regmap, LOCHNAGAR2_ANALOGUE_PATH_CTRL1, 0);
0250 if (ret < 0)
0251 return ret;
0252
0253 ret = regmap_write(regmap, LOCHNAGAR2_ANALOGUE_PATH_CTRL1,
0254 LOCHNAGAR2_ANALOGUE_PATH_UPDATE_MASK);
0255 if (ret < 0)
0256 return ret;
0257
0258 ret = regmap_read_poll_timeout(regmap,
0259 LOCHNAGAR2_ANALOGUE_PATH_CTRL1, val,
0260 (val & done), LOCHNAGAR_CONFIG_POLL_US,
0261 timeout_ms * 1000);
0262 if (ret < 0)
0263 return ret;
0264
0265 return 0;
0266 }
0267 EXPORT_SYMBOL_GPL(lochnagar_update_config);
0268
0269 static int lochnagar_i2c_probe(struct i2c_client *i2c)
0270 {
0271 struct device *dev = &i2c->dev;
0272 const struct lochnagar_config *config = NULL;
0273 const struct of_device_id *of_id;
0274 struct lochnagar *lochnagar;
0275 struct gpio_desc *reset, *present;
0276 unsigned int val;
0277 unsigned int firmwareid;
0278 unsigned int devid, rev;
0279 int ret;
0280
0281 lochnagar = devm_kzalloc(dev, sizeof(*lochnagar), GFP_KERNEL);
0282 if (!lochnagar)
0283 return -ENOMEM;
0284
0285 of_id = of_match_device(lochnagar_of_match, dev);
0286 if (!of_id)
0287 return -EINVAL;
0288
0289 config = of_id->data;
0290
0291 lochnagar->dev = dev;
0292 mutex_init(&lochnagar->analogue_config_lock);
0293
0294 dev_set_drvdata(dev, lochnagar);
0295
0296 reset = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
0297 if (IS_ERR(reset)) {
0298 ret = PTR_ERR(reset);
0299 dev_err(dev, "Failed to get reset GPIO: %d\n", ret);
0300 return ret;
0301 }
0302
0303 present = devm_gpiod_get_optional(dev, "present", GPIOD_OUT_HIGH);
0304 if (IS_ERR(present)) {
0305 ret = PTR_ERR(present);
0306 dev_err(dev, "Failed to get present GPIO: %d\n", ret);
0307 return ret;
0308 }
0309
0310
0311 msleep(20);
0312
0313
0314 gpiod_set_value_cansleep(reset, 1);
0315
0316
0317 lochnagar->type = config->type;
0318
0319 lochnagar->regmap = devm_regmap_init_i2c(i2c, config->regmap);
0320 if (IS_ERR(lochnagar->regmap)) {
0321 ret = PTR_ERR(lochnagar->regmap);
0322 dev_err(dev, "Failed to allocate register map: %d\n", ret);
0323 return ret;
0324 }
0325
0326
0327 ret = lochnagar_wait_for_boot(lochnagar->regmap, &val);
0328 if (ret < 0) {
0329 dev_err(dev, "Failed to read device ID: %d\n", ret);
0330 return ret;
0331 }
0332
0333 devid = val & LOCHNAGAR_DEVICE_ID_MASK;
0334 rev = val & LOCHNAGAR_REV_ID_MASK;
0335
0336 if (devid != config->id) {
0337 dev_err(dev,
0338 "ID does not match %s (expected 0x%x got 0x%x)\n",
0339 config->name, config->id, devid);
0340 return -ENODEV;
0341 }
0342
0343
0344 ret = regmap_read(lochnagar->regmap, LOCHNAGAR_FIRMWARE_ID1, &val);
0345 if (ret < 0) {
0346 dev_err(dev, "Failed to read firmware id 1: %d\n", ret);
0347 return ret;
0348 }
0349
0350 firmwareid = val;
0351
0352 ret = regmap_read(lochnagar->regmap, LOCHNAGAR_FIRMWARE_ID2, &val);
0353 if (ret < 0) {
0354 dev_err(dev, "Failed to read firmware id 2: %d\n", ret);
0355 return ret;
0356 }
0357
0358 firmwareid |= (val << config->regmap->val_bits);
0359
0360 dev_info(dev, "Found %s (0x%x) revision %u firmware 0x%.6x\n",
0361 config->name, devid, rev + 1, firmwareid);
0362
0363 ret = regmap_register_patch(lochnagar->regmap, config->patch,
0364 config->npatch);
0365 if (ret < 0) {
0366 dev_err(dev, "Failed to register patch: %d\n", ret);
0367 return ret;
0368 }
0369
0370 ret = devm_of_platform_populate(dev);
0371 if (ret < 0) {
0372 dev_err(dev, "Failed to populate child nodes: %d\n", ret);
0373 return ret;
0374 }
0375
0376 return ret;
0377 }
0378
0379 static struct i2c_driver lochnagar_i2c_driver = {
0380 .driver = {
0381 .name = "lochnagar",
0382 .of_match_table = of_match_ptr(lochnagar_of_match),
0383 .suppress_bind_attrs = true,
0384 },
0385 .probe_new = lochnagar_i2c_probe,
0386 };
0387
0388 static int __init lochnagar_i2c_init(void)
0389 {
0390 int ret;
0391
0392 ret = i2c_add_driver(&lochnagar_i2c_driver);
0393 if (ret)
0394 pr_err("Failed to register Lochnagar driver: %d\n", ret);
0395
0396 return ret;
0397 }
0398 subsys_initcall(lochnagar_i2c_init);